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Searched refs:CLK_TOP_A2SYS_HP_SEL (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7622-clk.h83 #define CLK_TOP_A2SYS_HP_SEL 71 macro
Dmt2712-clk.h173 #define CLK_TOP_A2SYS_HP_SEL 142 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7622.c422 MUX_GATE(CLK_TOP_A2SYS_HP_SEL, "a2sys_hp_sel", a1sys_hp_parents,
Dclk-mt2712.c716 MUX_GATE(CLK_TOP_A2SYS_HP_SEL, "a2sys_hp_sel", a2sys_hp_parents, 0x510, 0, 3, 7),
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi690 <&topckgen CLK_TOP_A2SYS_HP_SEL>,