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Searched refs:CLK_SCLK_PWM (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dexynos5410.h33 #define CLK_SCLK_PWM 155 macro
Dexynos5250.h47 #define CLK_SCLK_PWM 150 macro
Dexynos5420.h56 #define CLK_SCLK_PWM 155 macro
Dexynos5433.h453 #define CLK_SCLK_PWM 58 macro
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos5410.c197 GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm",
Dclk-exynos5250.c502 GATE(CLK_SCLK_PWM, "sclk_pwm", "div_pwm",
Dclk-exynos5420.c998 GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm",
Dclk-exynos5433.c1717 GATE(CLK_SCLK_PWM, "sclk_pwm", "oscclk", ENABLE_SCLK_PERIC, 15, 0, 0),