Searched refs:CLK_SCLK_MMC0_FSYS (Results 1 – 4 of 4) sorted by relevance
141 #define CLK_SCLK_MMC0_FSYS 205 macro
969 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
438 <&cmu_top CLK_SCLK_MMC0_FSYS>,
685 GATE(CLK_SCLK_MMC0_FSYS, "sclk_mmc0_fsys", "div_sclk_mmc0_b",