Searched refs:CLK_REF_PIPE_PHY0 (Results 1 – 3 of 3) sorted by relevance
695 #define CLK_REF_PIPE_PHY0 680 macro
2809 clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,2812 assigned-clocks = <&cru CLK_REF_PIPE_PHY0>;
2168 MUX(CLK_REF_PIPE_PHY0, "clk_ref_pipe_phy0", clk_ref_pipe_phy0_p, CLK_SET_RATE_PARENT,