Searched refs:CLK_MOUT_VPLLSRC (Results 1 – 6 of 6) sorted by relevance
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | exynos5250.h | 178 #define CLK_MOUT_VPLLSRC 1030 macro
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| D | exynos4.h | 212 #define CLK_MOUT_VPLLSRC 398 macro
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| D | exynos3250.h | 52 #define CLK_MOUT_VPLLSRC 34 macro
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| /linux-6.12.1/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 104 #define CLKS_NR (CLK_MOUT_VPLLSRC + 1)
245 MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),
818 if (clk_hw_get_rate(hws[CLK_MOUT_VPLLSRC]) == 24 * MHZ) in exynos5250_clk_init()
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| D | clk-exynos4.c | 444 MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1),
1305 if (clk_hw_get_rate(hws[CLK_MOUT_VPLLSRC]) == 24000000) in exynos4_clk_init()
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| D | clk-exynos3250.c | 280 MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1),
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