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Searched refs:CLK_MM_DISP_RSZ0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt6765-mm.c35 GATE_MM(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "mm_ck", 9),
Dclk-mt8186-mm.c39 GATE_MM0(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "top_disp", 7),
Dclk-mt8192-mm.c50 GATE_MM0(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "disp_sel", 7),
/linux-6.12.1/include/dt-bindings/clock/
Dmt6765-clk.h260 #define CLK_MM_DISP_RSZ0 9 macro
Dmt8186-clk.h307 #define CLK_MM_DISP_RSZ0 6 macro
Dmt8192-clk.h431 #define CLK_MM_DISP_RSZ0 7 macro