Searched refs:CLK_MM_DISP_RDMA1 (Results 1 – 23 of 23) sorted by relevance
/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8186-mm.c | 54 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "top_disp", 25),
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D | clk-mt2701-mm.c | 53 GATE_DISP0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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D | clk-mt8167-mm.c | 50 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "smi_mm", 12),
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D | clk-mt6797-mm.c | 53 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 20),
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D | clk-mt6795-mm.c | 52 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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D | clk-mt8183-mm.c | 60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
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D | clk-mt6779-mm.c | 60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
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D | clk-mt8173-mm.c | 55 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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D | clk-mt2712-mm.c | 63 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8167-clk.h | 91 #define CLK_MM_DISP_RDMA1 12 macro
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D | mediatek,mt6795-clk.h | 238 #define CLK_MM_DISP_RDMA1 19 macro
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D | mt6797-clk.h | 235 #define CLK_MM_DISP_RDMA1 21 macro
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D | mt8173-clk.h | 266 #define CLK_MM_DISP_RDMA1 19 macro
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D | mt6779-clk.h | 364 #define CLK_MM_DISP_RDMA1 24 macro
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D | mt2712-clk.h | 320 #define CLK_MM_DISP_RDMA1 19 macro
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D | mt8183-clk.h | 332 #define CLK_MM_DISP_RDMA1 23 macro
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D | mt8186-clk.h | 322 #define CLK_MM_DISP_RDMA1 21 macro
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D | mt2701-clk.h | 372 #define CLK_MM_DISP_RDMA1 20 macro
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/linux-6.12.1/arch/arm/boot/dts/mediatek/ |
D | mt7623n.dtsi | 212 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt6795.dtsi | 767 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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D | mt8173.dtsi | 1109 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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D | mt8183.dtsi | 1773 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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D | mt8186.dtsi | 1954 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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