Home
last modified time | relevance | path

Searched refs:CLK_MM_DISP_RDMA1 (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8186-mm.c54 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "top_disp", 25),
Dclk-mt2701-mm.c53 GATE_DISP0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
Dclk-mt8167-mm.c50 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "smi_mm", 12),
Dclk-mt6797-mm.c53 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 20),
Dclk-mt6795-mm.c52 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
Dclk-mt8183-mm.c60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
Dclk-mt6779-mm.c60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
Dclk-mt8173-mm.c55 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
Dclk-mt2712-mm.c63 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
/linux-6.12.1/include/dt-bindings/clock/
Dmt8167-clk.h91 #define CLK_MM_DISP_RDMA1 12 macro
Dmediatek,mt6795-clk.h238 #define CLK_MM_DISP_RDMA1 19 macro
Dmt6797-clk.h235 #define CLK_MM_DISP_RDMA1 21 macro
Dmt8173-clk.h266 #define CLK_MM_DISP_RDMA1 19 macro
Dmt6779-clk.h364 #define CLK_MM_DISP_RDMA1 24 macro
Dmt2712-clk.h320 #define CLK_MM_DISP_RDMA1 19 macro
Dmt8183-clk.h332 #define CLK_MM_DISP_RDMA1 23 macro
Dmt8186-clk.h322 #define CLK_MM_DISP_RDMA1 21 macro
Dmt2701-clk.h372 #define CLK_MM_DISP_RDMA1 20 macro
/linux-6.12.1/arch/arm/boot/dts/mediatek/
Dmt7623n.dtsi212 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi767 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
Dmt8173.dtsi1109 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
Dmt8183.dtsi1773 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
Dmt8186.dtsi1954 clocks = <&mmsys CLK_MM_DISP_RDMA1>;