Searched refs:CLK_MM_DISP_OVL1 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt6797-mm.c | 49 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 16),
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| D | clk-mt6795-mm.c | 50 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 17),
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| D | clk-mt8173-mm.c | 53 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 17),
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| D | clk-mt2712-mm.c | 61 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 17),
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mediatek,mt6795-clk.h | 236 #define CLK_MM_DISP_OVL1 17 macro
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| D | mt6797-clk.h | 231 #define CLK_MM_DISP_OVL1 17 macro
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| D | mt8173-clk.h | 264 #define CLK_MM_DISP_OVL1 17 macro
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| D | mt2712-clk.h | 318 #define CLK_MM_DISP_OVL1 17 macro
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt6795.dtsi | 747 clocks = <&mmsys CLK_MM_DISP_OVL1>;
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| D | mt8173.dtsi | 1089 clocks = <&mmsys CLK_MM_DISP_OVL1>;
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