Searched refs:CLK_MM_DISP_AAL0 (Results 1 – 13 of 13) sorted by relevance
/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt6765-mm.c | 40 GATE_MM(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_ck", 14),
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D | clk-mt8186-mm.c | 40 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "top_disp", 8),
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D | clk-mt8183-mm.c | 64 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_sel", 28),
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D | clk-mt8192-mm.c | 51 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "disp_sel", 8),
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D | clk-mt6779-mm.c | 64 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_sel", 28),
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/linux-6.12.1/include/dt-bindings/clock/ |
D | mt6765-clk.h | 265 #define CLK_MM_DISP_AAL0 14 macro
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D | mt6779-clk.h | 368 #define CLK_MM_DISP_AAL0 28 macro
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D | mt8183-clk.h | 336 #define CLK_MM_DISP_AAL0 27 macro
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D | mt8186-clk.h | 308 #define CLK_MM_DISP_AAL0 7 macro
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D | mt8192-clk.h | 432 #define CLK_MM_DISP_AAL0 8 macro
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8183.dtsi | 1803 clocks = <&mmsys CLK_MM_DISP_AAL0>;
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D | mt8192.dtsi | 1563 clocks = <&mmsys CLK_MM_DISP_AAL0>;
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D | mt8186.dtsi | 1884 clocks = <&mmsys CLK_MM_DISP_AAL0>;
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