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Searched refs:CLK_MM_DISP_AAL0 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt6765-mm.c40 GATE_MM(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_ck", 14),
Dclk-mt8186-mm.c40 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "top_disp", 8),
Dclk-mt8183-mm.c64 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_sel", 28),
Dclk-mt8192-mm.c51 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "disp_sel", 8),
Dclk-mt6779-mm.c64 GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_sel", 28),
/linux-6.12.1/include/dt-bindings/clock/
Dmt6765-clk.h265 #define CLK_MM_DISP_AAL0 14 macro
Dmt6779-clk.h368 #define CLK_MM_DISP_AAL0 28 macro
Dmt8183-clk.h336 #define CLK_MM_DISP_AAL0 27 macro
Dmt8186-clk.h308 #define CLK_MM_DISP_AAL0 7 macro
Dmt8192-clk.h432 #define CLK_MM_DISP_AAL0 8 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1803 clocks = <&mmsys CLK_MM_DISP_AAL0>;
Dmt8192.dtsi1563 clocks = <&mmsys CLK_MM_DISP_AAL0>;
Dmt8186.dtsi1884 clocks = <&mmsys CLK_MM_DISP_AAL0>;