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Searched refs:CLK_MMC1 (Results 1 – 25 of 55) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dexynos5410.h55 #define CLK_MMC1 352 macro
Dsun8i-v3s-ccu.h80 #define CLK_MMC1 48 macro
Dsuniv-ccu-f1c100s.h43 #define CLK_MMC1 44 macro
Dpxa-clock.h38 #define CLK_MMC1 28 macro
Dsun5i-ccu.h60 #define CLK_MMC1 65 macro
Dsun8i-a23-a33-ccu.h90 #define CLK_MMC1 63 macro
Dsun8i-a83t-ccu.h100 #define CLK_MMC1 63 macro
Dsun50i-a64-ccu.h98 #define CLK_MMC1 76 macro
Dsun8i-h3-ccu.h107 #define CLK_MMC1 74 macro
Dsun9i-a80-ccu.h62 #define CLK_MMC1 36 macro
Dsun50i-h616-ccu.h47 #define CLK_MMC1 61 macro
Dsun50i-a100-ccu.h47 #define CLK_MMC1 63 macro
Dsun50i-h6-ccu.h51 #define CLK_MMC1 65 macro
Dsun6i-a31-ccu.h118 #define CLK_MMC1 82 macro
Dsun8i-r40-ccu.h132 #define CLK_MMC1 108 macro
Dsun20i-d1-ccu.h67 #define CLK_MMC1 57 macro
Dsun4i-a10-ccu.h132 #define CLK_MMC1 101 macro
Dexynos5420.h116 #define CLK_MMC1 352 macro
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos5410.c183 GATE(CLK_MMC1, "sdmmc1", "aclk200", GATE_BUS_FSYS0, 13, 0, 0),
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun8i-v3s.c535 [CLK_MMC1] = &mmc1_clk.common.hw,
616 [CLK_MMC1] = &mmc1_clk.common.hw,
Dccu-sun5i.c695 [CLK_MMC1] = &mmc1_clk.common.hw,
829 [CLK_MMC1] = &mmc1_clk.common.hw,
939 [CLK_MMC1] = &mmc1_clk.common.hw,
Dccu-sun8i-h3.c718 [CLK_MMC1] = &mmc1_clk.common.hw,
838 [CLK_MMC1] = &mmc1_clk.common.hw,
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h5.dtsi250 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
/linux-6.12.1/arch/arm/boot/dts/intel/pxa/
Dpxa3xx.dtsi187 clocks = <&clks CLK_MMC1>;
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsuniv-f1c100s.dtsi124 <&ccu CLK_MMC1>,

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