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Searched refs:CLK_INFRA_UART1_SEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7986-clk.h92 #define CLK_INFRA_UART1_SEL 2 macro
Dmediatek,mt7981-clk.h127 #define CLK_INFRA_UART1_SEL 2 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-infracfg.c43 MUX_GATE_CLR_SET_UPD(CLK_INFRA_UART1_SEL, "infra_uart1_sel",
Dclk-mt7981-infracfg.c50 MUX_GATE_CLR_SET_UPD(CLK_INFRA_UART1_SEL, "infra_uart1_sel",
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7981b.dtsi113 clocks = <&infracfg CLK_INFRA_UART1_SEL>,
Dmt7986a.dtsi267 clocks = <&infracfg CLK_INFRA_UART1_SEL>,
270 assigned-clocks = <&infracfg CLK_INFRA_UART1_SEL>;