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Searched refs:CLK_GOUT_WDT1_PCLK (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dexynos7885.h134 #define CLK_GOUT_WDT1_PCLK 43 macro
Dexynos850.h360 #define CLK_GOUT_WDT1_PCLK 34 macro
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos7885.c22 #define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1)
562 GATE(CLK_GOUT_WDT1_PCLK, "gout_wdt1_pclk", "mout_peri_bus_user",
Dclk-exynos850.c2067 GATE(CLK_GOUT_WDT1_PCLK, "gout_wdt1_pclk", "mout_peri_bus_user",
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos850.dtsi242 clocks = <&cmu_peri CLK_GOUT_WDT1_PCLK>, <&oscclk>;