Searched refs:CLK_DIV_4 (Results 1 – 8 of 8) sorted by relevance
634 max_div = CLK_DIV_4; in switch_ssc_clock()705 div = CLK_DIV_4; in switch_normal_clock()712 div = CLK_DIV_4; in switch_normal_clock()
53 #define CLK_DIV_4 0x03 macro
306 #define CLK_DIV_4 0x02 macro
457 #define CLK_DIV_4 0x03 macro
631 } else if (div == CLK_DIV_4) { in rts5228_pci_switch_clock()
710 } else if (div == CLK_DIV_4) { in rts5261_pci_switch_clock()
438 while (n < MIN_DIV_N && div < CLK_DIV_4) { in rtsx_usb_switch_clock()
780 } else if (div == CLK_DIV_4) { in rts5264_pci_switch_clock()