Searched refs:CLK_CSIS0 (Results 1 – 5 of 5) sorted by relevance
98 #define CLK_CSIS0 260 macro
315 #define CLK_CSIS0 29 macro
1026 GATE(CLK_CSIS0, "csis0", "mout_aclk_266_sub",
807 GATE(CLK_CSIS0, "csis0", "aclk160", GATE_IP_CAM, 4,
269 clocks = <&clock CLK_CSIS0>,