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Searched refs:CLK_BASE__INST5_SEG0 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h201 #define CLK_BASE__INST5_SEG0 0x0001B000 macro
Dnavi10_ip_offset.h218 #define CLK_BASE__INST5_SEG0 0 macro
Dvega20_ip_offset.h243 #define CLK_BASE__INST5_SEG0 0 macro
Dnavi14_ip_offset.h265 #define CLK_BASE__INST5_SEG0 0x00017E00 macro
Dnavi12_ip_offset.h265 #define CLK_BASE__INST5_SEG0 0x00017E00 macro
Ddimgrey_cavefish_ip_offset.h249 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
Dsienna_cichlid_ip_offset.h272 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
Dbeige_goby_ip_offset.h278 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
Drenoir_ip_offset.h347 #define CLK_BASE__INST5_SEG0 0 macro
Dvangogh_ip_offset.h373 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
Dyellow_carp_offset.h322 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
Darct_ip_offset.h335 #define CLK_BASE__INST5_SEG0 0x00013720 macro
Daldebaran_ip_offset.h352 #define CLK_BASE__INST5_SEG0 0x0001B200 macro