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Searched refs:CLK_BASE__INST1_SEG0 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h177 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dnavi10_ip_offset.h190 #define CLK_BASE__INST1_SEG0 0 macro
Dvega20_ip_offset.h215 #define CLK_BASE__INST1_SEG0 0 macro
Dnavi14_ip_offset.h241 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dnavi12_ip_offset.h241 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Ddimgrey_cavefish_ip_offset.h221 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dsienna_cichlid_ip_offset.h248 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dbeige_goby_ip_offset.h250 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Drenoir_ip_offset.h323 #define CLK_BASE__INST1_SEG0 0 macro
Dvega10_ip_offset.h1209 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dvangogh_ip_offset.h345 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Dyellow_carp_offset.h294 #define CLK_BASE__INST1_SEG0 0x00016E00 macro
Darct_ip_offset.h307 #define CLK_BASE__INST1_SEG0 0x000120E0 macro
Daldebaran_ip_offset.h324 #define CLK_BASE__INST1_SEG0 0x00016E00 macro