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Searched refs:CLK_APMIXED_MSDCPLL (Results 1 – 25 of 32) sorted by relevance

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/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8186-apmixedsys.c61 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x038C, 0x0398, 0,
132 FH(CLK_APMIXED_MSDCPLL, FH_MSDCPLL, 0x0118),
Dclk-mt6795-apmixedsys.c54 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x250, 0x25c, 0, 0, 21, 0x250, 4, 0x0, 0x254, 0),
106 FH(CLK_APMIXED_MSDCPLL, FH_MSDCPLL, 0x88),
Dclk-mt8173-apmixedsys.c71 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x250, 0x25c, 0, 0, 21, 0x250, 4, 0x0, 0x254, 0),
125 FH(CLK_APMIXED_MSDCPLL, FH_MSDCPLL, 0x88),
Dclk-mt8195-apmixedsys.c68 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0710, 0x0720, 0,
159 FH(CLK_APMIXED_MSDCPLL, FH_MSDCPLL, 0x118),
Dclk-mt8192-apmixedsys.c79 PLL_B(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035c, 0x00000000,
141 FH(CLK_APMIXED_MSDCPLL, FH_MSDCPLL, 0x118),
Dclk-mt7988-apmixed.c70 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0314, 0x0320, 0x00000001, 0, 0, 32, 0x0314, 4, 0, 0,
Dclk-mt8135-apmixedsys.c43 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x278, 0x290, 0x80000000, 0, 21, 0x278, 6, 0x0, 0x27c, 0),
Dclk-mt8188-apmixedsys.c63 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0514, 0x0520, 0,
Dclk-mt2712-apmixedsys.c96 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0270, 0x027C, 0x00000100,
Dclk-mt8365-apmixedsys.c91 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035C, 0x00000001, 0, 22,
Dclk-mt8183-apmixedsys.c129 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0,
/linux-6.12.1/include/dt-bindings/clock/
Dmt8135-clk.h113 #define CLK_APMIXED_MSDCPLL 6 macro
Dmediatek,mt7988-clk.h24 #define CLK_APMIXED_MSDCPLL 11 macro
Dmediatek,mt6795-clk.h145 #define CLK_APMIXED_MSDCPLL 4 macro
Dmt6797-clk.h111 #define CLK_APMIXED_MSDCPLL 4 macro
Dmt8173-clk.h161 #define CLK_APMIXED_MSDCPLL 6 macro
Dmt6765-clk.h17 #define CLK_APMIXED_MSDCPLL 7 macro
Dmediatek,mt8365-clk.h235 #define CLK_APMIXED_MSDCPLL 4 macro
Dmt6779-clk.h172 #define CLK_APMIXED_MSDCPLL 7 macro
Dmt2712-clk.h20 #define CLK_APMIXED_MSDCPLL 8 macro
Dmt8183-clk.h16 #define CLK_APMIXED_MSDCPLL 5 macro
Dmt8186-clk.h269 #define CLK_APMIXED_MSDCPLL 5 macro
Dmt2701-clk.h179 #define CLK_APMIXED_MSDCPLL 5 macro
Dmt8192-clk.h304 #define CLK_APMIXED_MSDCPLL 3 macro
Dmediatek,mt8188-clk.h301 #define CLK_APMIXED_MSDCPLL 1 macro

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