Searched refs:CLK_APMIXED_MPLL (Results 1 – 14 of 14) sorted by relevance
| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt6795-apmixedsys.c | 57 PLL(CLK_APMIXED_MPLL, "mpll", 0x280, 0x28c, 0, 0, 21, 0x280, 4, 0x0, 0x284, 0),
105 FH_M(CLK_APMIXED_MPLL, FH_MPLL, 0x74),
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| D | clk-mt8173-apmixedsys.c | 74 PLL(CLK_APMIXED_MPLL, "mpll", 0x280, 0x28c, 0, 0, 21, 0x280, 4, 0x0, 0x284, 0),
124 FH(CLK_APMIXED_MPLL, FH_MPLL, 0x74),
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| D | clk-mt7988-apmixed.c | 50 PLL(CLK_APMIXED_MPLL, "mpll", 0x0114, 0x0120, 0xff000001, HAVE_RST_BAR, 23, 32, 0x0114, 4,
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| D | clk-mt7986-apmixed.c | 55 PLL(CLK_APMIXED_MPLL, "mpll", 0x0260, 0x0270, 0x0, 0, 32, 0x0260,
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| D | clk-mt7981-apmixed.c | 57 PLL(CLK_APMIXED_MPLL, "mpll", 0x0260, 0x0270, 0x00000001, 0, 32,
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| D | clk-mt6765.c | 724 PLL(CLK_APMIXED_MPLL, "mpll", 0x02A0, 0x02AC, 0,
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt7986-clk.h | 18 #define CLK_APMIXED_MPLL 6 macro
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| D | mediatek,mt7981-clk.h | 194 #define CLK_APMIXED_MPLL 6 macro
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| D | mediatek,mt7988-clk.h | 14 #define CLK_APMIXED_MPLL 1 macro
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| D | mediatek,mt6795-clk.h | 148 #define CLK_APMIXED_MPLL 7 macro
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| D | mt8173-clk.h | 164 #define CLK_APMIXED_MPLL 9 macro
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| D | mt6765-clk.h | 19 #define CLK_APMIXED_MPLL 9 macro
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt6795-sony-xperia-m5.dts | 131 clocks = <&apmixedsys CLK_APMIXED_MAINPLL>, <&apmixedsys CLK_APMIXED_MPLL>,
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| D | mt7986a.dtsi | 383 assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
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