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Searched refs:CLK_APMIXED_MFGPLL (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8186-apmixedsys.c71 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0314, 0x0320, 0,
129 FH(CLK_APMIXED_MFGPLL, FH_MFGPLL, 0x00DC),
Dclk-mt8195-apmixedsys.c104 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0340, 0x0350, 0,
155 FH(CLK_APMIXED_MFGPLL, FH_MFGPLL, 0xb4),
Dclk-mt8192-apmixedsys.c85 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0268, 0x0274, 0x00000000,
138 FH(CLK_APMIXED_MFGPLL, FH_MFGPLL, 0xb4),
Dclk-mt8188-apmixedsys.c89 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0340, 0x034C, 0,
Dclk-mt8365-apmixedsys.c89 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0218, 0x0224, 0x00000001, 0, 22,
Dclk-mt8183-apmixedsys.c126 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0,
Dclk-mt6797.c631 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0x00000100, 0, 21,
Dclk-mt6779.c1196 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0250, 0x025C, 0,
Dclk-mt6765.c714 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x024C, 0x0258, 0,
/linux-6.12.1/include/dt-bindings/clock/
Dmt6797-clk.h110 #define CLK_APMIXED_MFGPLL 3 macro
Dmt6765-clk.h14 #define CLK_APMIXED_MFGPLL 4 macro
Dmediatek,mt8365-clk.h234 #define CLK_APMIXED_MFGPLL 3 macro
Dmt6779-clk.h175 #define CLK_APMIXED_MFGPLL 10 macro
Dmt8183-clk.h18 #define CLK_APMIXED_MFGPLL 7 macro
Dmt8186-clk.h274 #define CLK_APMIXED_MFGPLL 10 macro
Dmt8192-clk.h307 #define CLK_APMIXED_MFGPLL 6 macro
Dmediatek,mt8188-clk.h314 #define CLK_APMIXED_MFGPLL 14 macro
Dmt8195-clk.h380 #define CLK_APMIXED_MFGPLL 21 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8188.dtsi961 clocks = <&topckgen CLK_APMIXED_MFGPLL>,
Dmt8192.dtsi1432 clocks = <&apmixedsys CLK_APMIXED_MFGPLL>;
Dmt8195.dtsi543 clocks = <&apmixedsys CLK_APMIXED_MFGPLL>,