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Searched refs:CLK_APMIXED_AUD1PLL (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7622-clk.h175 #define CLK_APMIXED_AUD1PLL 5 macro
Dmt2701-clk.h181 #define CLK_APMIXED_AUD1PLL 7 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7622-apmixedsys.c69 PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x0324, 0x0330, 0,
Dclk-mt2701.c952 PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x270, 0x27c, 0x00000001, 0,