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Searched refs:CLK_48 (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/clk/renesas/
Dr9a06g032-clocks.c434 D_GATE(CLK_48_PG_F, "clk_48_pg_f", CLK_48, RB(0xf0, 12),
437 D_GATE(CLK_48_PG4, "clk_48_pg4", CLK_48, RB(0xf0, 9),
447 D_MODULE(HCLK_CAN0, "hclk_can0", CLK_48, RB(0xf0, 3),
450 D_MODULE(HCLK_CAN1, "hclk_can1", CLK_48, RB(0xf0, 6),
459 D_MODULE(HCLK_RSV, "hclk_rsv", CLK_48, RB(0xf0, 0),
/linux-6.12.1/sound/soc/codecs/
Drt5682s.c2513 #define CLK_48 48000 macro
2603 if (rt5682s->lrck[RT5682S_AIF1] != CLK_48 && in rt5682s_wclk_recalc_rate()
2606 __func__, clk_name, CLK_44, CLK_48); in rt5682s_wclk_recalc_rate()
2627 if (rate != CLK_48 && rate != CLK_44) { in rt5682s_wclk_round_rate()
2629 __func__, clk_name, CLK_44, CLK_48); in rt5682s_wclk_round_rate()
2630 rate = CLK_48; in rt5682s_wclk_round_rate()
2861 rt5682s->lrck[RT5682S_AIF1] = CLK_48; in rt5682s_dai_probe_clks()
Drt5682.c2572 #define CLK_48 48000 macro
2666 if (rt5682->lrck[RT5682_AIF1] != CLK_48 && in rt5682_wclk_recalc_rate()
2669 __func__, clk_name, CLK_44, CLK_48); in rt5682_wclk_recalc_rate()
2690 if (rate != CLK_48 && rate != CLK_44) { in rt5682_wclk_round_rate()
2692 __func__, clk_name, CLK_44, CLK_48); in rt5682_wclk_round_rate()
2693 rate = CLK_48; in rt5682_wclk_round_rate()