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Searched refs:CLKID_VCLK_DIV2 (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Daxg-clkc.h133 #define CLKID_VCLK_DIV2 123 macro
Dgxbb-clkc.h194 #define CLKID_VCLK_DIV2 186 macro
Damlogic,s4-peripherals-clkc.h59 #define CLKID_VCLK_DIV2 49 macro
Dmeson8b-clkc.h149 #define CLKID_VCLK_DIV2 142 macro
Dg12a-clkc.h160 #define CLKID_VCLK_DIV2 149 macro
/linux-6.12.1/drivers/clk/meson/
Dmeson8b.c2919 [CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3123 [CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3338 [CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
Dgxbb.c2912 [CLKID_VCLK_DIV2] = &gxbb_vclk_div2.hw,
3119 [CLKID_VCLK_DIV2] = &gxbb_vclk_div2.hw,
Dg12a.c4531 [CLKID_VCLK_DIV2] = &g12a_vclk_div2.hw,
4758 [CLKID_VCLK_DIV2] = &g12a_vclk_div2.hw,
5026 [CLKID_VCLK_DIV2] = &g12a_vclk_div2.hw,
Daxg.c2018 [CLKID_VCLK_DIV2] = &axg_vclk_div2.hw,
Ds4-peripherals.c3348 [CLKID_VCLK_DIV2] = &s4_vclk_div2.hw,