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Searched refs:CLKID_FCLK_DIV3 (Results 1 – 25 of 25) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Damlogic,a1-pll-clkc.h20 #define CLKID_FCLK_DIV3 7 macro
Damlogic,c3-pll-clkc.h17 #define CLKID_FCLK_DIV3 7 macro
Damlogic,s4-pll-clkc.h15 #define CLKID_FCLK_DIV3 5 macro
Daxg-clkc.h14 #define CLKID_FCLK_DIV3 3 macro
Dgxbb-clkc.h13 #define CLKID_FCLK_DIV3 5 macro
Dmeson8b-clkc.h13 #define CLKID_FCLK_DIV3 6 macro
Dg12a-clkc.h14 #define CLKID_FCLK_DIV3 3 macro
/linux-6.12.1/drivers/clk/meson/
Da1-pll.c282 [CLKID_FCLK_DIV3] = &fclk_div3.hw,
Dc3-pll.c631 [CLKID_FCLK_DIV3] = &fclk_div3.hw,
Ds4-pll.c742 [CLKID_FCLK_DIV3] = &s4_fclk_div3.hw,
Dmeson8b.c2784 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2988 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
3203 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
Dgxbb.c2738 [CLKID_FCLK_DIV3] = &gxbb_fclk_div3.hw,
2946 [CLKID_FCLK_DIV3] = &gxbb_fclk_div3.hw,
Dg12a.c4384 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,
4611 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,
4879 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,
Daxg.c1899 [CLKID_FCLK_DIV3] = &axg_fclk_div3.hw,
/linux-6.12.1/arch/arm64/boot/dts/amlogic/
Dmeson-g12.dtsi83 <&clkc CLKID_FCLK_DIV3>,
Dmeson-a1.dtsi302 <&clkc_pll CLKID_FCLK_DIV3>,
Damlogic-c3.dtsi127 <&clkc_pll CLKID_FCLK_DIV3>,
Dmeson-sm1.dtsi163 <&clkc CLKID_FCLK_DIV3>,
Dmeson-gxbb.dtsi773 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
Dmeson-gxl.dtsi843 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
Dmeson-s4.dtsi110 <&clkc_pll CLKID_FCLK_DIV3>,
Dmeson-axg.dtsi1343 <&clkc CLKID_FCLK_DIV3>,
Dmeson-g12-common.dtsi1658 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
/linux-6.12.1/arch/arm/boot/dts/amlogic/
Dmeson8b.dtsi704 <&clkc CLKID_FCLK_DIV3>,
Dmeson8.dtsi729 <&clkc CLKID_FCLK_DIV3>,