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Searched refs:CG_SPLL_FUNC_CNTL_2 (Results 1 – 22 of 22) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Drv740d.h34 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Drv730d.h37 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Drv770.c1142 tmp = RREG32(CG_SPLL_FUNC_CNTL_2); in rv770_set_clk_bypass_mode()
1145 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in rv770_set_clk_bypass_mode()
1154 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in rv770_set_clk_bypass_mode()
Drv740_dpm.c294 RREG32(CG_SPLL_FUNC_CNTL_2); in rv740_read_clock_registers()
Drv730_dpm.c202 RREG32(CG_SPLL_FUNC_CNTL_2); in rv730_read_clock_registers()
Drv770d.h100 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Dnid.h547 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Dsid.h94 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Dcikd.h257 #define CG_SPLL_FUNC_CNTL_2 0xC0500144 macro
Dsi.c3975 tmp = RREG32(CG_SPLL_FUNC_CNTL_2); in si_set_clk_bypass_mode()
3977 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in si_set_clk_bypass_mode()
3985 tmp = RREG32(CG_SPLL_FUNC_CNTL_2); in si_set_clk_bypass_mode()
3987 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in si_set_clk_bypass_mode()
Devergreend.h82 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
Drv770_dpm.c1525 RREG32(CG_SPLL_FUNC_CNTL_2); in rv770_read_clock_registers()
Dni_dpm.c1184 ni_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in ni_read_clock_registers()
Dci_dpm.c1835 RREG32_SMC(CG_SPLL_FUNC_CNTL_2); in ci_read_clock_registers()
Dsi_dpm.c3509 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in si_read_clock_registers()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi.c1338 tmp = RREG32(CG_SPLL_FUNC_CNTL_2); in si_set_clk_bypass_mode()
1340 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in si_set_clk_bypass_mode()
1348 tmp = RREG32(CG_SPLL_FUNC_CNTL_2); in si_set_clk_bypass_mode()
1350 WREG32(CG_SPLL_FUNC_CNTL_2, tmp); in si_set_clk_bypass_mode()
Dsid.h95 #define CG_SPLL_FUNC_CNTL_2 0x181 macro
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c1347 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2, in fiji_populate_smc_acpi_level()
Diceland_smumgr.c1466 CG_SPLL_FUNC_CNTL_2, SCLK_MUX_SEL, 4); in iceland_populate_smc_acpi_level()
Dci_smumgr.c1420 CG_SPLL_FUNC_CNTL_2, SCLK_MUX_SEL, 4); in ci_populate_smc_acpi_level()
Dtonga_smumgr.c1214 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2, in tonga_populate_smc_acpi_level()
/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c4027 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in si_read_clock_registers()