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Searched refs:CG_SCLK_DPM_CTRL (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Dsumo_dpm.c478 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
481 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
484 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
487 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
584 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
587 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
590 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
593 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
Dsumod.h182 #define CG_SCLK_DPM_CTRL 0x684 macro