Searched refs:CACHE_MODE_1 (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/i915/gvt/ |
| D | mmio_context.c | 74 {RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
106 {RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
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| D | handlers.c | 2247 MMIO_DFH(CACHE_MODE_1, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
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| /linux-6.12.1/drivers/gpu/drm/i915/gt/ |
| D | intel_workarounds.c | 381 wa_masked_en(wal, CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE); in gen8_ctx_workarounds_init()
467 wa_masked_en(wal, CACHE_MODE_1, in gen9_ctx_workarounds_init()
776 wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE); in dg2_ctx_workarounds_init()
824 wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE); in xelpg_ctx_workarounds_init()
2561 CACHE_MODE_1, in rcs_engine_wa_init()
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| D | gen7_renderclear.c | 405 batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1)); in emit_batch()
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| D | intel_gt_regs.h | 437 #define CACHE_MODE_1 _MMIO(0x7004) /* IVB+ */ macro
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| /linux-6.12.1/drivers/gpu/drm/xe/ |
| D | xe_wa.c | 627 XE_RTP_ACTIONS(SET(CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE))
648 XE_RTP_ACTIONS(SET(CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE))
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| /linux-6.12.1/drivers/gpu/drm/xe/regs/ |
| D | xe_gt_regs.h | 134 #define CACHE_MODE_1 XE_REG(0x7004, XE_REG_OPTION_MASKED) macro
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | intel_gvt_mmio_table.c | 101 MMIO_D(CACHE_MODE_1); in iterate_generic_mmio()
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