1  /* SPDX-License-Identifier: GPL-2.0-or-later */
2  /*
3      bt848.h - Bt848 register offsets
4  
5      Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
6  
7  */
8  
9  #ifndef _BT848_H_
10  #define _BT848_H_
11  
12  #ifndef PCI_VENDOR_ID_BROOKTREE
13  #define PCI_VENDOR_ID_BROOKTREE 0x109e
14  #endif
15  #ifndef PCI_DEVICE_ID_BT848
16  #define PCI_DEVICE_ID_BT848     0x350
17  #endif
18  #ifndef PCI_DEVICE_ID_BT849
19  #define PCI_DEVICE_ID_BT849     0x351
20  #endif
21  #ifndef PCI_DEVICE_ID_FUSION879
22  #define PCI_DEVICE_ID_FUSION879	0x36c
23  #endif
24  
25  #ifndef PCI_DEVICE_ID_BT878
26  #define PCI_DEVICE_ID_BT878     0x36e
27  #endif
28  #ifndef PCI_DEVICE_ID_BT879
29  #define PCI_DEVICE_ID_BT879     0x36f
30  #endif
31  
32  /* Brooktree 848 registers */
33  
34  #define BT848_DSTATUS          0x000
35  #define BT848_DSTATUS_PRES     (1<<7)
36  #define BT848_DSTATUS_HLOC     (1<<6)
37  #define BT848_DSTATUS_FIELD    (1<<5)
38  #define BT848_DSTATUS_NUML     (1<<4)
39  #define BT848_DSTATUS_CSEL     (1<<3)
40  #define BT848_DSTATUS_PLOCK    (1<<2)
41  #define BT848_DSTATUS_LOF      (1<<1)
42  #define BT848_DSTATUS_COF      (1<<0)
43  
44  #define BT848_IFORM            0x004
45  #define BT848_IFORM_HACTIVE    (1<<7)
46  #define BT848_IFORM_MUXSEL     (3<<5)
47  #define BT848_IFORM_MUX0       (2<<5)
48  #define BT848_IFORM_MUX1       (3<<5)
49  #define BT848_IFORM_MUX2       (1<<5)
50  #define BT848_IFORM_XTSEL      (3<<3)
51  #define BT848_IFORM_XT0        (1<<3)
52  #define BT848_IFORM_XT1        (2<<3)
53  #define BT848_IFORM_XTAUTO     (3<<3)
54  #define BT848_IFORM_XTBOTH     (3<<3)
55  #define BT848_IFORM_NTSC       1
56  #define BT848_IFORM_NTSC_J     2
57  #define BT848_IFORM_PAL_BDGHI  3
58  #define BT848_IFORM_PAL_M      4
59  #define BT848_IFORM_PAL_N      5
60  #define BT848_IFORM_SECAM      6
61  #define BT848_IFORM_PAL_NC     7
62  #define BT848_IFORM_AUTO       0
63  #define BT848_IFORM_NORM       7
64  
65  #define BT848_TDEC             0x008
66  #define BT848_TDEC_DEC_FIELD   (1<<7)
67  #define BT848_TDEC_FLDALIGN    (1<<6)
68  #define BT848_TDEC_DEC_RAT     (0x1f)
69  
70  #define BT848_E_CROP           0x00C
71  #define BT848_O_CROP           0x08C
72  
73  #define BT848_E_VDELAY_LO      0x010
74  #define BT848_O_VDELAY_LO      0x090
75  
76  #define BT848_E_VACTIVE_LO     0x014
77  #define BT848_O_VACTIVE_LO     0x094
78  
79  #define BT848_E_HDELAY_LO      0x018
80  #define BT848_O_HDELAY_LO      0x098
81  
82  #define BT848_E_HACTIVE_LO     0x01C
83  #define BT848_O_HACTIVE_LO     0x09C
84  
85  #define BT848_E_HSCALE_HI      0x020
86  #define BT848_O_HSCALE_HI      0x0A0
87  
88  #define BT848_E_HSCALE_LO      0x024
89  #define BT848_O_HSCALE_LO      0x0A4
90  
91  #define BT848_BRIGHT           0x028
92  
93  #define BT848_E_CONTROL        0x02C
94  #define BT848_O_CONTROL        0x0AC
95  #define BT848_CONTROL_LNOTCH    (1<<7)
96  #define BT848_CONTROL_COMP      (1<<6)
97  #define BT848_CONTROL_LDEC      (1<<5)
98  #define BT848_CONTROL_CBSENSE   (1<<4)
99  #define BT848_CONTROL_CON_MSB   (1<<2)
100  #define BT848_CONTROL_SAT_U_MSB (1<<1)
101  #define BT848_CONTROL_SAT_V_MSB (1<<0)
102  
103  #define BT848_CONTRAST_LO      0x030
104  #define BT848_SAT_U_LO         0x034
105  #define BT848_SAT_V_LO         0x038
106  #define BT848_HUE              0x03C
107  
108  #define BT848_E_SCLOOP         0x040
109  #define BT848_O_SCLOOP         0x0C0
110  #define BT848_SCLOOP_CAGC       (1<<6)
111  #define BT848_SCLOOP_CKILL      (1<<5)
112  #define BT848_SCLOOP_HFILT_AUTO (0<<3)
113  #define BT848_SCLOOP_HFILT_CIF  (1<<3)
114  #define BT848_SCLOOP_HFILT_QCIF (2<<3)
115  #define BT848_SCLOOP_HFILT_ICON (3<<3)
116  
117  #define BT848_SCLOOP_PEAK       (1<<7)
118  #define BT848_SCLOOP_HFILT_MINP (1<<3)
119  #define BT848_SCLOOP_HFILT_MEDP (2<<3)
120  #define BT848_SCLOOP_HFILT_MAXP (3<<3)
121  
122  
123  #define BT848_OFORM            0x048
124  #define BT848_OFORM_RANGE      (1<<7)
125  #define BT848_OFORM_CORE0      (0<<5)
126  #define BT848_OFORM_CORE8      (1<<5)
127  #define BT848_OFORM_CORE16     (2<<5)
128  #define BT848_OFORM_CORE32     (3<<5)
129  
130  #define BT848_E_VSCALE_HI      0x04C
131  #define BT848_O_VSCALE_HI      0x0CC
132  #define BT848_VSCALE_YCOMB     (1<<7)
133  #define BT848_VSCALE_COMB      (1<<6)
134  #define BT848_VSCALE_INT       (1<<5)
135  #define BT848_VSCALE_HI        15
136  
137  #define BT848_E_VSCALE_LO      0x050
138  #define BT848_O_VSCALE_LO      0x0D0
139  #define BT848_TEST             0x054
140  #define BT848_ADELAY           0x060
141  #define BT848_BDELAY           0x064
142  
143  #define BT848_ADC              0x068
144  #define BT848_ADC_RESERVED     (2<<6)
145  #define BT848_ADC_SYNC_T       (1<<5)
146  #define BT848_ADC_AGC_EN       (1<<4)
147  #define BT848_ADC_CLK_SLEEP    (1<<3)
148  #define BT848_ADC_Y_SLEEP      (1<<2)
149  #define BT848_ADC_C_SLEEP      (1<<1)
150  #define BT848_ADC_CRUSH        (1<<0)
151  
152  #define BT848_WC_UP            0x044
153  #define BT848_WC_DOWN          0x078
154  
155  #define BT848_E_VTC            0x06C
156  #define BT848_O_VTC            0x0EC
157  #define BT848_VTC_HSFMT        (1<<7)
158  #define BT848_VTC_VFILT_2TAP   0
159  #define BT848_VTC_VFILT_3TAP   1
160  #define BT848_VTC_VFILT_4TAP   2
161  #define BT848_VTC_VFILT_5TAP   3
162  
163  #define BT848_SRESET           0x07C
164  
165  #define BT848_COLOR_FMT             0x0D4
166  #define BT848_COLOR_FMT_O_RGB32     (0<<4)
167  #define BT848_COLOR_FMT_O_RGB24     (1<<4)
168  #define BT848_COLOR_FMT_O_RGB16     (2<<4)
169  #define BT848_COLOR_FMT_O_RGB15     (3<<4)
170  #define BT848_COLOR_FMT_O_YUY2      (4<<4)
171  #define BT848_COLOR_FMT_O_BtYUV     (5<<4)
172  #define BT848_COLOR_FMT_O_Y8        (6<<4)
173  #define BT848_COLOR_FMT_O_RGB8      (7<<4)
174  #define BT848_COLOR_FMT_O_YCrCb422  (8<<4)
175  #define BT848_COLOR_FMT_O_YCrCb411  (9<<4)
176  #define BT848_COLOR_FMT_O_RAW       (14<<4)
177  #define BT848_COLOR_FMT_E_RGB32     0
178  #define BT848_COLOR_FMT_E_RGB24     1
179  #define BT848_COLOR_FMT_E_RGB16     2
180  #define BT848_COLOR_FMT_E_RGB15     3
181  #define BT848_COLOR_FMT_E_YUY2      4
182  #define BT848_COLOR_FMT_E_BtYUV     5
183  #define BT848_COLOR_FMT_E_Y8        6
184  #define BT848_COLOR_FMT_E_RGB8      7
185  #define BT848_COLOR_FMT_E_YCrCb422  8
186  #define BT848_COLOR_FMT_E_YCrCb411  9
187  #define BT848_COLOR_FMT_E_RAW       14
188  
189  #define BT848_COLOR_FMT_RGB32       0x00
190  #define BT848_COLOR_FMT_RGB24       0x11
191  #define BT848_COLOR_FMT_RGB16       0x22
192  #define BT848_COLOR_FMT_RGB15       0x33
193  #define BT848_COLOR_FMT_YUY2        0x44
194  #define BT848_COLOR_FMT_BtYUV       0x55
195  #define BT848_COLOR_FMT_Y8          0x66
196  #define BT848_COLOR_FMT_RGB8        0x77
197  #define BT848_COLOR_FMT_YCrCb422    0x88
198  #define BT848_COLOR_FMT_YCrCb411    0x99
199  #define BT848_COLOR_FMT_RAW         0xee
200  
201  #define BT848_VTOTAL_LO             0xB0
202  #define BT848_VTOTAL_HI             0xB4
203  
204  #define BT848_COLOR_CTL                0x0D8
205  #define BT848_COLOR_CTL_EXT_FRMRATE    (1<<7)
206  #define BT848_COLOR_CTL_COLOR_BARS     (1<<6)
207  #define BT848_COLOR_CTL_RGB_DED        (1<<5)
208  #define BT848_COLOR_CTL_GAMMA          (1<<4)
209  #define BT848_COLOR_CTL_WSWAP_ODD      (1<<3)
210  #define BT848_COLOR_CTL_WSWAP_EVEN     (1<<2)
211  #define BT848_COLOR_CTL_BSWAP_ODD      (1<<1)
212  #define BT848_COLOR_CTL_BSWAP_EVEN     (1<<0)
213  
214  #define BT848_CAP_CTL                  0x0DC
215  #define BT848_CAP_CTL_DITH_FRAME       (1<<4)
216  #define BT848_CAP_CTL_CAPTURE_VBI_ODD  (1<<3)
217  #define BT848_CAP_CTL_CAPTURE_VBI_EVEN (1<<2)
218  #define BT848_CAP_CTL_CAPTURE_ODD      (1<<1)
219  #define BT848_CAP_CTL_CAPTURE_EVEN     (1<<0)
220  
221  #define BT848_VBI_PACK_SIZE    0x0E0
222  
223  #define BT848_VBI_PACK_DEL     0x0E4
224  #define BT848_VBI_PACK_DEL_VBI_HDELAY 0xfc
225  #define BT848_VBI_PACK_DEL_EXT_FRAME  2
226  #define BT848_VBI_PACK_DEL_VBI_PKT_HI 1
227  
228  
229  #define BT848_INT_STAT         0x100
230  #define BT848_INT_MASK         0x104
231  
232  #define BT848_INT_ETBF         (1<<23)
233  
234  #define BT848_RISC_VIDEO 1
235  #define BT848_RISC_TOP 2
236  #define BT848_RISC_VBI 4
237  
238  #define BT848_INT_RISCS   (0xf<<28)
239  #define BT848_INT_RISCS_VIDEO   (BT848_RISC_VIDEO << 28)
240  #define BT848_INT_RISCS_TOP   (BT848_RISC_TOP << 28)
241  #define BT848_INT_RISCS_VBI   (BT848_RISC_VBI << 28)
242  
243  #define BT848_INT_RISC_EN (1<<27)
244  #define BT848_INT_RACK    (1<<25)
245  #define BT848_INT_FIELD   (1<<24)
246  #define BT848_INT_SCERR   (1<<19)
247  #define BT848_INT_OCERR   (1<<18)
248  #define BT848_INT_PABORT  (1<<17)
249  #define BT848_INT_RIPERR  (1<<16)
250  #define BT848_INT_PPERR   (1<<15)
251  #define BT848_INT_FDSR    (1<<14)
252  #define BT848_INT_FTRGT   (1<<13)
253  #define BT848_INT_FBUS    (1<<12)
254  #define BT848_INT_RISCI   (1<<11)
255  #define BT848_INT_GPINT   (1<<9)
256  #define BT848_INT_I2CDONE (1<<8)
257  #define BT848_INT_VPRES   (1<<5)
258  #define BT848_INT_HLOCK   (1<<4)
259  #define BT848_INT_OFLOW   (1<<3)
260  #define BT848_INT_HSYNC   (1<<2)
261  #define BT848_INT_VSYNC   (1<<1)
262  #define BT848_INT_FMTCHG  (1<<0)
263  
264  
265  #define BT848_GPIO_DMA_CTL             0x10C
266  #define BT848_GPIO_DMA_CTL_GPINTC      (1<<15)
267  #define BT848_GPIO_DMA_CTL_GPINTI      (1<<14)
268  #define BT848_GPIO_DMA_CTL_GPWEC       (1<<13)
269  #define BT848_GPIO_DMA_CTL_GPIOMODE    (3<<11)
270  #define BT848_GPIO_DMA_CTL_GPCLKMODE   (1<<10)
271  #define BT848_GPIO_DMA_CTL_PLTP23_4    (0<<6)
272  #define BT848_GPIO_DMA_CTL_PLTP23_8    (1<<6)
273  #define BT848_GPIO_DMA_CTL_PLTP23_16   (2<<6)
274  #define BT848_GPIO_DMA_CTL_PLTP23_32   (3<<6)
275  #define BT848_GPIO_DMA_CTL_PLTP1_4     (0<<4)
276  #define BT848_GPIO_DMA_CTL_PLTP1_8     (1<<4)
277  #define BT848_GPIO_DMA_CTL_PLTP1_16    (2<<4)
278  #define BT848_GPIO_DMA_CTL_PLTP1_32    (3<<4)
279  #define BT848_GPIO_DMA_CTL_PKTP_4      (0<<2)
280  #define BT848_GPIO_DMA_CTL_PKTP_8      (1<<2)
281  #define BT848_GPIO_DMA_CTL_PKTP_16     (2<<2)
282  #define BT848_GPIO_DMA_CTL_PKTP_32     (3<<2)
283  #define BT848_GPIO_DMA_CTL_RISC_ENABLE (1<<1)
284  #define BT848_GPIO_DMA_CTL_FIFO_ENABLE (1<<0)
285  
286  #define BT848_I2C              0x110
287  #define BT878_I2C_MODE         (1<<7)
288  #define BT878_I2C_RATE         (1<<6)
289  #define BT878_I2C_NOSTOP       (1<<5)
290  #define BT878_I2C_NOSTART      (1<<4)
291  #define BT848_I2C_DIV          (0xf<<4)
292  #define BT848_I2C_SYNC         (1<<3)
293  #define BT848_I2C_W3B	       (1<<2)
294  #define BT848_I2C_SCL          (1<<1)
295  #define BT848_I2C_SDA          (1<<0)
296  
297  #define BT848_RISC_STRT_ADD    0x114
298  #define BT848_GPIO_OUT_EN      0x118
299  #define BT848_GPIO_REG_INP     0x11C
300  #define BT848_RISC_COUNT       0x120
301  #define BT848_GPIO_DATA        0x200
302  
303  
304  /* Bt848 RISC commands */
305  
306  /* only for the SYNC RISC command */
307  #define BT848_FIFO_STATUS_FM1  0x06
308  #define BT848_FIFO_STATUS_FM3  0x0e
309  #define BT848_FIFO_STATUS_SOL  0x02
310  #define BT848_FIFO_STATUS_EOL4 0x01
311  #define BT848_FIFO_STATUS_EOL3 0x0d
312  #define BT848_FIFO_STATUS_EOL2 0x09
313  #define BT848_FIFO_STATUS_EOL1 0x05
314  #define BT848_FIFO_STATUS_VRE  0x04
315  #define BT848_FIFO_STATUS_VRO  0x0c
316  #define BT848_FIFO_STATUS_PXV  0x00
317  
318  #define BT848_RISC_RESYNC      (1<<15)
319  
320  /* WRITE and SKIP */
321  /* disable which bytes of each DWORD */
322  #define BT848_RISC_BYTE0       (1U<<12)
323  #define BT848_RISC_BYTE1       (1U<<13)
324  #define BT848_RISC_BYTE2       (1U<<14)
325  #define BT848_RISC_BYTE3       (1U<<15)
326  #define BT848_RISC_BYTE_ALL    (0x0fU<<12)
327  #define BT848_RISC_BYTE_NONE   0
328  /* cause RISCI */
329  #define BT848_RISC_IRQ         (1U<<24)
330  /* RISC command is last one in this line */
331  #define BT848_RISC_EOL         (1U<<26)
332  /* RISC command is first one in this line */
333  #define BT848_RISC_SOL         (1U<<27)
334  
335  #define BT848_RISC_WRITE       (0x01U<<28)
336  #define BT848_RISC_SKIP        (0x02U<<28)
337  #define BT848_RISC_WRITEC      (0x05U<<28)
338  #define BT848_RISC_JUMP        (0x07U<<28)
339  #define BT848_RISC_SYNC        (0x08U<<28)
340  
341  #define BT848_RISC_WRITE123    (0x09U<<28)
342  #define BT848_RISC_SKIP123     (0x0aU<<28)
343  #define BT848_RISC_WRITE1S23   (0x0bU<<28)
344  
345  
346  /* Bt848A and higher only !! */
347  #define BT848_TGLB             0x080
348  #define BT848_TGCTRL           0x084
349  #define BT848_FCAP             0x0E8
350  #define BT848_PLL_F_LO         0x0F0
351  #define BT848_PLL_F_HI         0x0F4
352  
353  #define BT848_PLL_XCI          0x0F8
354  #define BT848_PLL_X            (1<<7)
355  #define BT848_PLL_C            (1<<6)
356  
357  #define BT848_DVSIF            0x0FC
358  
359  /* Bt878 register */
360  
361  #define BT878_DEVCTRL 0x40
362  #define BT878_EN_TBFX 0x02
363  #define BT878_EN_VSFX 0x04
364  
365  #endif
366