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Searched refs:BIOS_CMD_TABLE_PARA_REVISION (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/bios/
Dcommand_table.c46 #define BIOS_CMD_TABLE_PARA_REVISION(command)\ macro
121 BIOS_CMD_TABLE_PARA_REVISION(DIGxEncoderControl); in init_dig_encoder_control()
155 if (1 == BIOS_CMD_TABLE_PARA_REVISION(DIG1EncoderControl)) in init_encoder_control_dig_v1()
160 if (1 == BIOS_CMD_TABLE_PARA_REVISION(DIG2EncoderControl)) in init_encoder_control_dig_v1()
953 switch (BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)) { in init_set_pixel_clock()
968 BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)); in init_set_pixel_clock()
1298 switch (BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL)) { in init_enable_spread_spectrum_on_ppll()
1313 BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL)); in init_enable_spread_spectrum_on_ppll()
1501 switch (BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll)) { in init_adjust_display_pll()
1510 BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll)); in init_adjust_display_pll()
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Dcommand_table2.c58 #define BIOS_CMD_TABLE_PARA_REVISION(fname)\ macro
97 BIOS_CMD_TABLE_PARA_REVISION(digxencodercontrol); in init_dig_encoder_control()
406 switch (BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)) { in init_set_pixel_clock()
412 BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)); in init_set_pixel_clock()
549 BIOS_CMD_TABLE_PARA_REVISION(setcrtc_usingdtdtiming); in init_set_crtc_timing()
669 switch (BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)) { in init_enable_crtc()
675 BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)); in init_enable_crtc()
731 switch (BIOS_CMD_TABLE_PARA_REVISION(externalencodercontrol)) { in init_external_encoder_control()
771 switch (BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating)) { in init_enable_disp_power_gating()
778 BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating)); in init_enable_disp_power_gating()
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