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Searched refs:AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_2_1_sh_mask.h48175 #define AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT macro
Ddcn_3_1_5_sh_mask.h51353 #define AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT macro
Ddcn_2_0_0_sh_mask.h59462 #define AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT macro
Ddcn_3_2_0_sh_mask.h48216 #define AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_sh_mask.h56381 #define AZSTREAM3_OUTPUT_STREAM_DESCRIPTOR_FORMAT__SAMPLE_BASE_DIVISOR__SHIFT macro