Searched refs:AX45MP_CCTL_L2_PA_WB (Results 1 – 1 of 1) sorted by relevance
35 #define AX45MP_CCTL_L2_PA_WB 0x9 /* Write-back an L2 cache entry */ macro93 AX45MP_CCTL_L2_PA_WB); in ax45mp_cpu_dcache_wb_range()