Searched refs:AX45MP_CCTL_L1D_VA_WB (Results 1 – 1 of 1) sorted by relevance
25 #define AX45MP_CCTL_L1D_VA_WB 1 /* Write-back an L1 cache entry */ macro92 ax45mp_cpu_cache_operation(start, end, AX45MP_CCTL_L1D_VA_WB, in ax45mp_cpu_dcache_wb_range()