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Searched refs:AUX_REG_WRITE (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn20/
Ddcn20_link_encoder.c306 #define AUX_REG_WRITE(reg_name, val) \ macro
335 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control0_val); in enc2_hw_init()
337 AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, enc->ctx->dc_bios->golden_table.aux_dphy_tx_control_val); in enc2_hw_init()
339 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL1, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control1_val); in enc2_hw_init()
341 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc2_hw_init()
343 AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, 0x21c7a); in enc2_hw_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn30/
Ddcn30_dio_link_encoder.c214 #define AUX_REG_WRITE(reg_name, val) \ macro
243 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc3_hw_init()
245 AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, 0x21c7a); in enc3_hw_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn32/
Ddcn32_dio_link_encoder.c62 #define AUX_REG_WRITE(reg_name, val) \ macro
125 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc32_hw_init()
127 AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, 0x21c7a); in enc32_hw_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn401/
Ddcn401_dio_link_encoder.c61 #define AUX_REG_WRITE(reg_name, val) \ macro
95 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc401_hw_init()
97 AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, 0x21c7a); in enc401_hw_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn321/
Ddcn321_dio_link_encoder.c59 #define AUX_REG_WRITE(reg_name, val) \ macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn31/
Ddcn31_dio_link_encoder.c63 #define AUX_REG_WRITE(reg_name, val) \ macro