Searched refs:ATOM_PPLIB_CLASSIFICATION_UI_MASK (Results 1 – 19 of 19) sorted by relevance
46 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 macro
77 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 macro
684 ATOM_PPLIB_CLASSIFICATION_UI_MASK) >> ATOM_PPLIB_CLASSIFICATION_UI_SHIFT; in init_non_clock_fields()
3164 ATOM_PPLIB_CLASSIFICATION_UI_MASK) >> in vega10_get_pp_table_entry_callback_func()
3615 ATOM_PPLIB_CLASSIFICATION_UI_MASK) >> in smu7_get_pp_table_entry_callback_func_v1()
54 switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { in amdgpu_dpm_print_class_info()71 if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) && in amdgpu_dpm_print_class_info()822 ui_class = ps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK; in amdgpu_dpm_pick_power_state()
2283 if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in kv_apply_state_adjust_rules()
7242 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in si_parse_pplib_clock_info()
222 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 macro
71 switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { in r600_dpm_print_class_info()89 if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) && in r600_dpm_print_class_info()
1547 ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY)) in trinity_apply_state_adjust_rules()1557 … ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY)) { in trinity_apply_state_adjust_rules()
949 ui_class = ps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK; in radeon_dpm_pick_power_state()
2259 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in rv7xx_parse_pplib_clock_info()
2021 if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in kv_apply_state_adjust_rules()
789 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) in ci_apply_state_adjust_rules()5471 switch (rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { in ci_parse_pplib_clock_info()
3976 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in ni_parse_pplib_clock_info()
2416 switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { in radeon_atombios_parse_pplib_non_clock_info()
6735 if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == in si_parse_pplib_clock_info()
249 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 macro