Searched refs:AT91_PMC_PLL_ISR0 (Results 1 – 3 of 3) sorted by relevance
240 #define AT91_PMC_PLL_ISR0 0xEC /* PLL Interrupt Status Register 0 [SAM9X60 only] */ macro
61 regmap_read(regmap, AT91_PMC_PLL_ISR0, &status); in sam9x60_pll_ready()
795 3: ldr tmp1, [pmc, #AT91_PMC_PLL_ISR0]