1  /* SPDX-License-Identifier: GPL-2.0-only */
2  /*
3   * ARIZONA register definitions
4   *
5   * Copyright 2012 Wolfson Microelectronics plc
6   *
7   * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8   */
9  
10  #ifndef _ARIZONA_REGISTERS_H
11  #define _ARIZONA_REGISTERS_H
12  
13  /*
14   * Register values.
15   */
16  #define ARIZONA_SOFTWARE_RESET                   0x00
17  #define ARIZONA_DEVICE_REVISION                  0x01
18  #define ARIZONA_CTRL_IF_SPI_CFG_1                0x08
19  #define ARIZONA_CTRL_IF_I2C1_CFG_1               0x09
20  #define ARIZONA_CTRL_IF_I2C2_CFG_1               0x0A
21  #define ARIZONA_CTRL_IF_I2C1_CFG_2               0x0B
22  #define ARIZONA_CTRL_IF_I2C2_CFG_2               0x0C
23  #define ARIZONA_CTRL_IF_STATUS_1                 0x0D
24  #define ARIZONA_WRITE_SEQUENCER_CTRL_0           0x16
25  #define ARIZONA_WRITE_SEQUENCER_CTRL_1           0x17
26  #define ARIZONA_WRITE_SEQUENCER_CTRL_2           0x18
27  #define ARIZONA_WRITE_SEQUENCER_CTRL_3           0x19
28  #define ARIZONA_WRITE_SEQUENCER_PROM             0x1A
29  #define ARIZONA_TONE_GENERATOR_1                 0x20
30  #define ARIZONA_TONE_GENERATOR_2                 0x21
31  #define ARIZONA_TONE_GENERATOR_3                 0x22
32  #define ARIZONA_TONE_GENERATOR_4                 0x23
33  #define ARIZONA_TONE_GENERATOR_5                 0x24
34  #define ARIZONA_PWM_DRIVE_1                      0x30
35  #define ARIZONA_PWM_DRIVE_2                      0x31
36  #define ARIZONA_PWM_DRIVE_3                      0x32
37  #define ARIZONA_WAKE_CONTROL                     0x40
38  #define ARIZONA_SEQUENCE_CONTROL                 0x41
39  #define ARIZONA_SPARE_TRIGGERS                   0x42
40  #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1    0x61
41  #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2    0x62
42  #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3    0x63
43  #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4    0x64
44  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
45  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
46  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68
47  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69
48  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A
49  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B
50  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C
51  #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D
52  #define ARIZONA_COMFORT_NOISE_GENERATOR          0x70
53  #define ARIZONA_HAPTICS_CONTROL_1                0x90
54  #define ARIZONA_HAPTICS_CONTROL_2                0x91
55  #define ARIZONA_HAPTICS_PHASE_1_INTENSITY        0x92
56  #define ARIZONA_HAPTICS_PHASE_1_DURATION         0x93
57  #define ARIZONA_HAPTICS_PHASE_2_INTENSITY        0x94
58  #define ARIZONA_HAPTICS_PHASE_2_DURATION         0x95
59  #define ARIZONA_HAPTICS_PHASE_3_INTENSITY        0x96
60  #define ARIZONA_HAPTICS_PHASE_3_DURATION         0x97
61  #define ARIZONA_HAPTICS_STATUS                   0x98
62  #define ARIZONA_CLOCK_32K_1                      0x100
63  #define ARIZONA_SYSTEM_CLOCK_1                   0x101
64  #define ARIZONA_SAMPLE_RATE_1                    0x102
65  #define ARIZONA_SAMPLE_RATE_2                    0x103
66  #define ARIZONA_SAMPLE_RATE_3                    0x104
67  #define ARIZONA_SAMPLE_RATE_1_STATUS             0x10A
68  #define ARIZONA_SAMPLE_RATE_2_STATUS             0x10B
69  #define ARIZONA_SAMPLE_RATE_3_STATUS             0x10C
70  #define ARIZONA_ASYNC_CLOCK_1                    0x112
71  #define ARIZONA_ASYNC_SAMPLE_RATE_1              0x113
72  #define ARIZONA_ASYNC_SAMPLE_RATE_2              0x114
73  #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS       0x11B
74  #define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS       0x11C
75  #define ARIZONA_OUTPUT_SYSTEM_CLOCK              0x149
76  #define ARIZONA_OUTPUT_ASYNC_CLOCK               0x14A
77  #define ARIZONA_RATE_ESTIMATOR_1                 0x152
78  #define ARIZONA_RATE_ESTIMATOR_2                 0x153
79  #define ARIZONA_RATE_ESTIMATOR_3                 0x154
80  #define ARIZONA_RATE_ESTIMATOR_4                 0x155
81  #define ARIZONA_RATE_ESTIMATOR_5                 0x156
82  #define ARIZONA_DYNAMIC_FREQUENCY_SCALING_1      0x161
83  #define ARIZONA_FLL1_CONTROL_1                   0x171
84  #define ARIZONA_FLL1_CONTROL_2                   0x172
85  #define ARIZONA_FLL1_CONTROL_3                   0x173
86  #define ARIZONA_FLL1_CONTROL_4                   0x174
87  #define ARIZONA_FLL1_CONTROL_5                   0x175
88  #define ARIZONA_FLL1_CONTROL_6                   0x176
89  #define ARIZONA_FLL1_LOOP_FILTER_TEST_1          0x177
90  #define ARIZONA_FLL1_NCO_TEST_0                  0x178
91  #define ARIZONA_FLL1_CONTROL_7                   0x179
92  #define ARIZONA_FLL1_SYNCHRONISER_1              0x181
93  #define ARIZONA_FLL1_SYNCHRONISER_2              0x182
94  #define ARIZONA_FLL1_SYNCHRONISER_3              0x183
95  #define ARIZONA_FLL1_SYNCHRONISER_4              0x184
96  #define ARIZONA_FLL1_SYNCHRONISER_5              0x185
97  #define ARIZONA_FLL1_SYNCHRONISER_6              0x186
98  #define ARIZONA_FLL1_SYNCHRONISER_7              0x187
99  #define ARIZONA_FLL1_SPREAD_SPECTRUM             0x189
100  #define ARIZONA_FLL1_GPIO_CLOCK                  0x18A
101  #define ARIZONA_FLL2_CONTROL_1                   0x191
102  #define ARIZONA_FLL2_CONTROL_2                   0x192
103  #define ARIZONA_FLL2_CONTROL_3                   0x193
104  #define ARIZONA_FLL2_CONTROL_4                   0x194
105  #define ARIZONA_FLL2_CONTROL_5                   0x195
106  #define ARIZONA_FLL2_CONTROL_6                   0x196
107  #define ARIZONA_FLL2_LOOP_FILTER_TEST_1          0x197
108  #define ARIZONA_FLL2_NCO_TEST_0                  0x198
109  #define ARIZONA_FLL2_CONTROL_7                   0x199
110  #define ARIZONA_FLL2_SYNCHRONISER_1              0x1A1
111  #define ARIZONA_FLL2_SYNCHRONISER_2              0x1A2
112  #define ARIZONA_FLL2_SYNCHRONISER_3              0x1A3
113  #define ARIZONA_FLL2_SYNCHRONISER_4              0x1A4
114  #define ARIZONA_FLL2_SYNCHRONISER_5              0x1A5
115  #define ARIZONA_FLL2_SYNCHRONISER_6              0x1A6
116  #define ARIZONA_FLL2_SYNCHRONISER_7              0x1A7
117  #define ARIZONA_FLL2_SPREAD_SPECTRUM             0x1A9
118  #define ARIZONA_FLL2_GPIO_CLOCK                  0x1AA
119  #define ARIZONA_MIC_CHARGE_PUMP_1                0x200
120  #define ARIZONA_LDO1_CONTROL_1                   0x210
121  #define ARIZONA_LDO1_CONTROL_2                   0x212
122  #define ARIZONA_LDO2_CONTROL_1                   0x213
123  #define ARIZONA_MIC_BIAS_CTRL_1                  0x218
124  #define ARIZONA_MIC_BIAS_CTRL_2                  0x219
125  #define ARIZONA_MIC_BIAS_CTRL_3                  0x21A
126  #define ARIZONA_HP_CTRL_1L                       0x225
127  #define ARIZONA_HP_CTRL_1R                       0x226
128  #define ARIZONA_ACCESSORY_DETECT_MODE_1          0x293
129  #define ARIZONA_HEADPHONE_DETECT_1               0x29B
130  #define ARIZONA_HEADPHONE_DETECT_2               0x29C
131  #define ARIZONA_HP_DACVAL			 0x29F
132  #define ARIZONA_MICD_CLAMP_CONTROL               0x2A2
133  #define ARIZONA_MIC_DETECT_1                     0x2A3
134  #define ARIZONA_MIC_DETECT_2                     0x2A4
135  #define ARIZONA_MIC_DETECT_3                     0x2A5
136  #define ARIZONA_MIC_DETECT_LEVEL_1		 0x2A6
137  #define ARIZONA_MIC_DETECT_LEVEL_2		 0x2A7
138  #define ARIZONA_MIC_DETECT_LEVEL_3		 0x2A8
139  #define ARIZONA_MIC_DETECT_LEVEL_4		 0x2A9
140  #define ARIZONA_MIC_DETECT_4                     0x2AB
141  #define ARIZONA_MIC_NOISE_MIX_CONTROL_1          0x2C3
142  #define ARIZONA_ISOLATION_CONTROL                0x2CB
143  #define ARIZONA_JACK_DETECT_ANALOGUE             0x2D3
144  #define ARIZONA_INPUT_ENABLES                    0x300
145  #define ARIZONA_INPUT_ENABLES_STATUS             0x301
146  #define ARIZONA_INPUT_RATE                       0x308
147  #define ARIZONA_INPUT_VOLUME_RAMP                0x309
148  #define ARIZONA_HPF_CONTROL                      0x30C
149  #define ARIZONA_IN1L_CONTROL                     0x310
150  #define ARIZONA_ADC_DIGITAL_VOLUME_1L            0x311
151  #define ARIZONA_DMIC1L_CONTROL                   0x312
152  #define ARIZONA_IN1R_CONTROL                     0x314
153  #define ARIZONA_ADC_DIGITAL_VOLUME_1R            0x315
154  #define ARIZONA_DMIC1R_CONTROL                   0x316
155  #define ARIZONA_IN2L_CONTROL                     0x318
156  #define ARIZONA_ADC_DIGITAL_VOLUME_2L            0x319
157  #define ARIZONA_DMIC2L_CONTROL                   0x31A
158  #define ARIZONA_IN2R_CONTROL                     0x31C
159  #define ARIZONA_ADC_DIGITAL_VOLUME_2R            0x31D
160  #define ARIZONA_DMIC2R_CONTROL                   0x31E
161  #define ARIZONA_IN3L_CONTROL                     0x320
162  #define ARIZONA_ADC_DIGITAL_VOLUME_3L            0x321
163  #define ARIZONA_DMIC3L_CONTROL                   0x322
164  #define ARIZONA_IN3R_CONTROL                     0x324
165  #define ARIZONA_ADC_DIGITAL_VOLUME_3R            0x325
166  #define ARIZONA_DMIC3R_CONTROL                   0x326
167  #define ARIZONA_IN4L_CONTROL                     0x328
168  #define ARIZONA_ADC_DIGITAL_VOLUME_4L            0x329
169  #define ARIZONA_DMIC4L_CONTROL                   0x32A
170  #define ARIZONA_IN4R_CONTROL                     0x32C
171  #define ARIZONA_ADC_DIGITAL_VOLUME_4R            0x32D
172  #define ARIZONA_DMIC4R_CONTROL                   0x32E
173  #define ARIZONA_OUTPUT_ENABLES_1                 0x400
174  #define ARIZONA_OUTPUT_STATUS_1                  0x401
175  #define ARIZONA_RAW_OUTPUT_STATUS_1              0x406
176  #define ARIZONA_OUTPUT_RATE_1                    0x408
177  #define ARIZONA_OUTPUT_VOLUME_RAMP               0x409
178  #define ARIZONA_OUTPUT_PATH_CONFIG_1L            0x410
179  #define ARIZONA_DAC_DIGITAL_VOLUME_1L            0x411
180  #define ARIZONA_DAC_VOLUME_LIMIT_1L              0x412
181  #define ARIZONA_NOISE_GATE_SELECT_1L             0x413
182  #define ARIZONA_OUTPUT_PATH_CONFIG_1R            0x414
183  #define ARIZONA_DAC_DIGITAL_VOLUME_1R            0x415
184  #define ARIZONA_DAC_VOLUME_LIMIT_1R              0x416
185  #define ARIZONA_NOISE_GATE_SELECT_1R             0x417
186  #define ARIZONA_OUTPUT_PATH_CONFIG_2L            0x418
187  #define ARIZONA_DAC_DIGITAL_VOLUME_2L            0x419
188  #define ARIZONA_DAC_VOLUME_LIMIT_2L              0x41A
189  #define ARIZONA_NOISE_GATE_SELECT_2L             0x41B
190  #define ARIZONA_OUTPUT_PATH_CONFIG_2R            0x41C
191  #define ARIZONA_DAC_DIGITAL_VOLUME_2R            0x41D
192  #define ARIZONA_DAC_VOLUME_LIMIT_2R              0x41E
193  #define ARIZONA_NOISE_GATE_SELECT_2R             0x41F
194  #define ARIZONA_OUTPUT_PATH_CONFIG_3L            0x420
195  #define ARIZONA_DAC_DIGITAL_VOLUME_3L            0x421
196  #define ARIZONA_DAC_VOLUME_LIMIT_3L              0x422
197  #define ARIZONA_NOISE_GATE_SELECT_3L             0x423
198  #define ARIZONA_OUTPUT_PATH_CONFIG_3R            0x424
199  #define ARIZONA_DAC_DIGITAL_VOLUME_3R            0x425
200  #define ARIZONA_DAC_VOLUME_LIMIT_3R              0x426
201  #define ARIZONA_NOISE_GATE_SELECT_3R             0x427
202  #define ARIZONA_OUTPUT_PATH_CONFIG_4L            0x428
203  #define ARIZONA_DAC_DIGITAL_VOLUME_4L            0x429
204  #define ARIZONA_OUT_VOLUME_4L                    0x42A
205  #define ARIZONA_NOISE_GATE_SELECT_4L             0x42B
206  #define ARIZONA_OUTPUT_PATH_CONFIG_4R            0x42C
207  #define ARIZONA_DAC_DIGITAL_VOLUME_4R            0x42D
208  #define ARIZONA_OUT_VOLUME_4R                    0x42E
209  #define ARIZONA_NOISE_GATE_SELECT_4R             0x42F
210  #define ARIZONA_OUTPUT_PATH_CONFIG_5L            0x430
211  #define ARIZONA_DAC_DIGITAL_VOLUME_5L            0x431
212  #define ARIZONA_DAC_VOLUME_LIMIT_5L              0x432
213  #define ARIZONA_NOISE_GATE_SELECT_5L             0x433
214  #define ARIZONA_OUTPUT_PATH_CONFIG_5R            0x434
215  #define ARIZONA_DAC_DIGITAL_VOLUME_5R            0x435
216  #define ARIZONA_DAC_VOLUME_LIMIT_5R              0x436
217  #define ARIZONA_NOISE_GATE_SELECT_5R             0x437
218  #define ARIZONA_OUTPUT_PATH_CONFIG_6L            0x438
219  #define ARIZONA_DAC_DIGITAL_VOLUME_6L            0x439
220  #define ARIZONA_DAC_VOLUME_LIMIT_6L              0x43A
221  #define ARIZONA_NOISE_GATE_SELECT_6L             0x43B
222  #define ARIZONA_OUTPUT_PATH_CONFIG_6R            0x43C
223  #define ARIZONA_DAC_DIGITAL_VOLUME_6R            0x43D
224  #define ARIZONA_DAC_VOLUME_LIMIT_6R              0x43E
225  #define ARIZONA_NOISE_GATE_SELECT_6R             0x43F
226  #define ARIZONA_DRE_ENABLE                       0x440
227  #define ARIZONA_DRE_CONTROL_1                    0x441
228  #define ARIZONA_DRE_CONTROL_2                    0x442
229  #define ARIZONA_DRE_CONTROL_3                    0x443
230  #define ARIZONA_EDRE_ENABLE                      0x448
231  #define ARIZONA_DAC_AEC_CONTROL_1                0x450
232  #define ARIZONA_DAC_AEC_CONTROL_2                0x451
233  #define ARIZONA_NOISE_GATE_CONTROL               0x458
234  #define ARIZONA_PDM_SPK1_CTRL_1                  0x490
235  #define ARIZONA_PDM_SPK1_CTRL_2                  0x491
236  #define ARIZONA_PDM_SPK2_CTRL_1                  0x492
237  #define ARIZONA_PDM_SPK2_CTRL_2                  0x493
238  #define ARIZONA_HP_TEST_CTRL_13                  0x49A
239  #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL           0x4A0
240  #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL           0x4A1
241  #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL           0x4A2
242  #define ARIZONA_HP_TEST_CTRL_1                   0x4A4
243  #define ARIZONA_SPK_CTRL_2                       0x4B5
244  #define ARIZONA_SPK_CTRL_3                       0x4B6
245  #define ARIZONA_DAC_COMP_1                       0x4DC
246  #define ARIZONA_DAC_COMP_2                       0x4DD
247  #define ARIZONA_DAC_COMP_3                       0x4DE
248  #define ARIZONA_DAC_COMP_4                       0x4DF
249  #define ARIZONA_AIF1_BCLK_CTRL                   0x500
250  #define ARIZONA_AIF1_TX_PIN_CTRL                 0x501
251  #define ARIZONA_AIF1_RX_PIN_CTRL                 0x502
252  #define ARIZONA_AIF1_RATE_CTRL                   0x503
253  #define ARIZONA_AIF1_FORMAT                      0x504
254  #define ARIZONA_AIF1_TX_BCLK_RATE                0x505
255  #define ARIZONA_AIF1_RX_BCLK_RATE                0x506
256  #define ARIZONA_AIF1_FRAME_CTRL_1                0x507
257  #define ARIZONA_AIF1_FRAME_CTRL_2                0x508
258  #define ARIZONA_AIF1_FRAME_CTRL_3                0x509
259  #define ARIZONA_AIF1_FRAME_CTRL_4                0x50A
260  #define ARIZONA_AIF1_FRAME_CTRL_5                0x50B
261  #define ARIZONA_AIF1_FRAME_CTRL_6                0x50C
262  #define ARIZONA_AIF1_FRAME_CTRL_7                0x50D
263  #define ARIZONA_AIF1_FRAME_CTRL_8                0x50E
264  #define ARIZONA_AIF1_FRAME_CTRL_9                0x50F
265  #define ARIZONA_AIF1_FRAME_CTRL_10               0x510
266  #define ARIZONA_AIF1_FRAME_CTRL_11               0x511
267  #define ARIZONA_AIF1_FRAME_CTRL_12               0x512
268  #define ARIZONA_AIF1_FRAME_CTRL_13               0x513
269  #define ARIZONA_AIF1_FRAME_CTRL_14               0x514
270  #define ARIZONA_AIF1_FRAME_CTRL_15               0x515
271  #define ARIZONA_AIF1_FRAME_CTRL_16               0x516
272  #define ARIZONA_AIF1_FRAME_CTRL_17               0x517
273  #define ARIZONA_AIF1_FRAME_CTRL_18               0x518
274  #define ARIZONA_AIF1_TX_ENABLES                  0x519
275  #define ARIZONA_AIF1_RX_ENABLES                  0x51A
276  #define ARIZONA_AIF1_FORCE_WRITE                 0x51B
277  #define ARIZONA_AIF2_BCLK_CTRL                   0x540
278  #define ARIZONA_AIF2_TX_PIN_CTRL                 0x541
279  #define ARIZONA_AIF2_RX_PIN_CTRL                 0x542
280  #define ARIZONA_AIF2_RATE_CTRL                   0x543
281  #define ARIZONA_AIF2_FORMAT                      0x544
282  #define ARIZONA_AIF2_TX_BCLK_RATE                0x545
283  #define ARIZONA_AIF2_RX_BCLK_RATE                0x546
284  #define ARIZONA_AIF2_FRAME_CTRL_1                0x547
285  #define ARIZONA_AIF2_FRAME_CTRL_2                0x548
286  #define ARIZONA_AIF2_FRAME_CTRL_3                0x549
287  #define ARIZONA_AIF2_FRAME_CTRL_4                0x54A
288  #define ARIZONA_AIF2_FRAME_CTRL_5                0x54B
289  #define ARIZONA_AIF2_FRAME_CTRL_6                0x54C
290  #define ARIZONA_AIF2_FRAME_CTRL_7                0x54D
291  #define ARIZONA_AIF2_FRAME_CTRL_8                0x54E
292  #define ARIZONA_AIF2_FRAME_CTRL_11               0x551
293  #define ARIZONA_AIF2_FRAME_CTRL_12               0x552
294  #define ARIZONA_AIF2_FRAME_CTRL_13               0x553
295  #define ARIZONA_AIF2_FRAME_CTRL_14               0x554
296  #define ARIZONA_AIF2_FRAME_CTRL_15               0x555
297  #define ARIZONA_AIF2_FRAME_CTRL_16               0x556
298  #define ARIZONA_AIF2_TX_ENABLES                  0x559
299  #define ARIZONA_AIF2_RX_ENABLES                  0x55A
300  #define ARIZONA_AIF2_FORCE_WRITE                 0x55B
301  #define ARIZONA_AIF3_BCLK_CTRL                   0x580
302  #define ARIZONA_AIF3_TX_PIN_CTRL                 0x581
303  #define ARIZONA_AIF3_RX_PIN_CTRL                 0x582
304  #define ARIZONA_AIF3_RATE_CTRL                   0x583
305  #define ARIZONA_AIF3_FORMAT                      0x584
306  #define ARIZONA_AIF3_TX_BCLK_RATE                0x585
307  #define ARIZONA_AIF3_RX_BCLK_RATE                0x586
308  #define ARIZONA_AIF3_FRAME_CTRL_1                0x587
309  #define ARIZONA_AIF3_FRAME_CTRL_2                0x588
310  #define ARIZONA_AIF3_FRAME_CTRL_3                0x589
311  #define ARIZONA_AIF3_FRAME_CTRL_4                0x58A
312  #define ARIZONA_AIF3_FRAME_CTRL_11               0x591
313  #define ARIZONA_AIF3_FRAME_CTRL_12               0x592
314  #define ARIZONA_AIF3_TX_ENABLES                  0x599
315  #define ARIZONA_AIF3_RX_ENABLES                  0x59A
316  #define ARIZONA_AIF3_FORCE_WRITE                 0x59B
317  #define ARIZONA_SPD1_TX_CONTROL                  0x5C2
318  #define ARIZONA_SPD1_TX_CHANNEL_STATUS_1         0x5C3
319  #define ARIZONA_SPD1_TX_CHANNEL_STATUS_2         0x5C4
320  #define ARIZONA_SPD1_TX_CHANNEL_STATUS_3         0x5C5
321  #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR          0x5E3
322  #define ARIZONA_SLIMBUS_RATES_1                  0x5E5
323  #define ARIZONA_SLIMBUS_RATES_2                  0x5E6
324  #define ARIZONA_SLIMBUS_RATES_3                  0x5E7
325  #define ARIZONA_SLIMBUS_RATES_4                  0x5E8
326  #define ARIZONA_SLIMBUS_RATES_5                  0x5E9
327  #define ARIZONA_SLIMBUS_RATES_6                  0x5EA
328  #define ARIZONA_SLIMBUS_RATES_7                  0x5EB
329  #define ARIZONA_SLIMBUS_RATES_8                  0x5EC
330  #define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE        0x5F5
331  #define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE        0x5F6
332  #define ARIZONA_SLIMBUS_RX_PORT_STATUS           0x5F7
333  #define ARIZONA_SLIMBUS_TX_PORT_STATUS           0x5F8
334  #define ARIZONA_PWM1MIX_INPUT_1_SOURCE           0x640
335  #define ARIZONA_PWM1MIX_INPUT_1_VOLUME           0x641
336  #define ARIZONA_PWM1MIX_INPUT_2_SOURCE           0x642
337  #define ARIZONA_PWM1MIX_INPUT_2_VOLUME           0x643
338  #define ARIZONA_PWM1MIX_INPUT_3_SOURCE           0x644
339  #define ARIZONA_PWM1MIX_INPUT_3_VOLUME           0x645
340  #define ARIZONA_PWM1MIX_INPUT_4_SOURCE           0x646
341  #define ARIZONA_PWM1MIX_INPUT_4_VOLUME           0x647
342  #define ARIZONA_PWM2MIX_INPUT_1_SOURCE           0x648
343  #define ARIZONA_PWM2MIX_INPUT_1_VOLUME           0x649
344  #define ARIZONA_PWM2MIX_INPUT_2_SOURCE           0x64A
345  #define ARIZONA_PWM2MIX_INPUT_2_VOLUME           0x64B
346  #define ARIZONA_PWM2MIX_INPUT_3_SOURCE           0x64C
347  #define ARIZONA_PWM2MIX_INPUT_3_VOLUME           0x64D
348  #define ARIZONA_PWM2MIX_INPUT_4_SOURCE           0x64E
349  #define ARIZONA_PWM2MIX_INPUT_4_VOLUME           0x64F
350  #define ARIZONA_MICMIX_INPUT_1_SOURCE            0x660
351  #define ARIZONA_MICMIX_INPUT_1_VOLUME            0x661
352  #define ARIZONA_MICMIX_INPUT_2_SOURCE            0x662
353  #define ARIZONA_MICMIX_INPUT_2_VOLUME            0x663
354  #define ARIZONA_MICMIX_INPUT_3_SOURCE            0x664
355  #define ARIZONA_MICMIX_INPUT_3_VOLUME            0x665
356  #define ARIZONA_MICMIX_INPUT_4_SOURCE            0x666
357  #define ARIZONA_MICMIX_INPUT_4_VOLUME            0x667
358  #define ARIZONA_NOISEMIX_INPUT_1_SOURCE          0x668
359  #define ARIZONA_NOISEMIX_INPUT_1_VOLUME          0x669
360  #define ARIZONA_NOISEMIX_INPUT_2_SOURCE          0x66A
361  #define ARIZONA_NOISEMIX_INPUT_2_VOLUME          0x66B
362  #define ARIZONA_NOISEMIX_INPUT_3_SOURCE          0x66C
363  #define ARIZONA_NOISEMIX_INPUT_3_VOLUME          0x66D
364  #define ARIZONA_NOISEMIX_INPUT_4_SOURCE          0x66E
365  #define ARIZONA_NOISEMIX_INPUT_4_VOLUME          0x66F
366  #define ARIZONA_OUT1LMIX_INPUT_1_SOURCE          0x680
367  #define ARIZONA_OUT1LMIX_INPUT_1_VOLUME          0x681
368  #define ARIZONA_OUT1LMIX_INPUT_2_SOURCE          0x682
369  #define ARIZONA_OUT1LMIX_INPUT_2_VOLUME          0x683
370  #define ARIZONA_OUT1LMIX_INPUT_3_SOURCE          0x684
371  #define ARIZONA_OUT1LMIX_INPUT_3_VOLUME          0x685
372  #define ARIZONA_OUT1LMIX_INPUT_4_SOURCE          0x686
373  #define ARIZONA_OUT1LMIX_INPUT_4_VOLUME          0x687
374  #define ARIZONA_OUT1RMIX_INPUT_1_SOURCE          0x688
375  #define ARIZONA_OUT1RMIX_INPUT_1_VOLUME          0x689
376  #define ARIZONA_OUT1RMIX_INPUT_2_SOURCE          0x68A
377  #define ARIZONA_OUT1RMIX_INPUT_2_VOLUME          0x68B
378  #define ARIZONA_OUT1RMIX_INPUT_3_SOURCE          0x68C
379  #define ARIZONA_OUT1RMIX_INPUT_3_VOLUME          0x68D
380  #define ARIZONA_OUT1RMIX_INPUT_4_SOURCE          0x68E
381  #define ARIZONA_OUT1RMIX_INPUT_4_VOLUME          0x68F
382  #define ARIZONA_OUT2LMIX_INPUT_1_SOURCE          0x690
383  #define ARIZONA_OUT2LMIX_INPUT_1_VOLUME          0x691
384  #define ARIZONA_OUT2LMIX_INPUT_2_SOURCE          0x692
385  #define ARIZONA_OUT2LMIX_INPUT_2_VOLUME          0x693
386  #define ARIZONA_OUT2LMIX_INPUT_3_SOURCE          0x694
387  #define ARIZONA_OUT2LMIX_INPUT_3_VOLUME          0x695
388  #define ARIZONA_OUT2LMIX_INPUT_4_SOURCE          0x696
389  #define ARIZONA_OUT2LMIX_INPUT_4_VOLUME          0x697
390  #define ARIZONA_OUT2RMIX_INPUT_1_SOURCE          0x698
391  #define ARIZONA_OUT2RMIX_INPUT_1_VOLUME          0x699
392  #define ARIZONA_OUT2RMIX_INPUT_2_SOURCE          0x69A
393  #define ARIZONA_OUT2RMIX_INPUT_2_VOLUME          0x69B
394  #define ARIZONA_OUT2RMIX_INPUT_3_SOURCE          0x69C
395  #define ARIZONA_OUT2RMIX_INPUT_3_VOLUME          0x69D
396  #define ARIZONA_OUT2RMIX_INPUT_4_SOURCE          0x69E
397  #define ARIZONA_OUT2RMIX_INPUT_4_VOLUME          0x69F
398  #define ARIZONA_OUT3LMIX_INPUT_1_SOURCE          0x6A0
399  #define ARIZONA_OUT3LMIX_INPUT_1_VOLUME          0x6A1
400  #define ARIZONA_OUT3LMIX_INPUT_2_SOURCE          0x6A2
401  #define ARIZONA_OUT3LMIX_INPUT_2_VOLUME          0x6A3
402  #define ARIZONA_OUT3LMIX_INPUT_3_SOURCE          0x6A4
403  #define ARIZONA_OUT3LMIX_INPUT_3_VOLUME          0x6A5
404  #define ARIZONA_OUT3LMIX_INPUT_4_SOURCE          0x6A6
405  #define ARIZONA_OUT3LMIX_INPUT_4_VOLUME          0x6A7
406  #define ARIZONA_OUT3RMIX_INPUT_1_SOURCE          0x6A8
407  #define ARIZONA_OUT3RMIX_INPUT_1_VOLUME          0x6A9
408  #define ARIZONA_OUT3RMIX_INPUT_2_SOURCE          0x6AA
409  #define ARIZONA_OUT3RMIX_INPUT_2_VOLUME          0x6AB
410  #define ARIZONA_OUT3RMIX_INPUT_3_SOURCE          0x6AC
411  #define ARIZONA_OUT3RMIX_INPUT_3_VOLUME          0x6AD
412  #define ARIZONA_OUT3RMIX_INPUT_4_SOURCE          0x6AE
413  #define ARIZONA_OUT3RMIX_INPUT_4_VOLUME          0x6AF
414  #define ARIZONA_OUT4LMIX_INPUT_1_SOURCE          0x6B0
415  #define ARIZONA_OUT4LMIX_INPUT_1_VOLUME          0x6B1
416  #define ARIZONA_OUT4LMIX_INPUT_2_SOURCE          0x6B2
417  #define ARIZONA_OUT4LMIX_INPUT_2_VOLUME          0x6B3
418  #define ARIZONA_OUT4LMIX_INPUT_3_SOURCE          0x6B4
419  #define ARIZONA_OUT4LMIX_INPUT_3_VOLUME          0x6B5
420  #define ARIZONA_OUT4LMIX_INPUT_4_SOURCE          0x6B6
421  #define ARIZONA_OUT4LMIX_INPUT_4_VOLUME          0x6B7
422  #define ARIZONA_OUT4RMIX_INPUT_1_SOURCE          0x6B8
423  #define ARIZONA_OUT4RMIX_INPUT_1_VOLUME          0x6B9
424  #define ARIZONA_OUT4RMIX_INPUT_2_SOURCE          0x6BA
425  #define ARIZONA_OUT4RMIX_INPUT_2_VOLUME          0x6BB
426  #define ARIZONA_OUT4RMIX_INPUT_3_SOURCE          0x6BC
427  #define ARIZONA_OUT4RMIX_INPUT_3_VOLUME          0x6BD
428  #define ARIZONA_OUT4RMIX_INPUT_4_SOURCE          0x6BE
429  #define ARIZONA_OUT4RMIX_INPUT_4_VOLUME          0x6BF
430  #define ARIZONA_OUT5LMIX_INPUT_1_SOURCE          0x6C0
431  #define ARIZONA_OUT5LMIX_INPUT_1_VOLUME          0x6C1
432  #define ARIZONA_OUT5LMIX_INPUT_2_SOURCE          0x6C2
433  #define ARIZONA_OUT5LMIX_INPUT_2_VOLUME          0x6C3
434  #define ARIZONA_OUT5LMIX_INPUT_3_SOURCE          0x6C4
435  #define ARIZONA_OUT5LMIX_INPUT_3_VOLUME          0x6C5
436  #define ARIZONA_OUT5LMIX_INPUT_4_SOURCE          0x6C6
437  #define ARIZONA_OUT5LMIX_INPUT_4_VOLUME          0x6C7
438  #define ARIZONA_OUT5RMIX_INPUT_1_SOURCE          0x6C8
439  #define ARIZONA_OUT5RMIX_INPUT_1_VOLUME          0x6C9
440  #define ARIZONA_OUT5RMIX_INPUT_2_SOURCE          0x6CA
441  #define ARIZONA_OUT5RMIX_INPUT_2_VOLUME          0x6CB
442  #define ARIZONA_OUT5RMIX_INPUT_3_SOURCE          0x6CC
443  #define ARIZONA_OUT5RMIX_INPUT_3_VOLUME          0x6CD
444  #define ARIZONA_OUT5RMIX_INPUT_4_SOURCE          0x6CE
445  #define ARIZONA_OUT5RMIX_INPUT_4_VOLUME          0x6CF
446  #define ARIZONA_OUT6LMIX_INPUT_1_SOURCE          0x6D0
447  #define ARIZONA_OUT6LMIX_INPUT_1_VOLUME          0x6D1
448  #define ARIZONA_OUT6LMIX_INPUT_2_SOURCE          0x6D2
449  #define ARIZONA_OUT6LMIX_INPUT_2_VOLUME          0x6D3
450  #define ARIZONA_OUT6LMIX_INPUT_3_SOURCE          0x6D4
451  #define ARIZONA_OUT6LMIX_INPUT_3_VOLUME          0x6D5
452  #define ARIZONA_OUT6LMIX_INPUT_4_SOURCE          0x6D6
453  #define ARIZONA_OUT6LMIX_INPUT_4_VOLUME          0x6D7
454  #define ARIZONA_OUT6RMIX_INPUT_1_SOURCE          0x6D8
455  #define ARIZONA_OUT6RMIX_INPUT_1_VOLUME          0x6D9
456  #define ARIZONA_OUT6RMIX_INPUT_2_SOURCE          0x6DA
457  #define ARIZONA_OUT6RMIX_INPUT_2_VOLUME          0x6DB
458  #define ARIZONA_OUT6RMIX_INPUT_3_SOURCE          0x6DC
459  #define ARIZONA_OUT6RMIX_INPUT_3_VOLUME          0x6DD
460  #define ARIZONA_OUT6RMIX_INPUT_4_SOURCE          0x6DE
461  #define ARIZONA_OUT6RMIX_INPUT_4_VOLUME          0x6DF
462  #define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE        0x700
463  #define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME        0x701
464  #define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE        0x702
465  #define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME        0x703
466  #define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE        0x704
467  #define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME        0x705
468  #define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE        0x706
469  #define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME        0x707
470  #define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE        0x708
471  #define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME        0x709
472  #define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE        0x70A
473  #define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME        0x70B
474  #define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE        0x70C
475  #define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME        0x70D
476  #define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE        0x70E
477  #define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME        0x70F
478  #define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE        0x710
479  #define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME        0x711
480  #define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE        0x712
481  #define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME        0x713
482  #define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE        0x714
483  #define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME        0x715
484  #define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE        0x716
485  #define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME        0x717
486  #define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE        0x718
487  #define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME        0x719
488  #define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE        0x71A
489  #define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME        0x71B
490  #define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE        0x71C
491  #define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME        0x71D
492  #define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE        0x71E
493  #define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME        0x71F
494  #define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE        0x720
495  #define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME        0x721
496  #define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE        0x722
497  #define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME        0x723
498  #define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE        0x724
499  #define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME        0x725
500  #define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE        0x726
501  #define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME        0x727
502  #define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE        0x728
503  #define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME        0x729
504  #define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE        0x72A
505  #define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME        0x72B
506  #define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE        0x72C
507  #define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME        0x72D
508  #define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE        0x72E
509  #define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME        0x72F
510  #define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE        0x730
511  #define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME        0x731
512  #define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE        0x732
513  #define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME        0x733
514  #define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE        0x734
515  #define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME        0x735
516  #define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE        0x736
517  #define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME        0x737
518  #define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE        0x738
519  #define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME        0x739
520  #define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE        0x73A
521  #define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME        0x73B
522  #define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE        0x73C
523  #define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME        0x73D
524  #define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE        0x73E
525  #define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME        0x73F
526  #define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE        0x740
527  #define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME        0x741
528  #define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE        0x742
529  #define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME        0x743
530  #define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE        0x744
531  #define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME        0x745
532  #define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE        0x746
533  #define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME        0x747
534  #define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE        0x748
535  #define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME        0x749
536  #define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE        0x74A
537  #define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME        0x74B
538  #define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE        0x74C
539  #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME        0x74D
540  #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE        0x74E
541  #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME        0x74F
542  #define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE        0x750
543  #define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME        0x751
544  #define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE        0x752
545  #define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME        0x753
546  #define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE        0x754
547  #define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME        0x755
548  #define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE        0x756
549  #define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME        0x757
550  #define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE        0x758
551  #define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME        0x759
552  #define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE        0x75A
553  #define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME        0x75B
554  #define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE        0x75C
555  #define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME        0x75D
556  #define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE        0x75E
557  #define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME        0x75F
558  #define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE        0x760
559  #define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME        0x761
560  #define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE        0x762
561  #define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME        0x763
562  #define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE        0x764
563  #define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME        0x765
564  #define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE        0x766
565  #define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME        0x767
566  #define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE        0x768
567  #define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME        0x769
568  #define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE        0x76A
569  #define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME        0x76B
570  #define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE        0x76C
571  #define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME        0x76D
572  #define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE        0x76E
573  #define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME        0x76F
574  #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE        0x780
575  #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME        0x781
576  #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE        0x782
577  #define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME        0x783
578  #define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE        0x784
579  #define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME        0x785
580  #define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE        0x786
581  #define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME        0x787
582  #define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE        0x788
583  #define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME        0x789
584  #define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE        0x78A
585  #define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME        0x78B
586  #define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE        0x78C
587  #define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME        0x78D
588  #define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE        0x78E
589  #define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME        0x78F
590  #define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE        0x7C0
591  #define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME        0x7C1
592  #define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE        0x7C2
593  #define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME        0x7C3
594  #define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE        0x7C4
595  #define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME        0x7C5
596  #define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE        0x7C6
597  #define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME        0x7C7
598  #define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE        0x7C8
599  #define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME        0x7C9
600  #define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE        0x7CA
601  #define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME        0x7CB
602  #define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE        0x7CC
603  #define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME        0x7CD
604  #define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE        0x7CE
605  #define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME        0x7CF
606  #define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE        0x7D0
607  #define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME        0x7D1
608  #define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE        0x7D2
609  #define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME        0x7D3
610  #define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE        0x7D4
611  #define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME        0x7D5
612  #define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE        0x7D6
613  #define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME        0x7D7
614  #define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE        0x7D8
615  #define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME        0x7D9
616  #define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE        0x7DA
617  #define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME        0x7DB
618  #define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE        0x7DC
619  #define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME        0x7DD
620  #define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE        0x7DE
621  #define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME        0x7DF
622  #define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE        0x7E0
623  #define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME        0x7E1
624  #define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE        0x7E2
625  #define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME        0x7E3
626  #define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE        0x7E4
627  #define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME        0x7E5
628  #define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE        0x7E6
629  #define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME        0x7E7
630  #define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE        0x7E8
631  #define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME        0x7E9
632  #define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE        0x7EA
633  #define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME        0x7EB
634  #define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE        0x7EC
635  #define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME        0x7ED
636  #define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE        0x7EE
637  #define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME        0x7EF
638  #define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE        0x7F0
639  #define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME        0x7F1
640  #define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE        0x7F2
641  #define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME        0x7F3
642  #define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE        0x7F4
643  #define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME        0x7F5
644  #define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE        0x7F6
645  #define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME        0x7F7
646  #define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE        0x7F8
647  #define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME        0x7F9
648  #define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE        0x7FA
649  #define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME        0x7FB
650  #define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE        0x7FC
651  #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME        0x7FD
652  #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE        0x7FE
653  #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME        0x7FF
654  #define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE       0x800
655  #define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME       0x801
656  #define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE       0x808
657  #define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME       0x809
658  #define ARIZONA_EQ1MIX_INPUT_1_SOURCE            0x880
659  #define ARIZONA_EQ1MIX_INPUT_1_VOLUME            0x881
660  #define ARIZONA_EQ1MIX_INPUT_2_SOURCE            0x882
661  #define ARIZONA_EQ1MIX_INPUT_2_VOLUME            0x883
662  #define ARIZONA_EQ1MIX_INPUT_3_SOURCE            0x884
663  #define ARIZONA_EQ1MIX_INPUT_3_VOLUME            0x885
664  #define ARIZONA_EQ1MIX_INPUT_4_SOURCE            0x886
665  #define ARIZONA_EQ1MIX_INPUT_4_VOLUME            0x887
666  #define ARIZONA_EQ2MIX_INPUT_1_SOURCE            0x888
667  #define ARIZONA_EQ2MIX_INPUT_1_VOLUME            0x889
668  #define ARIZONA_EQ2MIX_INPUT_2_SOURCE            0x88A
669  #define ARIZONA_EQ2MIX_INPUT_2_VOLUME            0x88B
670  #define ARIZONA_EQ2MIX_INPUT_3_SOURCE            0x88C
671  #define ARIZONA_EQ2MIX_INPUT_3_VOLUME            0x88D
672  #define ARIZONA_EQ2MIX_INPUT_4_SOURCE            0x88E
673  #define ARIZONA_EQ2MIX_INPUT_4_VOLUME            0x88F
674  #define ARIZONA_EQ3MIX_INPUT_1_SOURCE            0x890
675  #define ARIZONA_EQ3MIX_INPUT_1_VOLUME            0x891
676  #define ARIZONA_EQ3MIX_INPUT_2_SOURCE            0x892
677  #define ARIZONA_EQ3MIX_INPUT_2_VOLUME            0x893
678  #define ARIZONA_EQ3MIX_INPUT_3_SOURCE            0x894
679  #define ARIZONA_EQ3MIX_INPUT_3_VOLUME            0x895
680  #define ARIZONA_EQ3MIX_INPUT_4_SOURCE            0x896
681  #define ARIZONA_EQ3MIX_INPUT_4_VOLUME            0x897
682  #define ARIZONA_EQ4MIX_INPUT_1_SOURCE            0x898
683  #define ARIZONA_EQ4MIX_INPUT_1_VOLUME            0x899
684  #define ARIZONA_EQ4MIX_INPUT_2_SOURCE            0x89A
685  #define ARIZONA_EQ4MIX_INPUT_2_VOLUME            0x89B
686  #define ARIZONA_EQ4MIX_INPUT_3_SOURCE            0x89C
687  #define ARIZONA_EQ4MIX_INPUT_3_VOLUME            0x89D
688  #define ARIZONA_EQ4MIX_INPUT_4_SOURCE            0x89E
689  #define ARIZONA_EQ4MIX_INPUT_4_VOLUME            0x89F
690  #define ARIZONA_DRC1LMIX_INPUT_1_SOURCE          0x8C0
691  #define ARIZONA_DRC1LMIX_INPUT_1_VOLUME          0x8C1
692  #define ARIZONA_DRC1LMIX_INPUT_2_SOURCE          0x8C2
693  #define ARIZONA_DRC1LMIX_INPUT_2_VOLUME          0x8C3
694  #define ARIZONA_DRC1LMIX_INPUT_3_SOURCE          0x8C4
695  #define ARIZONA_DRC1LMIX_INPUT_3_VOLUME          0x8C5
696  #define ARIZONA_DRC1LMIX_INPUT_4_SOURCE          0x8C6
697  #define ARIZONA_DRC1LMIX_INPUT_4_VOLUME          0x8C7
698  #define ARIZONA_DRC1RMIX_INPUT_1_SOURCE          0x8C8
699  #define ARIZONA_DRC1RMIX_INPUT_1_VOLUME          0x8C9
700  #define ARIZONA_DRC1RMIX_INPUT_2_SOURCE          0x8CA
701  #define ARIZONA_DRC1RMIX_INPUT_2_VOLUME          0x8CB
702  #define ARIZONA_DRC1RMIX_INPUT_3_SOURCE          0x8CC
703  #define ARIZONA_DRC1RMIX_INPUT_3_VOLUME          0x8CD
704  #define ARIZONA_DRC1RMIX_INPUT_4_SOURCE          0x8CE
705  #define ARIZONA_DRC1RMIX_INPUT_4_VOLUME          0x8CF
706  #define ARIZONA_DRC2LMIX_INPUT_1_SOURCE          0x8D0
707  #define ARIZONA_DRC2LMIX_INPUT_1_VOLUME          0x8D1
708  #define ARIZONA_DRC2LMIX_INPUT_2_SOURCE          0x8D2
709  #define ARIZONA_DRC2LMIX_INPUT_2_VOLUME          0x8D3
710  #define ARIZONA_DRC2LMIX_INPUT_3_SOURCE          0x8D4
711  #define ARIZONA_DRC2LMIX_INPUT_3_VOLUME          0x8D5
712  #define ARIZONA_DRC2LMIX_INPUT_4_SOURCE          0x8D6
713  #define ARIZONA_DRC2LMIX_INPUT_4_VOLUME          0x8D7
714  #define ARIZONA_DRC2RMIX_INPUT_1_SOURCE          0x8D8
715  #define ARIZONA_DRC2RMIX_INPUT_1_VOLUME          0x8D9
716  #define ARIZONA_DRC2RMIX_INPUT_2_SOURCE          0x8DA
717  #define ARIZONA_DRC2RMIX_INPUT_2_VOLUME          0x8DB
718  #define ARIZONA_DRC2RMIX_INPUT_3_SOURCE          0x8DC
719  #define ARIZONA_DRC2RMIX_INPUT_3_VOLUME          0x8DD
720  #define ARIZONA_DRC2RMIX_INPUT_4_SOURCE          0x8DE
721  #define ARIZONA_DRC2RMIX_INPUT_4_VOLUME          0x8DF
722  #define ARIZONA_HPLP1MIX_INPUT_1_SOURCE          0x900
723  #define ARIZONA_HPLP1MIX_INPUT_1_VOLUME          0x901
724  #define ARIZONA_HPLP1MIX_INPUT_2_SOURCE          0x902
725  #define ARIZONA_HPLP1MIX_INPUT_2_VOLUME          0x903
726  #define ARIZONA_HPLP1MIX_INPUT_3_SOURCE          0x904
727  #define ARIZONA_HPLP1MIX_INPUT_3_VOLUME          0x905
728  #define ARIZONA_HPLP1MIX_INPUT_4_SOURCE          0x906
729  #define ARIZONA_HPLP1MIX_INPUT_4_VOLUME          0x907
730  #define ARIZONA_HPLP2MIX_INPUT_1_SOURCE          0x908
731  #define ARIZONA_HPLP2MIX_INPUT_1_VOLUME          0x909
732  #define ARIZONA_HPLP2MIX_INPUT_2_SOURCE          0x90A
733  #define ARIZONA_HPLP2MIX_INPUT_2_VOLUME          0x90B
734  #define ARIZONA_HPLP2MIX_INPUT_3_SOURCE          0x90C
735  #define ARIZONA_HPLP2MIX_INPUT_3_VOLUME          0x90D
736  #define ARIZONA_HPLP2MIX_INPUT_4_SOURCE          0x90E
737  #define ARIZONA_HPLP2MIX_INPUT_4_VOLUME          0x90F
738  #define ARIZONA_HPLP3MIX_INPUT_1_SOURCE          0x910
739  #define ARIZONA_HPLP3MIX_INPUT_1_VOLUME          0x911
740  #define ARIZONA_HPLP3MIX_INPUT_2_SOURCE          0x912
741  #define ARIZONA_HPLP3MIX_INPUT_2_VOLUME          0x913
742  #define ARIZONA_HPLP3MIX_INPUT_3_SOURCE          0x914
743  #define ARIZONA_HPLP3MIX_INPUT_3_VOLUME          0x915
744  #define ARIZONA_HPLP3MIX_INPUT_4_SOURCE          0x916
745  #define ARIZONA_HPLP3MIX_INPUT_4_VOLUME          0x917
746  #define ARIZONA_HPLP4MIX_INPUT_1_SOURCE          0x918
747  #define ARIZONA_HPLP4MIX_INPUT_1_VOLUME          0x919
748  #define ARIZONA_HPLP4MIX_INPUT_2_SOURCE          0x91A
749  #define ARIZONA_HPLP4MIX_INPUT_2_VOLUME          0x91B
750  #define ARIZONA_HPLP4MIX_INPUT_3_SOURCE          0x91C
751  #define ARIZONA_HPLP4MIX_INPUT_3_VOLUME          0x91D
752  #define ARIZONA_HPLP4MIX_INPUT_4_SOURCE          0x91E
753  #define ARIZONA_HPLP4MIX_INPUT_4_VOLUME          0x91F
754  #define ARIZONA_DSP1LMIX_INPUT_1_SOURCE          0x940
755  #define ARIZONA_DSP1LMIX_INPUT_1_VOLUME          0x941
756  #define ARIZONA_DSP1LMIX_INPUT_2_SOURCE          0x942
757  #define ARIZONA_DSP1LMIX_INPUT_2_VOLUME          0x943
758  #define ARIZONA_DSP1LMIX_INPUT_3_SOURCE          0x944
759  #define ARIZONA_DSP1LMIX_INPUT_3_VOLUME          0x945
760  #define ARIZONA_DSP1LMIX_INPUT_4_SOURCE          0x946
761  #define ARIZONA_DSP1LMIX_INPUT_4_VOLUME          0x947
762  #define ARIZONA_DSP1RMIX_INPUT_1_SOURCE          0x948
763  #define ARIZONA_DSP1RMIX_INPUT_1_VOLUME          0x949
764  #define ARIZONA_DSP1RMIX_INPUT_2_SOURCE          0x94A
765  #define ARIZONA_DSP1RMIX_INPUT_2_VOLUME          0x94B
766  #define ARIZONA_DSP1RMIX_INPUT_3_SOURCE          0x94C
767  #define ARIZONA_DSP1RMIX_INPUT_3_VOLUME          0x94D
768  #define ARIZONA_DSP1RMIX_INPUT_4_SOURCE          0x94E
769  #define ARIZONA_DSP1RMIX_INPUT_4_VOLUME          0x94F
770  #define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE       0x950
771  #define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE       0x958
772  #define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE       0x960
773  #define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE       0x968
774  #define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE       0x970
775  #define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE       0x978
776  #define ARIZONA_DSP2LMIX_INPUT_1_SOURCE          0x980
777  #define ARIZONA_DSP2LMIX_INPUT_1_VOLUME          0x981
778  #define ARIZONA_DSP2LMIX_INPUT_2_SOURCE          0x982
779  #define ARIZONA_DSP2LMIX_INPUT_2_VOLUME          0x983
780  #define ARIZONA_DSP2LMIX_INPUT_3_SOURCE          0x984
781  #define ARIZONA_DSP2LMIX_INPUT_3_VOLUME          0x985
782  #define ARIZONA_DSP2LMIX_INPUT_4_SOURCE          0x986
783  #define ARIZONA_DSP2LMIX_INPUT_4_VOLUME          0x987
784  #define ARIZONA_DSP2RMIX_INPUT_1_SOURCE          0x988
785  #define ARIZONA_DSP2RMIX_INPUT_1_VOLUME          0x989
786  #define ARIZONA_DSP2RMIX_INPUT_2_SOURCE          0x98A
787  #define ARIZONA_DSP2RMIX_INPUT_2_VOLUME          0x98B
788  #define ARIZONA_DSP2RMIX_INPUT_3_SOURCE          0x98C
789  #define ARIZONA_DSP2RMIX_INPUT_3_VOLUME          0x98D
790  #define ARIZONA_DSP2RMIX_INPUT_4_SOURCE          0x98E
791  #define ARIZONA_DSP2RMIX_INPUT_4_VOLUME          0x98F
792  #define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE       0x990
793  #define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE       0x998
794  #define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE       0x9A0
795  #define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE       0x9A8
796  #define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE       0x9B0
797  #define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE       0x9B8
798  #define ARIZONA_DSP3LMIX_INPUT_1_SOURCE          0x9C0
799  #define ARIZONA_DSP3LMIX_INPUT_1_VOLUME          0x9C1
800  #define ARIZONA_DSP3LMIX_INPUT_2_SOURCE          0x9C2
801  #define ARIZONA_DSP3LMIX_INPUT_2_VOLUME          0x9C3
802  #define ARIZONA_DSP3LMIX_INPUT_3_SOURCE          0x9C4
803  #define ARIZONA_DSP3LMIX_INPUT_3_VOLUME          0x9C5
804  #define ARIZONA_DSP3LMIX_INPUT_4_SOURCE          0x9C6
805  #define ARIZONA_DSP3LMIX_INPUT_4_VOLUME          0x9C7
806  #define ARIZONA_DSP3RMIX_INPUT_1_SOURCE          0x9C8
807  #define ARIZONA_DSP3RMIX_INPUT_1_VOLUME          0x9C9
808  #define ARIZONA_DSP3RMIX_INPUT_2_SOURCE          0x9CA
809  #define ARIZONA_DSP3RMIX_INPUT_2_VOLUME          0x9CB
810  #define ARIZONA_DSP3RMIX_INPUT_3_SOURCE          0x9CC
811  #define ARIZONA_DSP3RMIX_INPUT_3_VOLUME          0x9CD
812  #define ARIZONA_DSP3RMIX_INPUT_4_SOURCE          0x9CE
813  #define ARIZONA_DSP3RMIX_INPUT_4_VOLUME          0x9CF
814  #define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE       0x9D0
815  #define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE       0x9D8
816  #define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE       0x9E0
817  #define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE       0x9E8
818  #define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE       0x9F0
819  #define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE       0x9F8
820  #define ARIZONA_DSP4LMIX_INPUT_1_SOURCE          0xA00
821  #define ARIZONA_DSP4LMIX_INPUT_1_VOLUME          0xA01
822  #define ARIZONA_DSP4LMIX_INPUT_2_SOURCE          0xA02
823  #define ARIZONA_DSP4LMIX_INPUT_2_VOLUME          0xA03
824  #define ARIZONA_DSP4LMIX_INPUT_3_SOURCE          0xA04
825  #define ARIZONA_DSP4LMIX_INPUT_3_VOLUME          0xA05
826  #define ARIZONA_DSP4LMIX_INPUT_4_SOURCE          0xA06
827  #define ARIZONA_DSP4LMIX_INPUT_4_VOLUME          0xA07
828  #define ARIZONA_DSP4RMIX_INPUT_1_SOURCE          0xA08
829  #define ARIZONA_DSP4RMIX_INPUT_1_VOLUME          0xA09
830  #define ARIZONA_DSP4RMIX_INPUT_2_SOURCE          0xA0A
831  #define ARIZONA_DSP4RMIX_INPUT_2_VOLUME          0xA0B
832  #define ARIZONA_DSP4RMIX_INPUT_3_SOURCE          0xA0C
833  #define ARIZONA_DSP4RMIX_INPUT_3_VOLUME          0xA0D
834  #define ARIZONA_DSP4RMIX_INPUT_4_SOURCE          0xA0E
835  #define ARIZONA_DSP4RMIX_INPUT_4_VOLUME          0xA0F
836  #define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE       0xA10
837  #define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE       0xA18
838  #define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE       0xA20
839  #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE       0xA28
840  #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE       0xA30
841  #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE       0xA38
842  #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE         0xA80
843  #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE         0xA88
844  #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE         0xA90
845  #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE         0xA98
846  #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE      0xB00
847  #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE      0xB08
848  #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE      0xB10
849  #define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE      0xB18
850  #define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE      0xB20
851  #define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE      0xB28
852  #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE      0xB30
853  #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE      0xB38
854  #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE      0xB40
855  #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE      0xB48
856  #define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE      0xB50
857  #define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE      0xB58
858  #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE      0xB60
859  #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE      0xB68
860  #define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE      0xB70
861  #define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE      0xB78
862  #define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE      0xB80
863  #define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE      0xB88
864  #define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE      0xB90
865  #define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE      0xB98
866  #define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE      0xBA0
867  #define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE      0xBA8
868  #define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE      0xBB0
869  #define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE      0xBB8
870  #define ARIZONA_GPIO1_CTRL                       0xC00
871  #define ARIZONA_GPIO2_CTRL                       0xC01
872  #define ARIZONA_GPIO3_CTRL                       0xC02
873  #define ARIZONA_GPIO4_CTRL                       0xC03
874  #define ARIZONA_GPIO5_CTRL                       0xC04
875  #define ARIZONA_IRQ_CTRL_1                       0xC0F
876  #define ARIZONA_GPIO_DEBOUNCE_CONFIG             0xC10
877  #define ARIZONA_GP_SWITCH_1                      0xC18
878  #define ARIZONA_MISC_PAD_CTRL_1                  0xC20
879  #define ARIZONA_MISC_PAD_CTRL_2                  0xC21
880  #define ARIZONA_MISC_PAD_CTRL_3                  0xC22
881  #define ARIZONA_MISC_PAD_CTRL_4                  0xC23
882  #define ARIZONA_MISC_PAD_CTRL_5                  0xC24
883  #define ARIZONA_MISC_PAD_CTRL_6                  0xC25
884  #define ARIZONA_MISC_PAD_CTRL_7                  0xC30
885  #define ARIZONA_MISC_PAD_CTRL_8                  0xC31
886  #define ARIZONA_MISC_PAD_CTRL_9                  0xC32
887  #define ARIZONA_MISC_PAD_CTRL_10                 0xC33
888  #define ARIZONA_MISC_PAD_CTRL_11                 0xC34
889  #define ARIZONA_MISC_PAD_CTRL_12                 0xC35
890  #define ARIZONA_MISC_PAD_CTRL_13                 0xC36
891  #define ARIZONA_MISC_PAD_CTRL_14                 0xC37
892  #define ARIZONA_MISC_PAD_CTRL_15                 0xC38
893  #define ARIZONA_MISC_PAD_CTRL_16                 0xC39
894  #define ARIZONA_MISC_PAD_CTRL_17                 0xC3A
895  #define ARIZONA_MISC_PAD_CTRL_18                 0xC3B
896  #define ARIZONA_INTERRUPT_STATUS_1               0xD00
897  #define ARIZONA_INTERRUPT_STATUS_2               0xD01
898  #define ARIZONA_INTERRUPT_STATUS_3               0xD02
899  #define ARIZONA_INTERRUPT_STATUS_4               0xD03
900  #define ARIZONA_INTERRUPT_STATUS_5               0xD04
901  #define ARIZONA_INTERRUPT_STATUS_6               0xD05
902  #define ARIZONA_INTERRUPT_STATUS_1_MASK          0xD08
903  #define ARIZONA_INTERRUPT_STATUS_2_MASK          0xD09
904  #define ARIZONA_INTERRUPT_STATUS_3_MASK          0xD0A
905  #define ARIZONA_INTERRUPT_STATUS_4_MASK          0xD0B
906  #define ARIZONA_INTERRUPT_STATUS_5_MASK          0xD0C
907  #define ARIZONA_INTERRUPT_STATUS_6_MASK          0xD0D
908  #define ARIZONA_INTERRUPT_CONTROL                0xD0F
909  #define ARIZONA_IRQ2_STATUS_1                    0xD10
910  #define ARIZONA_IRQ2_STATUS_2                    0xD11
911  #define ARIZONA_IRQ2_STATUS_3                    0xD12
912  #define ARIZONA_IRQ2_STATUS_4                    0xD13
913  #define ARIZONA_IRQ2_STATUS_5                    0xD14
914  #define ARIZONA_IRQ2_STATUS_6                    0xD15
915  #define ARIZONA_IRQ2_STATUS_1_MASK               0xD18
916  #define ARIZONA_IRQ2_STATUS_2_MASK               0xD19
917  #define ARIZONA_IRQ2_STATUS_3_MASK               0xD1A
918  #define ARIZONA_IRQ2_STATUS_4_MASK               0xD1B
919  #define ARIZONA_IRQ2_STATUS_5_MASK               0xD1C
920  #define ARIZONA_IRQ2_STATUS_6_MASK               0xD1D
921  #define ARIZONA_IRQ2_CONTROL                     0xD1F
922  #define ARIZONA_INTERRUPT_RAW_STATUS_2           0xD20
923  #define ARIZONA_INTERRUPT_RAW_STATUS_3           0xD21
924  #define ARIZONA_INTERRUPT_RAW_STATUS_4           0xD22
925  #define ARIZONA_INTERRUPT_RAW_STATUS_5           0xD23
926  #define ARIZONA_INTERRUPT_RAW_STATUS_6           0xD24
927  #define ARIZONA_INTERRUPT_RAW_STATUS_7           0xD25
928  #define ARIZONA_INTERRUPT_RAW_STATUS_8           0xD26
929  #define ARIZONA_INTERRUPT_RAW_STATUS_9           0xD28
930  #define ARIZONA_IRQ_PIN_STATUS                   0xD40
931  #define ARIZONA_ADSP2_IRQ0                       0xD41
932  #define ARIZONA_AOD_WKUP_AND_TRIG                0xD50
933  #define ARIZONA_AOD_IRQ1                         0xD51
934  #define ARIZONA_AOD_IRQ2                         0xD52
935  #define ARIZONA_AOD_IRQ_MASK_IRQ1                0xD53
936  #define ARIZONA_AOD_IRQ_MASK_IRQ2                0xD54
937  #define ARIZONA_AOD_IRQ_RAW_STATUS               0xD55
938  #define ARIZONA_JACK_DETECT_DEBOUNCE             0xD56
939  #define ARIZONA_FX_CTRL1                         0xE00
940  #define ARIZONA_FX_CTRL2                         0xE01
941  #define ARIZONA_EQ1_1                            0xE10
942  #define ARIZONA_EQ1_2                            0xE11
943  #define ARIZONA_EQ1_3                            0xE12
944  #define ARIZONA_EQ1_4                            0xE13
945  #define ARIZONA_EQ1_5                            0xE14
946  #define ARIZONA_EQ1_6                            0xE15
947  #define ARIZONA_EQ1_7                            0xE16
948  #define ARIZONA_EQ1_8                            0xE17
949  #define ARIZONA_EQ1_9                            0xE18
950  #define ARIZONA_EQ1_10                           0xE19
951  #define ARIZONA_EQ1_11                           0xE1A
952  #define ARIZONA_EQ1_12                           0xE1B
953  #define ARIZONA_EQ1_13                           0xE1C
954  #define ARIZONA_EQ1_14                           0xE1D
955  #define ARIZONA_EQ1_15                           0xE1E
956  #define ARIZONA_EQ1_16                           0xE1F
957  #define ARIZONA_EQ1_17                           0xE20
958  #define ARIZONA_EQ1_18                           0xE21
959  #define ARIZONA_EQ1_19                           0xE22
960  #define ARIZONA_EQ1_20                           0xE23
961  #define ARIZONA_EQ1_21                           0xE24
962  #define ARIZONA_EQ2_1                            0xE26
963  #define ARIZONA_EQ2_2                            0xE27
964  #define ARIZONA_EQ2_3                            0xE28
965  #define ARIZONA_EQ2_4                            0xE29
966  #define ARIZONA_EQ2_5                            0xE2A
967  #define ARIZONA_EQ2_6                            0xE2B
968  #define ARIZONA_EQ2_7                            0xE2C
969  #define ARIZONA_EQ2_8                            0xE2D
970  #define ARIZONA_EQ2_9                            0xE2E
971  #define ARIZONA_EQ2_10                           0xE2F
972  #define ARIZONA_EQ2_11                           0xE30
973  #define ARIZONA_EQ2_12                           0xE31
974  #define ARIZONA_EQ2_13                           0xE32
975  #define ARIZONA_EQ2_14                           0xE33
976  #define ARIZONA_EQ2_15                           0xE34
977  #define ARIZONA_EQ2_16                           0xE35
978  #define ARIZONA_EQ2_17                           0xE36
979  #define ARIZONA_EQ2_18                           0xE37
980  #define ARIZONA_EQ2_19                           0xE38
981  #define ARIZONA_EQ2_20                           0xE39
982  #define ARIZONA_EQ2_21                           0xE3A
983  #define ARIZONA_EQ3_1                            0xE3C
984  #define ARIZONA_EQ3_2                            0xE3D
985  #define ARIZONA_EQ3_3                            0xE3E
986  #define ARIZONA_EQ3_4                            0xE3F
987  #define ARIZONA_EQ3_5                            0xE40
988  #define ARIZONA_EQ3_6                            0xE41
989  #define ARIZONA_EQ3_7                            0xE42
990  #define ARIZONA_EQ3_8                            0xE43
991  #define ARIZONA_EQ3_9                            0xE44
992  #define ARIZONA_EQ3_10                           0xE45
993  #define ARIZONA_EQ3_11                           0xE46
994  #define ARIZONA_EQ3_12                           0xE47
995  #define ARIZONA_EQ3_13                           0xE48
996  #define ARIZONA_EQ3_14                           0xE49
997  #define ARIZONA_EQ3_15                           0xE4A
998  #define ARIZONA_EQ3_16                           0xE4B
999  #define ARIZONA_EQ3_17                           0xE4C
1000  #define ARIZONA_EQ3_18                           0xE4D
1001  #define ARIZONA_EQ3_19                           0xE4E
1002  #define ARIZONA_EQ3_20                           0xE4F
1003  #define ARIZONA_EQ3_21                           0xE50
1004  #define ARIZONA_EQ4_1                            0xE52
1005  #define ARIZONA_EQ4_2                            0xE53
1006  #define ARIZONA_EQ4_3                            0xE54
1007  #define ARIZONA_EQ4_4                            0xE55
1008  #define ARIZONA_EQ4_5                            0xE56
1009  #define ARIZONA_EQ4_6                            0xE57
1010  #define ARIZONA_EQ4_7                            0xE58
1011  #define ARIZONA_EQ4_8                            0xE59
1012  #define ARIZONA_EQ4_9                            0xE5A
1013  #define ARIZONA_EQ4_10                           0xE5B
1014  #define ARIZONA_EQ4_11                           0xE5C
1015  #define ARIZONA_EQ4_12                           0xE5D
1016  #define ARIZONA_EQ4_13                           0xE5E
1017  #define ARIZONA_EQ4_14                           0xE5F
1018  #define ARIZONA_EQ4_15                           0xE60
1019  #define ARIZONA_EQ4_16                           0xE61
1020  #define ARIZONA_EQ4_17                           0xE62
1021  #define ARIZONA_EQ4_18                           0xE63
1022  #define ARIZONA_EQ4_19                           0xE64
1023  #define ARIZONA_EQ4_20                           0xE65
1024  #define ARIZONA_EQ4_21                           0xE66
1025  #define ARIZONA_DRC1_CTRL1                       0xE80
1026  #define ARIZONA_DRC1_CTRL2                       0xE81
1027  #define ARIZONA_DRC1_CTRL3                       0xE82
1028  #define ARIZONA_DRC1_CTRL4                       0xE83
1029  #define ARIZONA_DRC1_CTRL5                       0xE84
1030  #define ARIZONA_DRC2_CTRL1                       0xE89
1031  #define ARIZONA_DRC2_CTRL2                       0xE8A
1032  #define ARIZONA_DRC2_CTRL3                       0xE8B
1033  #define ARIZONA_DRC2_CTRL4                       0xE8C
1034  #define ARIZONA_DRC2_CTRL5                       0xE8D
1035  #define ARIZONA_HPLPF1_1                         0xEC0
1036  #define ARIZONA_HPLPF1_2                         0xEC1
1037  #define ARIZONA_HPLPF2_1                         0xEC4
1038  #define ARIZONA_HPLPF2_2                         0xEC5
1039  #define ARIZONA_HPLPF3_1                         0xEC8
1040  #define ARIZONA_HPLPF3_2                         0xEC9
1041  #define ARIZONA_HPLPF4_1                         0xECC
1042  #define ARIZONA_HPLPF4_2                         0xECD
1043  #define ARIZONA_ASRC_ENABLE                      0xEE0
1044  #define ARIZONA_ASRC_STATUS                      0xEE1
1045  #define ARIZONA_ASRC_RATE1                       0xEE2
1046  #define ARIZONA_ASRC_RATE2                       0xEE3
1047  #define ARIZONA_ISRC_1_CTRL_1                    0xEF0
1048  #define ARIZONA_ISRC_1_CTRL_2                    0xEF1
1049  #define ARIZONA_ISRC_1_CTRL_3                    0xEF2
1050  #define ARIZONA_ISRC_2_CTRL_1                    0xEF3
1051  #define ARIZONA_ISRC_2_CTRL_2                    0xEF4
1052  #define ARIZONA_ISRC_2_CTRL_3                    0xEF5
1053  #define ARIZONA_ISRC_3_CTRL_1                    0xEF6
1054  #define ARIZONA_ISRC_3_CTRL_2                    0xEF7
1055  #define ARIZONA_ISRC_3_CTRL_3                    0xEF8
1056  #define ARIZONA_CLOCK_CONTROL                    0xF00
1057  #define ARIZONA_ANC_SRC                          0xF01
1058  #define ARIZONA_DSP_STATUS                       0xF02
1059  #define ARIZONA_ANC_COEFF_START                  0xF08
1060  #define ARIZONA_ANC_COEFF_END                    0xF12
1061  #define ARIZONA_FCL_FILTER_CONTROL               0xF15
1062  #define ARIZONA_FCL_ADC_REFORMATTER_CONTROL      0xF17
1063  #define ARIZONA_FCL_COEFF_START                  0xF18
1064  #define ARIZONA_FCL_COEFF_END                    0xF69
1065  #define ARIZONA_FCR_FILTER_CONTROL               0xF70
1066  #define ARIZONA_FCR_ADC_REFORMATTER_CONTROL      0xF72
1067  #define ARIZONA_FCR_COEFF_START                  0xF73
1068  #define ARIZONA_FCR_COEFF_END                    0xFC4
1069  #define ARIZONA_DSP1_CONTROL_1                   0x1100
1070  #define ARIZONA_DSP1_CLOCKING_1                  0x1101
1071  #define ARIZONA_DSP1_STATUS_1                    0x1104
1072  #define ARIZONA_DSP1_STATUS_2                    0x1105
1073  #define ARIZONA_DSP1_STATUS_3                    0x1106
1074  #define ARIZONA_DSP1_STATUS_4                    0x1107
1075  #define ARIZONA_DSP1_WDMA_BUFFER_1               0x1110
1076  #define ARIZONA_DSP1_WDMA_BUFFER_2               0x1111
1077  #define ARIZONA_DSP1_WDMA_BUFFER_3               0x1112
1078  #define ARIZONA_DSP1_WDMA_BUFFER_4               0x1113
1079  #define ARIZONA_DSP1_WDMA_BUFFER_5               0x1114
1080  #define ARIZONA_DSP1_WDMA_BUFFER_6               0x1115
1081  #define ARIZONA_DSP1_WDMA_BUFFER_7               0x1116
1082  #define ARIZONA_DSP1_WDMA_BUFFER_8               0x1117
1083  #define ARIZONA_DSP1_RDMA_BUFFER_1               0x1120
1084  #define ARIZONA_DSP1_RDMA_BUFFER_2               0x1121
1085  #define ARIZONA_DSP1_RDMA_BUFFER_3               0x1122
1086  #define ARIZONA_DSP1_RDMA_BUFFER_4               0x1123
1087  #define ARIZONA_DSP1_RDMA_BUFFER_5               0x1124
1088  #define ARIZONA_DSP1_RDMA_BUFFER_6               0x1125
1089  #define ARIZONA_DSP1_WDMA_CONFIG_1               0x1130
1090  #define ARIZONA_DSP1_WDMA_CONFIG_2               0x1131
1091  #define ARIZONA_DSP1_WDMA_OFFSET_1               0x1132
1092  #define ARIZONA_DSP1_RDMA_CONFIG_1               0x1134
1093  #define ARIZONA_DSP1_RDMA_OFFSET_1               0x1135
1094  #define ARIZONA_DSP1_EXTERNAL_START_SELECT_1     0x1138
1095  #define ARIZONA_DSP1_SCRATCH_0                   0x1140
1096  #define ARIZONA_DSP1_SCRATCH_1                   0x1141
1097  #define ARIZONA_DSP1_SCRATCH_2                   0x1142
1098  #define ARIZONA_DSP1_SCRATCH_3                   0x1143
1099  #define ARIZONA_DSP2_CONTROL_1                   0x1200
1100  #define ARIZONA_DSP2_CLOCKING_1                  0x1201
1101  #define ARIZONA_DSP2_STATUS_1                    0x1204
1102  #define ARIZONA_DSP2_STATUS_2                    0x1205
1103  #define ARIZONA_DSP2_STATUS_3                    0x1206
1104  #define ARIZONA_DSP2_STATUS_4                    0x1207
1105  #define ARIZONA_DSP2_WDMA_BUFFER_1               0x1210
1106  #define ARIZONA_DSP2_WDMA_BUFFER_2               0x1211
1107  #define ARIZONA_DSP2_WDMA_BUFFER_3               0x1212
1108  #define ARIZONA_DSP2_WDMA_BUFFER_4               0x1213
1109  #define ARIZONA_DSP2_WDMA_BUFFER_5               0x1214
1110  #define ARIZONA_DSP2_WDMA_BUFFER_6               0x1215
1111  #define ARIZONA_DSP2_WDMA_BUFFER_7               0x1216
1112  #define ARIZONA_DSP2_WDMA_BUFFER_8               0x1217
1113  #define ARIZONA_DSP2_RDMA_BUFFER_1               0x1220
1114  #define ARIZONA_DSP2_RDMA_BUFFER_2               0x1221
1115  #define ARIZONA_DSP2_RDMA_BUFFER_3               0x1222
1116  #define ARIZONA_DSP2_RDMA_BUFFER_4               0x1223
1117  #define ARIZONA_DSP2_RDMA_BUFFER_5               0x1224
1118  #define ARIZONA_DSP2_RDMA_BUFFER_6               0x1225
1119  #define ARIZONA_DSP2_WDMA_CONFIG_1               0x1230
1120  #define ARIZONA_DSP2_WDMA_CONFIG_2               0x1231
1121  #define ARIZONA_DSP2_WDMA_OFFSET_1               0x1232
1122  #define ARIZONA_DSP2_RDMA_CONFIG_1               0x1234
1123  #define ARIZONA_DSP2_RDMA_OFFSET_1               0x1235
1124  #define ARIZONA_DSP2_EXTERNAL_START_SELECT_1     0x1238
1125  #define ARIZONA_DSP2_SCRATCH_0                   0x1240
1126  #define ARIZONA_DSP2_SCRATCH_1                   0x1241
1127  #define ARIZONA_DSP2_SCRATCH_2                   0x1242
1128  #define ARIZONA_DSP2_SCRATCH_3                   0x1243
1129  #define ARIZONA_DSP3_CONTROL_1                   0x1300
1130  #define ARIZONA_DSP3_CLOCKING_1                  0x1301
1131  #define ARIZONA_DSP3_STATUS_1                    0x1304
1132  #define ARIZONA_DSP3_STATUS_2                    0x1305
1133  #define ARIZONA_DSP3_STATUS_3                    0x1306
1134  #define ARIZONA_DSP3_STATUS_4                    0x1307
1135  #define ARIZONA_DSP3_WDMA_BUFFER_1               0x1310
1136  #define ARIZONA_DSP3_WDMA_BUFFER_2               0x1311
1137  #define ARIZONA_DSP3_WDMA_BUFFER_3               0x1312
1138  #define ARIZONA_DSP3_WDMA_BUFFER_4               0x1313
1139  #define ARIZONA_DSP3_WDMA_BUFFER_5               0x1314
1140  #define ARIZONA_DSP3_WDMA_BUFFER_6               0x1315
1141  #define ARIZONA_DSP3_WDMA_BUFFER_7               0x1316
1142  #define ARIZONA_DSP3_WDMA_BUFFER_8               0x1317
1143  #define ARIZONA_DSP3_RDMA_BUFFER_1               0x1320
1144  #define ARIZONA_DSP3_RDMA_BUFFER_2               0x1321
1145  #define ARIZONA_DSP3_RDMA_BUFFER_3               0x1322
1146  #define ARIZONA_DSP3_RDMA_BUFFER_4               0x1323
1147  #define ARIZONA_DSP3_RDMA_BUFFER_5               0x1324
1148  #define ARIZONA_DSP3_RDMA_BUFFER_6               0x1325
1149  #define ARIZONA_DSP3_WDMA_CONFIG_1               0x1330
1150  #define ARIZONA_DSP3_WDMA_CONFIG_2               0x1331
1151  #define ARIZONA_DSP3_WDMA_OFFSET_1               0x1332
1152  #define ARIZONA_DSP3_RDMA_CONFIG_1               0x1334
1153  #define ARIZONA_DSP3_RDMA_OFFSET_1               0x1335
1154  #define ARIZONA_DSP3_EXTERNAL_START_SELECT_1     0x1338
1155  #define ARIZONA_DSP3_SCRATCH_0                   0x1340
1156  #define ARIZONA_DSP3_SCRATCH_1                   0x1341
1157  #define ARIZONA_DSP3_SCRATCH_2                   0x1342
1158  #define ARIZONA_DSP3_SCRATCH_3                   0x1343
1159  #define ARIZONA_DSP4_CONTROL_1                   0x1400
1160  #define ARIZONA_DSP4_CLOCKING_1                  0x1401
1161  #define ARIZONA_DSP4_STATUS_1                    0x1404
1162  #define ARIZONA_DSP4_STATUS_2                    0x1405
1163  #define ARIZONA_DSP4_STATUS_3                    0x1406
1164  #define ARIZONA_DSP4_STATUS_4                    0x1407
1165  #define ARIZONA_DSP4_WDMA_BUFFER_1               0x1410
1166  #define ARIZONA_DSP4_WDMA_BUFFER_2               0x1411
1167  #define ARIZONA_DSP4_WDMA_BUFFER_3               0x1412
1168  #define ARIZONA_DSP4_WDMA_BUFFER_4               0x1413
1169  #define ARIZONA_DSP4_WDMA_BUFFER_5               0x1414
1170  #define ARIZONA_DSP4_WDMA_BUFFER_6               0x1415
1171  #define ARIZONA_DSP4_WDMA_BUFFER_7               0x1416
1172  #define ARIZONA_DSP4_WDMA_BUFFER_8               0x1417
1173  #define ARIZONA_DSP4_RDMA_BUFFER_1               0x1420
1174  #define ARIZONA_DSP4_RDMA_BUFFER_2               0x1421
1175  #define ARIZONA_DSP4_RDMA_BUFFER_3               0x1422
1176  #define ARIZONA_DSP4_RDMA_BUFFER_4               0x1423
1177  #define ARIZONA_DSP4_RDMA_BUFFER_5               0x1424
1178  #define ARIZONA_DSP4_RDMA_BUFFER_6               0x1425
1179  #define ARIZONA_DSP4_WDMA_CONFIG_1               0x1430
1180  #define ARIZONA_DSP4_WDMA_CONFIG_2               0x1431
1181  #define ARIZONA_DSP4_WDMA_OFFSET_1               0x1432
1182  #define ARIZONA_DSP4_RDMA_CONFIG_1               0x1434
1183  #define ARIZONA_DSP4_RDMA_OFFSET_1               0x1435
1184  #define ARIZONA_DSP4_EXTERNAL_START_SELECT_1     0x1438
1185  #define ARIZONA_DSP4_SCRATCH_0                   0x1440
1186  #define ARIZONA_DSP4_SCRATCH_1                   0x1441
1187  #define ARIZONA_DSP4_SCRATCH_2                   0x1442
1188  #define ARIZONA_DSP4_SCRATCH_3                   0x1443
1189  
1190  /*
1191   * Field Definitions.
1192   */
1193  
1194  /*
1195   * R0 (0x00) - software reset
1196   */
1197  #define ARIZONA_SW_RST_DEV_ID1_MASK              0xFFFF  /* SW_RST_DEV_ID1 - [15:0] */
1198  #define ARIZONA_SW_RST_DEV_ID1_SHIFT                  0  /* SW_RST_DEV_ID1 - [15:0] */
1199  #define ARIZONA_SW_RST_DEV_ID1_WIDTH                 16  /* SW_RST_DEV_ID1 - [15:0] */
1200  
1201  /*
1202   * R1 (0x01) - Device Revision
1203   */
1204  #define ARIZONA_DEVICE_REVISION_MASK             0x00FF  /* DEVICE_REVISION - [7:0] */
1205  #define ARIZONA_DEVICE_REVISION_SHIFT                 0  /* DEVICE_REVISION - [7:0] */
1206  #define ARIZONA_DEVICE_REVISION_WIDTH                 8  /* DEVICE_REVISION - [7:0] */
1207  
1208  /*
1209   * R8 (0x08) - Ctrl IF SPI CFG 1
1210   */
1211  #define ARIZONA_SPI_CFG                          0x0010  /* SPI_CFG */
1212  #define ARIZONA_SPI_CFG_MASK                     0x0010  /* SPI_CFG */
1213  #define ARIZONA_SPI_CFG_SHIFT                         4  /* SPI_CFG */
1214  #define ARIZONA_SPI_CFG_WIDTH                         1  /* SPI_CFG */
1215  #define ARIZONA_SPI_4WIRE                        0x0008  /* SPI_4WIRE */
1216  #define ARIZONA_SPI_4WIRE_MASK                   0x0008  /* SPI_4WIRE */
1217  #define ARIZONA_SPI_4WIRE_SHIFT                       3  /* SPI_4WIRE */
1218  #define ARIZONA_SPI_4WIRE_WIDTH                       1  /* SPI_4WIRE */
1219  #define ARIZONA_SPI_AUTO_INC_MASK                0x0003  /* SPI_AUTO_INC - [1:0] */
1220  #define ARIZONA_SPI_AUTO_INC_SHIFT                    0  /* SPI_AUTO_INC - [1:0] */
1221  #define ARIZONA_SPI_AUTO_INC_WIDTH                    2  /* SPI_AUTO_INC - [1:0] */
1222  
1223  /*
1224   * R9 (0x09) - Ctrl IF I2C1 CFG 1
1225   */
1226  #define ARIZONA_I2C1_AUTO_INC_MASK               0x0003  /* I2C1_AUTO_INC - [1:0] */
1227  #define ARIZONA_I2C1_AUTO_INC_SHIFT                   0  /* I2C1_AUTO_INC - [1:0] */
1228  #define ARIZONA_I2C1_AUTO_INC_WIDTH                   2  /* I2C1_AUTO_INC - [1:0] */
1229  
1230  /*
1231   * R13 (0x0D) - Ctrl IF Status 1
1232   */
1233  #define ARIZONA_I2C1_BUSY                        0x0020  /* I2C1_BUSY */
1234  #define ARIZONA_I2C1_BUSY_MASK                   0x0020  /* I2C1_BUSY */
1235  #define ARIZONA_I2C1_BUSY_SHIFT                       5  /* I2C1_BUSY */
1236  #define ARIZONA_I2C1_BUSY_WIDTH                       1  /* I2C1_BUSY */
1237  #define ARIZONA_SPI_BUSY                         0x0010  /* SPI_BUSY */
1238  #define ARIZONA_SPI_BUSY_MASK                    0x0010  /* SPI_BUSY */
1239  #define ARIZONA_SPI_BUSY_SHIFT                        4  /* SPI_BUSY */
1240  #define ARIZONA_SPI_BUSY_WIDTH                        1  /* SPI_BUSY */
1241  
1242  /*
1243   * R22 (0x16) - Write Sequencer Ctrl 0
1244   */
1245  #define ARIZONA_WSEQ_ABORT                       0x0800  /* WSEQ_ABORT */
1246  #define ARIZONA_WSEQ_ABORT_MASK                  0x0800  /* WSEQ_ABORT */
1247  #define ARIZONA_WSEQ_ABORT_SHIFT                     11  /* WSEQ_ABORT */
1248  #define ARIZONA_WSEQ_ABORT_WIDTH                      1  /* WSEQ_ABORT */
1249  #define ARIZONA_WSEQ_START                       0x0400  /* WSEQ_START */
1250  #define ARIZONA_WSEQ_START_MASK                  0x0400  /* WSEQ_START */
1251  #define ARIZONA_WSEQ_START_SHIFT                     10  /* WSEQ_START */
1252  #define ARIZONA_WSEQ_START_WIDTH                      1  /* WSEQ_START */
1253  #define ARIZONA_WSEQ_ENA                         0x0200  /* WSEQ_ENA */
1254  #define ARIZONA_WSEQ_ENA_MASK                    0x0200  /* WSEQ_ENA */
1255  #define ARIZONA_WSEQ_ENA_SHIFT                        9  /* WSEQ_ENA */
1256  #define ARIZONA_WSEQ_ENA_WIDTH                        1  /* WSEQ_ENA */
1257  #define ARIZONA_WSEQ_START_INDEX_MASK            0x01FF  /* WSEQ_START_INDEX - [8:0] */
1258  #define ARIZONA_WSEQ_START_INDEX_SHIFT                0  /* WSEQ_START_INDEX - [8:0] */
1259  #define ARIZONA_WSEQ_START_INDEX_WIDTH                9  /* WSEQ_START_INDEX - [8:0] */
1260  
1261  /*
1262   * R23 (0x17) - Write Sequencer Ctrl 1
1263   */
1264  #define ARIZONA_WSEQ_BUSY                        0x0200  /* WSEQ_BUSY */
1265  #define ARIZONA_WSEQ_BUSY_MASK                   0x0200  /* WSEQ_BUSY */
1266  #define ARIZONA_WSEQ_BUSY_SHIFT                       9  /* WSEQ_BUSY */
1267  #define ARIZONA_WSEQ_BUSY_WIDTH                       1  /* WSEQ_BUSY */
1268  #define ARIZONA_WSEQ_CURRENT_INDEX_MASK          0x01FF  /* WSEQ_CURRENT_INDEX - [8:0] */
1269  #define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT              0  /* WSEQ_CURRENT_INDEX - [8:0] */
1270  #define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH              9  /* WSEQ_CURRENT_INDEX - [8:0] */
1271  
1272  /*
1273   * R24 (0x18) - Write Sequencer Ctrl 2
1274   */
1275  #define ARIZONA_LOAD_DEFAULTS                    0x0002  /* LOAD_DEFAULTS */
1276  #define ARIZONA_LOAD_DEFAULTS_MASK               0x0002  /* LOAD_DEFAULTS */
1277  #define ARIZONA_LOAD_DEFAULTS_SHIFT                   1  /* LOAD_DEFAULTS */
1278  #define ARIZONA_LOAD_DEFAULTS_WIDTH                   1  /* LOAD_DEFAULTS */
1279  #define ARIZONA_WSEQ_LOAD_MEM                    0x0001  /* WSEQ_LOAD_MEM */
1280  #define ARIZONA_WSEQ_LOAD_MEM_MASK               0x0001  /* WSEQ_LOAD_MEM */
1281  #define ARIZONA_WSEQ_LOAD_MEM_SHIFT                   0  /* WSEQ_LOAD_MEM */
1282  #define ARIZONA_WSEQ_LOAD_MEM_WIDTH                   1  /* WSEQ_LOAD_MEM */
1283  
1284  /*
1285   * R26 (0x1A) - Write Sequencer PROM
1286   */
1287  #define ARIZONA_WSEQ_OTP_WRITE                   0x0001  /* WSEQ_OTP_WRITE */
1288  #define ARIZONA_WSEQ_OTP_WRITE_MASK              0x0001  /* WSEQ_OTP_WRITE */
1289  #define ARIZONA_WSEQ_OTP_WRITE_SHIFT                  0  /* WSEQ_OTP_WRITE */
1290  #define ARIZONA_WSEQ_OTP_WRITE_WIDTH                  1  /* WSEQ_OTP_WRITE */
1291  
1292  /*
1293   * R32 (0x20) - Tone Generator 1
1294   */
1295  #define ARIZONA_TONE_RATE_MASK                   0x7800  /* TONE_RATE - [14:11] */
1296  #define ARIZONA_TONE_RATE_SHIFT                      11  /* TONE_RATE - [14:11] */
1297  #define ARIZONA_TONE_RATE_WIDTH                       4  /* TONE_RATE - [14:11] */
1298  #define ARIZONA_TONE_OFFSET_MASK                 0x0300  /* TONE_OFFSET - [9:8] */
1299  #define ARIZONA_TONE_OFFSET_SHIFT                     8  /* TONE_OFFSET - [9:8] */
1300  #define ARIZONA_TONE_OFFSET_WIDTH                     2  /* TONE_OFFSET - [9:8] */
1301  #define ARIZONA_TONE2_OVD                        0x0020  /* TONE2_OVD */
1302  #define ARIZONA_TONE2_OVD_MASK                   0x0020  /* TONE2_OVD */
1303  #define ARIZONA_TONE2_OVD_SHIFT                       5  /* TONE2_OVD */
1304  #define ARIZONA_TONE2_OVD_WIDTH                       1  /* TONE2_OVD */
1305  #define ARIZONA_TONE1_OVD                        0x0010  /* TONE1_OVD */
1306  #define ARIZONA_TONE1_OVD_MASK                   0x0010  /* TONE1_OVD */
1307  #define ARIZONA_TONE1_OVD_SHIFT                       4  /* TONE1_OVD */
1308  #define ARIZONA_TONE1_OVD_WIDTH                       1  /* TONE1_OVD */
1309  #define ARIZONA_TONE2_ENA                        0x0002  /* TONE2_ENA */
1310  #define ARIZONA_TONE2_ENA_MASK                   0x0002  /* TONE2_ENA */
1311  #define ARIZONA_TONE2_ENA_SHIFT                       1  /* TONE2_ENA */
1312  #define ARIZONA_TONE2_ENA_WIDTH                       1  /* TONE2_ENA */
1313  #define ARIZONA_TONE1_ENA                        0x0001  /* TONE1_ENA */
1314  #define ARIZONA_TONE1_ENA_MASK                   0x0001  /* TONE1_ENA */
1315  #define ARIZONA_TONE1_ENA_SHIFT                       0  /* TONE1_ENA */
1316  #define ARIZONA_TONE1_ENA_WIDTH                       1  /* TONE1_ENA */
1317  
1318  /*
1319   * R33 (0x21) - Tone Generator 2
1320   */
1321  #define ARIZONA_TONE1_LVL_0_MASK                 0xFFFF  /* TONE1_LVL - [15:0] */
1322  #define ARIZONA_TONE1_LVL_0_SHIFT                     0  /* TONE1_LVL - [15:0] */
1323  #define ARIZONA_TONE1_LVL_0_WIDTH                    16  /* TONE1_LVL - [15:0] */
1324  
1325  /*
1326   * R34 (0x22) - Tone Generator 3
1327   */
1328  #define ARIZONA_TONE1_LVL_MASK                   0x00FF  /* TONE1_LVL - [7:0] */
1329  #define ARIZONA_TONE1_LVL_SHIFT                       0  /* TONE1_LVL - [7:0] */
1330  #define ARIZONA_TONE1_LVL_WIDTH                       8  /* TONE1_LVL - [7:0] */
1331  
1332  /*
1333   * R35 (0x23) - Tone Generator 4
1334   */
1335  #define ARIZONA_TONE2_LVL_0_MASK                 0xFFFF  /* TONE2_LVL - [15:0] */
1336  #define ARIZONA_TONE2_LVL_0_SHIFT                     0  /* TONE2_LVL - [15:0] */
1337  #define ARIZONA_TONE2_LVL_0_WIDTH                    16  /* TONE2_LVL - [15:0] */
1338  
1339  /*
1340   * R36 (0x24) - Tone Generator 5
1341   */
1342  #define ARIZONA_TONE2_LVL_MASK                   0x00FF  /* TONE2_LVL - [7:0] */
1343  #define ARIZONA_TONE2_LVL_SHIFT                       0  /* TONE2_LVL - [7:0] */
1344  #define ARIZONA_TONE2_LVL_WIDTH                       8  /* TONE2_LVL - [7:0] */
1345  
1346  /*
1347   * R48 (0x30) - PWM Drive 1
1348   */
1349  #define ARIZONA_PWM_RATE_MASK                    0x7800  /* PWM_RATE - [14:11] */
1350  #define ARIZONA_PWM_RATE_SHIFT                       11  /* PWM_RATE - [14:11] */
1351  #define ARIZONA_PWM_RATE_WIDTH                        4  /* PWM_RATE - [14:11] */
1352  #define ARIZONA_PWM_CLK_SEL_MASK                 0x0700  /* PWM_CLK_SEL - [10:8] */
1353  #define ARIZONA_PWM_CLK_SEL_SHIFT                     8  /* PWM_CLK_SEL - [10:8] */
1354  #define ARIZONA_PWM_CLK_SEL_WIDTH                     3  /* PWM_CLK_SEL - [10:8] */
1355  #define ARIZONA_PWM2_OVD                         0x0020  /* PWM2_OVD */
1356  #define ARIZONA_PWM2_OVD_MASK                    0x0020  /* PWM2_OVD */
1357  #define ARIZONA_PWM2_OVD_SHIFT                        5  /* PWM2_OVD */
1358  #define ARIZONA_PWM2_OVD_WIDTH                        1  /* PWM2_OVD */
1359  #define ARIZONA_PWM1_OVD                         0x0010  /* PWM1_OVD */
1360  #define ARIZONA_PWM1_OVD_MASK                    0x0010  /* PWM1_OVD */
1361  #define ARIZONA_PWM1_OVD_SHIFT                        4  /* PWM1_OVD */
1362  #define ARIZONA_PWM1_OVD_WIDTH                        1  /* PWM1_OVD */
1363  #define ARIZONA_PWM2_ENA                         0x0002  /* PWM2_ENA */
1364  #define ARIZONA_PWM2_ENA_MASK                    0x0002  /* PWM2_ENA */
1365  #define ARIZONA_PWM2_ENA_SHIFT                        1  /* PWM2_ENA */
1366  #define ARIZONA_PWM2_ENA_WIDTH                        1  /* PWM2_ENA */
1367  #define ARIZONA_PWM1_ENA                         0x0001  /* PWM1_ENA */
1368  #define ARIZONA_PWM1_ENA_MASK                    0x0001  /* PWM1_ENA */
1369  #define ARIZONA_PWM1_ENA_SHIFT                        0  /* PWM1_ENA */
1370  #define ARIZONA_PWM1_ENA_WIDTH                        1  /* PWM1_ENA */
1371  
1372  /*
1373   * R49 (0x31) - PWM Drive 2
1374   */
1375  #define ARIZONA_PWM1_LVL_MASK                    0x03FF  /* PWM1_LVL - [9:0] */
1376  #define ARIZONA_PWM1_LVL_SHIFT                        0  /* PWM1_LVL - [9:0] */
1377  #define ARIZONA_PWM1_LVL_WIDTH                       10  /* PWM1_LVL - [9:0] */
1378  
1379  /*
1380   * R50 (0x32) - PWM Drive 3
1381   */
1382  #define ARIZONA_PWM2_LVL_MASK                    0x03FF  /* PWM2_LVL - [9:0] */
1383  #define ARIZONA_PWM2_LVL_SHIFT                        0  /* PWM2_LVL - [9:0] */
1384  #define ARIZONA_PWM2_LVL_WIDTH                       10  /* PWM2_LVL - [9:0] */
1385  
1386  /*
1387   * R64 (0x40) - Wake control
1388   */
1389  #define ARIZONA_WKUP_MICD_CLAMP_FALL             0x0080  /* WKUP_MICD_CLAMP_FALL */
1390  #define ARIZONA_WKUP_MICD_CLAMP_FALL_MASK        0x0080  /* WKUP_MICD_CLAMP_FALL */
1391  #define ARIZONA_WKUP_MICD_CLAMP_FALL_SHIFT            7  /* WKUP_MICD_CLAMP_FALL */
1392  #define ARIZONA_WKUP_MICD_CLAMP_FALL_WIDTH            1  /* WKUP_MICD_CLAMP_FALL */
1393  #define ARIZONA_WKUP_MICD_CLAMP_RISE             0x0040  /* WKUP_MICD_CLAMP_RISE */
1394  #define ARIZONA_WKUP_MICD_CLAMP_RISE_MASK        0x0040  /* WKUP_MICD_CLAMP_RISE */
1395  #define ARIZONA_WKUP_MICD_CLAMP_RISE_SHIFT            6  /* WKUP_MICD_CLAMP_RISE */
1396  #define ARIZONA_WKUP_MICD_CLAMP_RISE_WIDTH            1  /* WKUP_MICD_CLAMP_RISE */
1397  #define ARIZONA_WKUP_GP5_FALL                    0x0020  /* WKUP_GP5_FALL */
1398  #define ARIZONA_WKUP_GP5_FALL_MASK               0x0020  /* WKUP_GP5_FALL */
1399  #define ARIZONA_WKUP_GP5_FALL_SHIFT                   5  /* WKUP_GP5_FALL */
1400  #define ARIZONA_WKUP_GP5_FALL_WIDTH                   1  /* WKUP_GP5_FALL */
1401  #define ARIZONA_WKUP_GP5_RISE                    0x0010  /* WKUP_GP5_RISE */
1402  #define ARIZONA_WKUP_GP5_RISE_MASK               0x0010  /* WKUP_GP5_RISE */
1403  #define ARIZONA_WKUP_GP5_RISE_SHIFT                   4  /* WKUP_GP5_RISE */
1404  #define ARIZONA_WKUP_GP5_RISE_WIDTH                   1  /* WKUP_GP5_RISE */
1405  #define ARIZONA_WKUP_JD1_FALL                    0x0008  /* WKUP_JD1_FALL */
1406  #define ARIZONA_WKUP_JD1_FALL_MASK               0x0008  /* WKUP_JD1_FALL */
1407  #define ARIZONA_WKUP_JD1_FALL_SHIFT                   3  /* WKUP_JD1_FALL */
1408  #define ARIZONA_WKUP_JD1_FALL_WIDTH                   1  /* WKUP_JD1_FALL */
1409  #define ARIZONA_WKUP_JD1_RISE                    0x0004  /* WKUP_JD1_RISE */
1410  #define ARIZONA_WKUP_JD1_RISE_MASK               0x0004  /* WKUP_JD1_RISE */
1411  #define ARIZONA_WKUP_JD1_RISE_SHIFT                   2  /* WKUP_JD1_RISE */
1412  #define ARIZONA_WKUP_JD1_RISE_WIDTH                   1  /* WKUP_JD1_RISE */
1413  #define ARIZONA_WKUP_JD2_FALL                    0x0002  /* WKUP_JD2_FALL */
1414  #define ARIZONA_WKUP_JD2_FALL_MASK               0x0002  /* WKUP_JD2_FALL */
1415  #define ARIZONA_WKUP_JD2_FALL_SHIFT                   1  /* WKUP_JD2_FALL */
1416  #define ARIZONA_WKUP_JD2_FALL_WIDTH                   1  /* WKUP_JD2_FALL */
1417  #define ARIZONA_WKUP_JD2_RISE                    0x0001  /* WKUP_JD2_RISE */
1418  #define ARIZONA_WKUP_JD2_RISE_MASK               0x0001  /* WKUP_JD2_RISE */
1419  #define ARIZONA_WKUP_JD2_RISE_SHIFT                   0  /* WKUP_JD2_RISE */
1420  #define ARIZONA_WKUP_JD2_RISE_WIDTH                   1  /* WKUP_JD2_RISE */
1421  
1422  /*
1423   * R65 (0x41) - Sequence control
1424   */
1425  #define ARIZONA_WSEQ_ENA_GP5_FALL                0x0020  /* WSEQ_ENA_GP5_FALL */
1426  #define ARIZONA_WSEQ_ENA_GP5_FALL_MASK           0x0020  /* WSEQ_ENA_GP5_FALL */
1427  #define ARIZONA_WSEQ_ENA_GP5_FALL_SHIFT               5  /* WSEQ_ENA_GP5_FALL */
1428  #define ARIZONA_WSEQ_ENA_GP5_FALL_WIDTH               1  /* WSEQ_ENA_GP5_FALL */
1429  #define ARIZONA_WSEQ_ENA_GP5_RISE                0x0010  /* WSEQ_ENA_GP5_RISE */
1430  #define ARIZONA_WSEQ_ENA_GP5_RISE_MASK           0x0010  /* WSEQ_ENA_GP5_RISE */
1431  #define ARIZONA_WSEQ_ENA_GP5_RISE_SHIFT               4  /* WSEQ_ENA_GP5_RISE */
1432  #define ARIZONA_WSEQ_ENA_GP5_RISE_WIDTH               1  /* WSEQ_ENA_GP5_RISE */
1433  #define ARIZONA_WSEQ_ENA_JD1_FALL                0x0008  /* WSEQ_ENA_JD1_FALL */
1434  #define ARIZONA_WSEQ_ENA_JD1_FALL_MASK           0x0008  /* WSEQ_ENA_JD1_FALL */
1435  #define ARIZONA_WSEQ_ENA_JD1_FALL_SHIFT               3  /* WSEQ_ENA_JD1_FALL */
1436  #define ARIZONA_WSEQ_ENA_JD1_FALL_WIDTH               1  /* WSEQ_ENA_JD1_FALL */
1437  #define ARIZONA_WSEQ_ENA_JD1_RISE                0x0004  /* WSEQ_ENA_JD1_RISE */
1438  #define ARIZONA_WSEQ_ENA_JD1_RISE_MASK           0x0004  /* WSEQ_ENA_JD1_RISE */
1439  #define ARIZONA_WSEQ_ENA_JD1_RISE_SHIFT               2  /* WSEQ_ENA_JD1_RISE */
1440  #define ARIZONA_WSEQ_ENA_JD1_RISE_WIDTH               1  /* WSEQ_ENA_JD1_RISE */
1441  #define ARIZONA_WSEQ_ENA_JD2_FALL                0x0002  /* WSEQ_ENA_JD2_FALL */
1442  #define ARIZONA_WSEQ_ENA_JD2_FALL_MASK           0x0002  /* WSEQ_ENA_JD2_FALL */
1443  #define ARIZONA_WSEQ_ENA_JD2_FALL_SHIFT               1  /* WSEQ_ENA_JD2_FALL */
1444  #define ARIZONA_WSEQ_ENA_JD2_FALL_WIDTH               1  /* WSEQ_ENA_JD2_FALL */
1445  #define ARIZONA_WSEQ_ENA_JD2_RISE                0x0001  /* WSEQ_ENA_JD2_RISE */
1446  #define ARIZONA_WSEQ_ENA_JD2_RISE_MASK           0x0001  /* WSEQ_ENA_JD2_RISE */
1447  #define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT               0  /* WSEQ_ENA_JD2_RISE */
1448  #define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH               1  /* WSEQ_ENA_JD2_RISE */
1449  
1450  /*
1451   * R66 (0x42) - Spare Triggers
1452   */
1453  #define ARIZONA_WS_TRG8                          0x0080  /* WS_TRG8 */
1454  #define ARIZONA_WS_TRG8_MASK                     0x0080  /* WS_TRG8 */
1455  #define ARIZONA_WS_TRG8_SHIFT                         7  /* WS_TRG8 */
1456  #define ARIZONA_WS_TRG8_WIDTH                         1  /* WS_TRG8 */
1457  #define ARIZONA_WS_TRG7                          0x0040  /* WS_TRG7 */
1458  #define ARIZONA_WS_TRG7_MASK                     0x0040  /* WS_TRG7 */
1459  #define ARIZONA_WS_TRG7_SHIFT                         6  /* WS_TRG7 */
1460  #define ARIZONA_WS_TRG7_WIDTH                         1  /* WS_TRG7 */
1461  #define ARIZONA_WS_TRG6                          0x0020  /* WS_TRG6 */
1462  #define ARIZONA_WS_TRG6_MASK                     0x0020  /* WS_TRG6 */
1463  #define ARIZONA_WS_TRG6_SHIFT                         5  /* WS_TRG6 */
1464  #define ARIZONA_WS_TRG6_WIDTH                         1  /* WS_TRG6 */
1465  #define ARIZONA_WS_TRG5                          0x0010  /* WS_TRG5 */
1466  #define ARIZONA_WS_TRG5_MASK                     0x0010  /* WS_TRG5 */
1467  #define ARIZONA_WS_TRG5_SHIFT                         4  /* WS_TRG5 */
1468  #define ARIZONA_WS_TRG5_WIDTH                         1  /* WS_TRG5 */
1469  #define ARIZONA_WS_TRG4                          0x0008  /* WS_TRG4 */
1470  #define ARIZONA_WS_TRG4_MASK                     0x0008  /* WS_TRG4 */
1471  #define ARIZONA_WS_TRG4_SHIFT                         3  /* WS_TRG4 */
1472  #define ARIZONA_WS_TRG4_WIDTH                         1  /* WS_TRG4 */
1473  #define ARIZONA_WS_TRG3                          0x0004  /* WS_TRG3 */
1474  #define ARIZONA_WS_TRG3_MASK                     0x0004  /* WS_TRG3 */
1475  #define ARIZONA_WS_TRG3_SHIFT                         2  /* WS_TRG3 */
1476  #define ARIZONA_WS_TRG3_WIDTH                         1  /* WS_TRG3 */
1477  #define ARIZONA_WS_TRG2                          0x0002  /* WS_TRG2 */
1478  #define ARIZONA_WS_TRG2_MASK                     0x0002  /* WS_TRG2 */
1479  #define ARIZONA_WS_TRG2_SHIFT                         1  /* WS_TRG2 */
1480  #define ARIZONA_WS_TRG2_WIDTH                         1  /* WS_TRG2 */
1481  #define ARIZONA_WS_TRG1                          0x0001  /* WS_TRG1 */
1482  #define ARIZONA_WS_TRG1_MASK                     0x0001  /* WS_TRG1 */
1483  #define ARIZONA_WS_TRG1_SHIFT                         0  /* WS_TRG1 */
1484  #define ARIZONA_WS_TRG1_WIDTH                         1  /* WS_TRG1 */
1485  
1486  /*
1487   * R97 (0x61) - Sample Rate Sequence Select 1
1488   */
1489  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK 0x01FF  /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1490  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT      0  /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1491  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH      9  /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1492  
1493  /*
1494   * R98 (0x62) - Sample Rate Sequence Select 2
1495   */
1496  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK 0x01FF  /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1497  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT      0  /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1498  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH      9  /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1499  
1500  /*
1501   * R99 (0x63) - Sample Rate Sequence Select 3
1502   */
1503  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK 0x01FF  /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1504  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT      0  /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1505  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH      9  /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1506  
1507  /*
1508   * R100 (0x64) - Sample Rate Sequence Select 4
1509   */
1510  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK 0x01FF  /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1511  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT      0  /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1512  #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH      9  /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1513  
1514  /*
1515   * R104 (0x68) - Always On Triggers Sequence Select 1
1516   */
1517  #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK      0x01FF  /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1518  #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT          0  /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1519  #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH          9  /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1520  
1521  /*
1522   * R105 (0x69) - Always On Triggers Sequence Select 2
1523   */
1524  #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK      0x01FF  /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1525  #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT          0  /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1526  #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH          9  /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1527  
1528  /*
1529   * R106 (0x6A) - Always On Triggers Sequence Select 3
1530   */
1531  #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK      0x01FF  /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1532  #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT          0  /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1533  #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH          9  /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1534  
1535  /*
1536   * R107 (0x6B) - Always On Triggers Sequence Select 4
1537   */
1538  #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK      0x01FF  /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1539  #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT          0  /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1540  #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH          9  /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1541  
1542  /*
1543   * R108 (0x6C) - Always On Triggers Sequence Select 5
1544   */
1545  #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK      0x01FF  /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1546  #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT          0  /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1547  #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH          9  /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1548  
1549  /*
1550   * R109 (0x6D) - Always On Triggers Sequence Select 6
1551   */
1552  #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK      0x01FF  /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1553  #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT          0  /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1554  #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH          9  /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1555  
1556  /*
1557   * R112 (0x70) - Comfort Noise Generator
1558   */
1559  #define ARIZONA_NOISE_GEN_RATE_MASK              0x7800  /* NOISE_GEN_RATE - [14:11] */
1560  #define ARIZONA_NOISE_GEN_RATE_SHIFT                 11  /* NOISE_GEN_RATE - [14:11] */
1561  #define ARIZONA_NOISE_GEN_RATE_WIDTH                  4  /* NOISE_GEN_RATE - [14:11] */
1562  #define ARIZONA_NOISE_GEN_ENA                    0x0020  /* NOISE_GEN_ENA */
1563  #define ARIZONA_NOISE_GEN_ENA_MASK               0x0020  /* NOISE_GEN_ENA */
1564  #define ARIZONA_NOISE_GEN_ENA_SHIFT                   5  /* NOISE_GEN_ENA */
1565  #define ARIZONA_NOISE_GEN_ENA_WIDTH                   1  /* NOISE_GEN_ENA */
1566  #define ARIZONA_NOISE_GEN_GAIN_MASK              0x001F  /* NOISE_GEN_GAIN - [4:0] */
1567  #define ARIZONA_NOISE_GEN_GAIN_SHIFT                  0  /* NOISE_GEN_GAIN - [4:0] */
1568  #define ARIZONA_NOISE_GEN_GAIN_WIDTH                  5  /* NOISE_GEN_GAIN - [4:0] */
1569  
1570  /*
1571   * R144 (0x90) - Haptics Control 1
1572   */
1573  #define ARIZONA_HAP_RATE_MASK                    0x7800  /* HAP_RATE - [14:11] */
1574  #define ARIZONA_HAP_RATE_SHIFT                       11  /* HAP_RATE - [14:11] */
1575  #define ARIZONA_HAP_RATE_WIDTH                        4  /* HAP_RATE - [14:11] */
1576  #define ARIZONA_ONESHOT_TRIG                     0x0010  /* ONESHOT_TRIG */
1577  #define ARIZONA_ONESHOT_TRIG_MASK                0x0010  /* ONESHOT_TRIG */
1578  #define ARIZONA_ONESHOT_TRIG_SHIFT                    4  /* ONESHOT_TRIG */
1579  #define ARIZONA_ONESHOT_TRIG_WIDTH                    1  /* ONESHOT_TRIG */
1580  #define ARIZONA_HAP_CTRL_MASK                    0x000C  /* HAP_CTRL - [3:2] */
1581  #define ARIZONA_HAP_CTRL_SHIFT                        2  /* HAP_CTRL - [3:2] */
1582  #define ARIZONA_HAP_CTRL_WIDTH                        2  /* HAP_CTRL - [3:2] */
1583  #define ARIZONA_HAP_ACT                          0x0002  /* HAP_ACT */
1584  #define ARIZONA_HAP_ACT_MASK                     0x0002  /* HAP_ACT */
1585  #define ARIZONA_HAP_ACT_SHIFT                         1  /* HAP_ACT */
1586  #define ARIZONA_HAP_ACT_WIDTH                         1  /* HAP_ACT */
1587  
1588  /*
1589   * R145 (0x91) - Haptics Control 2
1590   */
1591  #define ARIZONA_LRA_FREQ_MASK                    0x7FFF  /* LRA_FREQ - [14:0] */
1592  #define ARIZONA_LRA_FREQ_SHIFT                        0  /* LRA_FREQ - [14:0] */
1593  #define ARIZONA_LRA_FREQ_WIDTH                       15  /* LRA_FREQ - [14:0] */
1594  
1595  /*
1596   * R146 (0x92) - Haptics phase 1 intensity
1597   */
1598  #define ARIZONA_PHASE1_INTENSITY_MASK            0x00FF  /* PHASE1_INTENSITY - [7:0] */
1599  #define ARIZONA_PHASE1_INTENSITY_SHIFT                0  /* PHASE1_INTENSITY - [7:0] */
1600  #define ARIZONA_PHASE1_INTENSITY_WIDTH                8  /* PHASE1_INTENSITY - [7:0] */
1601  
1602  /*
1603   * R147 (0x93) - Haptics phase 1 duration
1604   */
1605  #define ARIZONA_PHASE1_DURATION_MASK             0x01FF  /* PHASE1_DURATION - [8:0] */
1606  #define ARIZONA_PHASE1_DURATION_SHIFT                 0  /* PHASE1_DURATION - [8:0] */
1607  #define ARIZONA_PHASE1_DURATION_WIDTH                 9  /* PHASE1_DURATION - [8:0] */
1608  
1609  /*
1610   * R148 (0x94) - Haptics phase 2 intensity
1611   */
1612  #define ARIZONA_PHASE2_INTENSITY_MASK            0x00FF  /* PHASE2_INTENSITY - [7:0] */
1613  #define ARIZONA_PHASE2_INTENSITY_SHIFT                0  /* PHASE2_INTENSITY - [7:0] */
1614  #define ARIZONA_PHASE2_INTENSITY_WIDTH                8  /* PHASE2_INTENSITY - [7:0] */
1615  
1616  /*
1617   * R149 (0x95) - Haptics phase 2 duration
1618   */
1619  #define ARIZONA_PHASE2_DURATION_MASK             0x07FF  /* PHASE2_DURATION - [10:0] */
1620  #define ARIZONA_PHASE2_DURATION_SHIFT                 0  /* PHASE2_DURATION - [10:0] */
1621  #define ARIZONA_PHASE2_DURATION_WIDTH                11  /* PHASE2_DURATION - [10:0] */
1622  
1623  /*
1624   * R150 (0x96) - Haptics phase 3 intensity
1625   */
1626  #define ARIZONA_PHASE3_INTENSITY_MASK            0x00FF  /* PHASE3_INTENSITY - [7:0] */
1627  #define ARIZONA_PHASE3_INTENSITY_SHIFT                0  /* PHASE3_INTENSITY - [7:0] */
1628  #define ARIZONA_PHASE3_INTENSITY_WIDTH                8  /* PHASE3_INTENSITY - [7:0] */
1629  
1630  /*
1631   * R151 (0x97) - Haptics phase 3 duration
1632   */
1633  #define ARIZONA_PHASE3_DURATION_MASK             0x01FF  /* PHASE3_DURATION - [8:0] */
1634  #define ARIZONA_PHASE3_DURATION_SHIFT                 0  /* PHASE3_DURATION - [8:0] */
1635  #define ARIZONA_PHASE3_DURATION_WIDTH                 9  /* PHASE3_DURATION - [8:0] */
1636  
1637  /*
1638   * R152 (0x98) - Haptics Status
1639   */
1640  #define ARIZONA_ONESHOT_STS                      0x0001  /* ONESHOT_STS */
1641  #define ARIZONA_ONESHOT_STS_MASK                 0x0001  /* ONESHOT_STS */
1642  #define ARIZONA_ONESHOT_STS_SHIFT                     0  /* ONESHOT_STS */
1643  #define ARIZONA_ONESHOT_STS_WIDTH                     1  /* ONESHOT_STS */
1644  
1645  /*
1646   * R256 (0x100) - Clock 32k 1
1647   */
1648  #define ARIZONA_CLK_32K_ENA                      0x0040  /* CLK_32K_ENA */
1649  #define ARIZONA_CLK_32K_ENA_MASK                 0x0040  /* CLK_32K_ENA */
1650  #define ARIZONA_CLK_32K_ENA_SHIFT                     6  /* CLK_32K_ENA */
1651  #define ARIZONA_CLK_32K_ENA_WIDTH                     1  /* CLK_32K_ENA */
1652  #define ARIZONA_CLK_32K_SRC_MASK                 0x0003  /* CLK_32K_SRC - [1:0] */
1653  #define ARIZONA_CLK_32K_SRC_SHIFT                     0  /* CLK_32K_SRC - [1:0] */
1654  #define ARIZONA_CLK_32K_SRC_WIDTH                     2  /* CLK_32K_SRC - [1:0] */
1655  
1656  /*
1657   * R257 (0x101) - System Clock 1
1658   */
1659  #define ARIZONA_SYSCLK_FRAC                      0x8000  /* SYSCLK_FRAC */
1660  #define ARIZONA_SYSCLK_FRAC_MASK                 0x8000  /* SYSCLK_FRAC */
1661  #define ARIZONA_SYSCLK_FRAC_SHIFT                    15  /* SYSCLK_FRAC */
1662  #define ARIZONA_SYSCLK_FRAC_WIDTH                     1  /* SYSCLK_FRAC */
1663  #define ARIZONA_SYSCLK_FREQ_MASK                 0x0700  /* SYSCLK_FREQ - [10:8] */
1664  #define ARIZONA_SYSCLK_FREQ_SHIFT                     8  /* SYSCLK_FREQ - [10:8] */
1665  #define ARIZONA_SYSCLK_FREQ_WIDTH                     3  /* SYSCLK_FREQ - [10:8] */
1666  #define ARIZONA_SYSCLK_ENA                       0x0040  /* SYSCLK_ENA */
1667  #define ARIZONA_SYSCLK_ENA_MASK                  0x0040  /* SYSCLK_ENA */
1668  #define ARIZONA_SYSCLK_ENA_SHIFT                      6  /* SYSCLK_ENA */
1669  #define ARIZONA_SYSCLK_ENA_WIDTH                      1  /* SYSCLK_ENA */
1670  #define ARIZONA_SYSCLK_SRC_MASK                  0x000F  /* SYSCLK_SRC - [3:0] */
1671  #define ARIZONA_SYSCLK_SRC_SHIFT                      0  /* SYSCLK_SRC - [3:0] */
1672  #define ARIZONA_SYSCLK_SRC_WIDTH                      4  /* SYSCLK_SRC - [3:0] */
1673  
1674  /*
1675   * R258 (0x102) - Sample rate 1
1676   */
1677  #define ARIZONA_SAMPLE_RATE_1_MASK               0x001F  /* SAMPLE_RATE_1 - [4:0] */
1678  #define ARIZONA_SAMPLE_RATE_1_SHIFT                   0  /* SAMPLE_RATE_1 - [4:0] */
1679  #define ARIZONA_SAMPLE_RATE_1_WIDTH                   5  /* SAMPLE_RATE_1 - [4:0] */
1680  
1681  /*
1682   * R259 (0x103) - Sample rate 2
1683   */
1684  #define ARIZONA_SAMPLE_RATE_2_MASK               0x001F  /* SAMPLE_RATE_2 - [4:0] */
1685  #define ARIZONA_SAMPLE_RATE_2_SHIFT                   0  /* SAMPLE_RATE_2 - [4:0] */
1686  #define ARIZONA_SAMPLE_RATE_2_WIDTH                   5  /* SAMPLE_RATE_2 - [4:0] */
1687  
1688  /*
1689   * R260 (0x104) - Sample rate 3
1690   */
1691  #define ARIZONA_SAMPLE_RATE_3_MASK               0x001F  /* SAMPLE_RATE_3 - [4:0] */
1692  #define ARIZONA_SAMPLE_RATE_3_SHIFT                   0  /* SAMPLE_RATE_3 - [4:0] */
1693  #define ARIZONA_SAMPLE_RATE_3_WIDTH                   5  /* SAMPLE_RATE_3 - [4:0] */
1694  
1695  /*
1696   * R266 (0x10A) - Sample rate 1 status
1697   */
1698  #define ARIZONA_SAMPLE_RATE_1_STS_MASK           0x001F  /* SAMPLE_RATE_1_STS - [4:0] */
1699  #define ARIZONA_SAMPLE_RATE_1_STS_SHIFT               0  /* SAMPLE_RATE_1_STS - [4:0] */
1700  #define ARIZONA_SAMPLE_RATE_1_STS_WIDTH               5  /* SAMPLE_RATE_1_STS - [4:0] */
1701  
1702  /*
1703   * R267 (0x10B) - Sample rate 2 status
1704   */
1705  #define ARIZONA_SAMPLE_RATE_2_STS_MASK           0x001F  /* SAMPLE_RATE_2_STS - [4:0] */
1706  #define ARIZONA_SAMPLE_RATE_2_STS_SHIFT               0  /* SAMPLE_RATE_2_STS - [4:0] */
1707  #define ARIZONA_SAMPLE_RATE_2_STS_WIDTH               5  /* SAMPLE_RATE_2_STS - [4:0] */
1708  
1709  /*
1710   * R268 (0x10C) - Sample rate 3 status
1711   */
1712  #define ARIZONA_SAMPLE_RATE_3_STS_MASK           0x001F  /* SAMPLE_RATE_3_STS - [4:0] */
1713  #define ARIZONA_SAMPLE_RATE_3_STS_SHIFT               0  /* SAMPLE_RATE_3_STS - [4:0] */
1714  #define ARIZONA_SAMPLE_RATE_3_STS_WIDTH               5  /* SAMPLE_RATE_3_STS - [4:0] */
1715  
1716  /*
1717   * R274 (0x112) - Async clock 1
1718   */
1719  #define ARIZONA_ASYNC_CLK_FREQ_MASK              0x0700  /* ASYNC_CLK_FREQ - [10:8] */
1720  #define ARIZONA_ASYNC_CLK_FREQ_SHIFT                  8  /* ASYNC_CLK_FREQ - [10:8] */
1721  #define ARIZONA_ASYNC_CLK_FREQ_WIDTH                  3  /* ASYNC_CLK_FREQ - [10:8] */
1722  #define ARIZONA_ASYNC_CLK_ENA                    0x0040  /* ASYNC_CLK_ENA */
1723  #define ARIZONA_ASYNC_CLK_ENA_MASK               0x0040  /* ASYNC_CLK_ENA */
1724  #define ARIZONA_ASYNC_CLK_ENA_SHIFT                   6  /* ASYNC_CLK_ENA */
1725  #define ARIZONA_ASYNC_CLK_ENA_WIDTH                   1  /* ASYNC_CLK_ENA */
1726  #define ARIZONA_ASYNC_CLK_SRC_MASK               0x000F  /* ASYNC_CLK_SRC - [3:0] */
1727  #define ARIZONA_ASYNC_CLK_SRC_SHIFT                   0  /* ASYNC_CLK_SRC - [3:0] */
1728  #define ARIZONA_ASYNC_CLK_SRC_WIDTH                   4  /* ASYNC_CLK_SRC - [3:0] */
1729  
1730  /*
1731   * R275 (0x113) - Async sample rate 1
1732   */
1733  #define ARIZONA_ASYNC_SAMPLE_RATE_1_MASK         0x001F  /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1734  #define ARIZONA_ASYNC_SAMPLE_RATE_1_SHIFT             0  /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1735  #define ARIZONA_ASYNC_SAMPLE_RATE_1_WIDTH             5  /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1736  
1737  /*
1738   * R276 (0x114) - Async sample rate 2
1739   */
1740  #define ARIZONA_ASYNC_SAMPLE_RATE_2_MASK         0x001F  /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1741  #define ARIZONA_ASYNC_SAMPLE_RATE_2_SHIFT             0  /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1742  #define ARIZONA_ASYNC_SAMPLE_RATE_2_WIDTH             5  /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1743  
1744  /*
1745   * R283 (0x11B) - Async sample rate 1 status
1746   */
1747  #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_MASK     0x001F  /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1748  #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_SHIFT         0  /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1749  #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_WIDTH         5  /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1750  
1751  /*
1752   * R284 (0x11C) - Async sample rate 2 status
1753   */
1754  #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_MASK     0x001F  /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1755  #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_SHIFT         0  /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1756  #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_WIDTH         5  /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1757  
1758  /*
1759   * R329 (0x149) - Output system clock
1760   */
1761  #define ARIZONA_OPCLK_ENA                        0x8000  /* OPCLK_ENA */
1762  #define ARIZONA_OPCLK_ENA_MASK                   0x8000  /* OPCLK_ENA */
1763  #define ARIZONA_OPCLK_ENA_SHIFT                      15  /* OPCLK_ENA */
1764  #define ARIZONA_OPCLK_ENA_WIDTH                       1  /* OPCLK_ENA */
1765  #define ARIZONA_OPCLK_DIV_MASK                   0x00F8  /* OPCLK_DIV - [7:3] */
1766  #define ARIZONA_OPCLK_DIV_SHIFT                       3  /* OPCLK_DIV - [7:3] */
1767  #define ARIZONA_OPCLK_DIV_WIDTH                       5  /* OPCLK_DIV - [7:3] */
1768  #define ARIZONA_OPCLK_SEL_MASK                   0x0007  /* OPCLK_SEL - [2:0] */
1769  #define ARIZONA_OPCLK_SEL_SHIFT                       0  /* OPCLK_SEL - [2:0] */
1770  #define ARIZONA_OPCLK_SEL_WIDTH                       3  /* OPCLK_SEL - [2:0] */
1771  
1772  /*
1773   * R330 (0x14A) - Output async clock
1774   */
1775  #define ARIZONA_OPCLK_ASYNC_ENA                  0x8000  /* OPCLK_ASYNC_ENA */
1776  #define ARIZONA_OPCLK_ASYNC_ENA_MASK             0x8000  /* OPCLK_ASYNC_ENA */
1777  #define ARIZONA_OPCLK_ASYNC_ENA_SHIFT                15  /* OPCLK_ASYNC_ENA */
1778  #define ARIZONA_OPCLK_ASYNC_ENA_WIDTH                 1  /* OPCLK_ASYNC_ENA */
1779  #define ARIZONA_OPCLK_ASYNC_DIV_MASK             0x00F8  /* OPCLK_ASYNC_DIV - [7:3] */
1780  #define ARIZONA_OPCLK_ASYNC_DIV_SHIFT                 3  /* OPCLK_ASYNC_DIV - [7:3] */
1781  #define ARIZONA_OPCLK_ASYNC_DIV_WIDTH                 5  /* OPCLK_ASYNC_DIV - [7:3] */
1782  #define ARIZONA_OPCLK_ASYNC_SEL_MASK             0x0007  /* OPCLK_ASYNC_SEL - [2:0] */
1783  #define ARIZONA_OPCLK_ASYNC_SEL_SHIFT                 0  /* OPCLK_ASYNC_SEL - [2:0] */
1784  #define ARIZONA_OPCLK_ASYNC_SEL_WIDTH                 3  /* OPCLK_ASYNC_SEL - [2:0] */
1785  
1786  /*
1787   * R338 (0x152) - Rate Estimator 1
1788   */
1789  #define ARIZONA_TRIG_ON_STARTUP                  0x0010  /* TRIG_ON_STARTUP */
1790  #define ARIZONA_TRIG_ON_STARTUP_MASK             0x0010  /* TRIG_ON_STARTUP */
1791  #define ARIZONA_TRIG_ON_STARTUP_SHIFT                 4  /* TRIG_ON_STARTUP */
1792  #define ARIZONA_TRIG_ON_STARTUP_WIDTH                 1  /* TRIG_ON_STARTUP */
1793  #define ARIZONA_LRCLK_SRC_MASK                   0x000E  /* LRCLK_SRC - [3:1] */
1794  #define ARIZONA_LRCLK_SRC_SHIFT                       1  /* LRCLK_SRC - [3:1] */
1795  #define ARIZONA_LRCLK_SRC_WIDTH                       3  /* LRCLK_SRC - [3:1] */
1796  #define ARIZONA_RATE_EST_ENA                     0x0001  /* RATE_EST_ENA */
1797  #define ARIZONA_RATE_EST_ENA_MASK                0x0001  /* RATE_EST_ENA */
1798  #define ARIZONA_RATE_EST_ENA_SHIFT                    0  /* RATE_EST_ENA */
1799  #define ARIZONA_RATE_EST_ENA_WIDTH                    1  /* RATE_EST_ENA */
1800  
1801  /*
1802   * R339 (0x153) - Rate Estimator 2
1803   */
1804  #define ARIZONA_SAMPLE_RATE_DETECT_A_MASK        0x001F  /* SAMPLE_RATE_DETECT_A - [4:0] */
1805  #define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT            0  /* SAMPLE_RATE_DETECT_A - [4:0] */
1806  #define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH            5  /* SAMPLE_RATE_DETECT_A - [4:0] */
1807  
1808  /*
1809   * R340 (0x154) - Rate Estimator 3
1810   */
1811  #define ARIZONA_SAMPLE_RATE_DETECT_B_MASK        0x001F  /* SAMPLE_RATE_DETECT_B - [4:0] */
1812  #define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT            0  /* SAMPLE_RATE_DETECT_B - [4:0] */
1813  #define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH            5  /* SAMPLE_RATE_DETECT_B - [4:0] */
1814  
1815  /*
1816   * R341 (0x155) - Rate Estimator 4
1817   */
1818  #define ARIZONA_SAMPLE_RATE_DETECT_C_MASK        0x001F  /* SAMPLE_RATE_DETECT_C - [4:0] */
1819  #define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT            0  /* SAMPLE_RATE_DETECT_C - [4:0] */
1820  #define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH            5  /* SAMPLE_RATE_DETECT_C - [4:0] */
1821  
1822  /*
1823   * R342 (0x156) - Rate Estimator 5
1824   */
1825  #define ARIZONA_SAMPLE_RATE_DETECT_D_MASK        0x001F  /* SAMPLE_RATE_DETECT_D - [4:0] */
1826  #define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT            0  /* SAMPLE_RATE_DETECT_D - [4:0] */
1827  #define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH            5  /* SAMPLE_RATE_DETECT_D - [4:0] */
1828  
1829  /*
1830   * R353 (0x161) - Dynamic Frequency Scaling 1
1831   */
1832  #define ARIZONA_SUBSYS_MAX_FREQ                  0x0001  /* SUBSYS_MAX_FREQ */
1833  #define ARIZONA_SUBSYS_MAX_FREQ_SHIFT                 0  /* SUBSYS_MAX_FREQ */
1834  #define ARIZONA_SUBSYS_MAX_FREQ_WIDTH                 1  /* SUBSYS_MAX_FREQ */
1835  
1836  /*
1837   * R369 (0x171) - FLL1 Control 1
1838   */
1839  #define ARIZONA_FLL1_FREERUN                     0x0002  /* FLL1_FREERUN */
1840  #define ARIZONA_FLL1_FREERUN_MASK                0x0002  /* FLL1_FREERUN */
1841  #define ARIZONA_FLL1_FREERUN_SHIFT                    1  /* FLL1_FREERUN */
1842  #define ARIZONA_FLL1_FREERUN_WIDTH                    1  /* FLL1_FREERUN */
1843  #define ARIZONA_FLL1_ENA                         0x0001  /* FLL1_ENA */
1844  #define ARIZONA_FLL1_ENA_MASK                    0x0001  /* FLL1_ENA */
1845  #define ARIZONA_FLL1_ENA_SHIFT                        0  /* FLL1_ENA */
1846  #define ARIZONA_FLL1_ENA_WIDTH                        1  /* FLL1_ENA */
1847  
1848  /*
1849   * R370 (0x172) - FLL1 Control 2
1850   */
1851  #define ARIZONA_FLL1_CTRL_UPD                    0x8000  /* FLL1_CTRL_UPD */
1852  #define ARIZONA_FLL1_CTRL_UPD_MASK               0x8000  /* FLL1_CTRL_UPD */
1853  #define ARIZONA_FLL1_CTRL_UPD_SHIFT                  15  /* FLL1_CTRL_UPD */
1854  #define ARIZONA_FLL1_CTRL_UPD_WIDTH                   1  /* FLL1_CTRL_UPD */
1855  #define ARIZONA_FLL1_N_MASK                      0x03FF  /* FLL1_N - [9:0] */
1856  #define ARIZONA_FLL1_N_SHIFT                          0  /* FLL1_N - [9:0] */
1857  #define ARIZONA_FLL1_N_WIDTH                         10  /* FLL1_N - [9:0] */
1858  
1859  /*
1860   * R371 (0x173) - FLL1 Control 3
1861   */
1862  #define ARIZONA_FLL1_THETA_MASK                  0xFFFF  /* FLL1_THETA - [15:0] */
1863  #define ARIZONA_FLL1_THETA_SHIFT                      0  /* FLL1_THETA - [15:0] */
1864  #define ARIZONA_FLL1_THETA_WIDTH                     16  /* FLL1_THETA - [15:0] */
1865  
1866  /*
1867   * R372 (0x174) - FLL1 Control 4
1868   */
1869  #define ARIZONA_FLL1_LAMBDA_MASK                 0xFFFF  /* FLL1_LAMBDA - [15:0] */
1870  #define ARIZONA_FLL1_LAMBDA_SHIFT                     0  /* FLL1_LAMBDA - [15:0] */
1871  #define ARIZONA_FLL1_LAMBDA_WIDTH                    16  /* FLL1_LAMBDA - [15:0] */
1872  
1873  /*
1874   * R373 (0x175) - FLL1 Control 5
1875   */
1876  #define ARIZONA_FLL1_FRATIO_MASK                 0x0F00  /* FLL1_FRATIO - [11:8] */
1877  #define ARIZONA_FLL1_FRATIO_SHIFT                     8  /* FLL1_FRATIO - [11:8] */
1878  #define ARIZONA_FLL1_FRATIO_WIDTH                     4  /* FLL1_FRATIO - [11:8] */
1879  #define ARIZONA_FLL1_OUTDIV_MASK                 0x000E  /* FLL1_OUTDIV - [3:1] */
1880  #define ARIZONA_FLL1_OUTDIV_SHIFT                     1  /* FLL1_OUTDIV - [3:1] */
1881  #define ARIZONA_FLL1_OUTDIV_WIDTH                     3  /* FLL1_OUTDIV - [3:1] */
1882  
1883  /*
1884   * R374 (0x176) - FLL1 Control 6
1885   */
1886  #define ARIZONA_FLL1_CLK_REF_DIV_MASK            0x00C0  /* FLL1_CLK_REF_DIV - [7:6] */
1887  #define ARIZONA_FLL1_CLK_REF_DIV_SHIFT                6  /* FLL1_CLK_REF_DIV - [7:6] */
1888  #define ARIZONA_FLL1_CLK_REF_DIV_WIDTH                2  /* FLL1_CLK_REF_DIV - [7:6] */
1889  #define ARIZONA_FLL1_CLK_REF_SRC_MASK            0x000F  /* FLL1_CLK_REF_SRC - [3:0] */
1890  #define ARIZONA_FLL1_CLK_REF_SRC_SHIFT                0  /* FLL1_CLK_REF_SRC - [3:0] */
1891  #define ARIZONA_FLL1_CLK_REF_SRC_WIDTH                4  /* FLL1_CLK_REF_SRC - [3:0] */
1892  
1893  /*
1894   * R375 (0x177) - FLL1 Loop Filter Test 1
1895   */
1896  #define ARIZONA_FLL1_FRC_INTEG_UPD               0x8000  /* FLL1_FRC_INTEG_UPD */
1897  #define ARIZONA_FLL1_FRC_INTEG_UPD_MASK          0x8000  /* FLL1_FRC_INTEG_UPD */
1898  #define ARIZONA_FLL1_FRC_INTEG_UPD_SHIFT             15  /* FLL1_FRC_INTEG_UPD */
1899  #define ARIZONA_FLL1_FRC_INTEG_UPD_WIDTH              1  /* FLL1_FRC_INTEG_UPD */
1900  #define ARIZONA_FLL1_FRC_INTEG_VAL_MASK          0x0FFF  /* FLL1_FRC_INTEG_VAL - [11:0] */
1901  #define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT              0  /* FLL1_FRC_INTEG_VAL - [11:0] */
1902  #define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH             12  /* FLL1_FRC_INTEG_VAL - [11:0] */
1903  
1904  /*
1905   * R377 (0x179) - FLL1 Control 7
1906   */
1907  #define ARIZONA_FLL1_GAIN_MASK                   0x003c  /* FLL1_GAIN */
1908  #define ARIZONA_FLL1_GAIN_SHIFT                       2  /* FLL1_GAIN */
1909  #define ARIZONA_FLL1_GAIN_WIDTH                       4  /* FLL1_GAIN */
1910  
1911  /*
1912   * R385 (0x181) - FLL1 Synchroniser 1
1913   */
1914  #define ARIZONA_FLL1_SYNC_ENA                    0x0001  /* FLL1_SYNC_ENA */
1915  #define ARIZONA_FLL1_SYNC_ENA_MASK               0x0001  /* FLL1_SYNC_ENA */
1916  #define ARIZONA_FLL1_SYNC_ENA_SHIFT                   0  /* FLL1_SYNC_ENA */
1917  #define ARIZONA_FLL1_SYNC_ENA_WIDTH                   1  /* FLL1_SYNC_ENA */
1918  
1919  /*
1920   * R386 (0x182) - FLL1 Synchroniser 2
1921   */
1922  #define ARIZONA_FLL1_SYNC_N_MASK                 0x03FF  /* FLL1_SYNC_N - [9:0] */
1923  #define ARIZONA_FLL1_SYNC_N_SHIFT                     0  /* FLL1_SYNC_N - [9:0] */
1924  #define ARIZONA_FLL1_SYNC_N_WIDTH                    10  /* FLL1_SYNC_N - [9:0] */
1925  
1926  /*
1927   * R387 (0x183) - FLL1 Synchroniser 3
1928   */
1929  #define ARIZONA_FLL1_SYNC_THETA_MASK             0xFFFF  /* FLL1_SYNC_THETA - [15:0] */
1930  #define ARIZONA_FLL1_SYNC_THETA_SHIFT                 0  /* FLL1_SYNC_THETA - [15:0] */
1931  #define ARIZONA_FLL1_SYNC_THETA_WIDTH                16  /* FLL1_SYNC_THETA - [15:0] */
1932  
1933  /*
1934   * R388 (0x184) - FLL1 Synchroniser 4
1935   */
1936  #define ARIZONA_FLL1_SYNC_LAMBDA_MASK            0xFFFF  /* FLL1_SYNC_LAMBDA - [15:0] */
1937  #define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT                0  /* FLL1_SYNC_LAMBDA - [15:0] */
1938  #define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH               16  /* FLL1_SYNC_LAMBDA - [15:0] */
1939  
1940  /*
1941   * R389 (0x185) - FLL1 Synchroniser 5
1942   */
1943  #define ARIZONA_FLL1_SYNC_FRATIO_MASK            0x0700  /* FLL1_SYNC_FRATIO - [10:8] */
1944  #define ARIZONA_FLL1_SYNC_FRATIO_SHIFT                8  /* FLL1_SYNC_FRATIO - [10:8] */
1945  #define ARIZONA_FLL1_SYNC_FRATIO_WIDTH                3  /* FLL1_SYNC_FRATIO - [10:8] */
1946  
1947  /*
1948   * R390 (0x186) - FLL1 Synchroniser 6
1949   */
1950  #define ARIZONA_FLL1_CLK_SYNC_DIV_MASK           0x00C0  /* FLL1_CLK_SYNC_DIV - [7:6] */
1951  #define ARIZONA_FLL1_CLK_SYNC_DIV_SHIFT               6  /* FLL1_CLK_SYNC_DIV - [7:6] */
1952  #define ARIZONA_FLL1_CLK_SYNC_DIV_WIDTH               2  /* FLL1_CLK_SYNC_DIV - [7:6] */
1953  #define ARIZONA_FLL1_CLK_SYNC_SRC_MASK           0x000F  /* FLL1_CLK_SYNC_SRC - [3:0] */
1954  #define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT               0  /* FLL1_CLK_SYNC_SRC - [3:0] */
1955  #define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH               4  /* FLL1_CLK_SYNC_SRC - [3:0] */
1956  
1957  /*
1958   * R391 (0x187) - FLL1 Synchroniser 7
1959   */
1960  #define ARIZONA_FLL1_SYNC_GAIN_MASK              0x003c  /* FLL1_SYNC_GAIN */
1961  #define ARIZONA_FLL1_SYNC_GAIN_SHIFT                  2  /* FLL1_SYNC_GAIN */
1962  #define ARIZONA_FLL1_SYNC_GAIN_WIDTH                  4  /* FLL1_SYNC_GAIN */
1963  #define ARIZONA_FLL1_SYNC_BW                     0x0001  /* FLL1_SYNC_BW */
1964  #define ARIZONA_FLL1_SYNC_BW_MASK                0x0001  /* FLL1_SYNC_BW */
1965  #define ARIZONA_FLL1_SYNC_BW_SHIFT                    0  /* FLL1_SYNC_BW */
1966  #define ARIZONA_FLL1_SYNC_BW_WIDTH                    1  /* FLL1_SYNC_BW */
1967  
1968  /*
1969   * R393 (0x189) - FLL1 Spread Spectrum
1970   */
1971  #define ARIZONA_FLL1_SS_AMPL_MASK                0x0030  /* FLL1_SS_AMPL - [5:4] */
1972  #define ARIZONA_FLL1_SS_AMPL_SHIFT                    4  /* FLL1_SS_AMPL - [5:4] */
1973  #define ARIZONA_FLL1_SS_AMPL_WIDTH                    2  /* FLL1_SS_AMPL - [5:4] */
1974  #define ARIZONA_FLL1_SS_FREQ_MASK                0x000C  /* FLL1_SS_FREQ - [3:2] */
1975  #define ARIZONA_FLL1_SS_FREQ_SHIFT                    2  /* FLL1_SS_FREQ - [3:2] */
1976  #define ARIZONA_FLL1_SS_FREQ_WIDTH                    2  /* FLL1_SS_FREQ - [3:2] */
1977  #define ARIZONA_FLL1_SS_SEL_MASK                 0x0003  /* FLL1_SS_SEL - [1:0] */
1978  #define ARIZONA_FLL1_SS_SEL_SHIFT                     0  /* FLL1_SS_SEL - [1:0] */
1979  #define ARIZONA_FLL1_SS_SEL_WIDTH                     2  /* FLL1_SS_SEL - [1:0] */
1980  
1981  /*
1982   * R394 (0x18A) - FLL1 GPIO Clock
1983   */
1984  #define ARIZONA_FLL1_GPDIV_MASK                  0x00FE  /* FLL1_GPDIV - [7:1] */
1985  #define ARIZONA_FLL1_GPDIV_SHIFT                      1  /* FLL1_GPDIV - [7:1] */
1986  #define ARIZONA_FLL1_GPDIV_WIDTH                      7  /* FLL1_GPDIV - [7:1] */
1987  #define ARIZONA_FLL1_GPDIV_ENA                   0x0001  /* FLL1_GPDIV_ENA */
1988  #define ARIZONA_FLL1_GPDIV_ENA_MASK              0x0001  /* FLL1_GPDIV_ENA */
1989  #define ARIZONA_FLL1_GPDIV_ENA_SHIFT                  0  /* FLL1_GPDIV_ENA */
1990  #define ARIZONA_FLL1_GPDIV_ENA_WIDTH                  1  /* FLL1_GPDIV_ENA */
1991  
1992  /*
1993   * R401 (0x191) - FLL2 Control 1
1994   */
1995  #define ARIZONA_FLL2_FREERUN                     0x0002  /* FLL2_FREERUN */
1996  #define ARIZONA_FLL2_FREERUN_MASK                0x0002  /* FLL2_FREERUN */
1997  #define ARIZONA_FLL2_FREERUN_SHIFT                    1  /* FLL2_FREERUN */
1998  #define ARIZONA_FLL2_FREERUN_WIDTH                    1  /* FLL2_FREERUN */
1999  #define ARIZONA_FLL2_ENA                         0x0001  /* FLL2_ENA */
2000  #define ARIZONA_FLL2_ENA_MASK                    0x0001  /* FLL2_ENA */
2001  #define ARIZONA_FLL2_ENA_SHIFT                        0  /* FLL2_ENA */
2002  #define ARIZONA_FLL2_ENA_WIDTH                        1  /* FLL2_ENA */
2003  
2004  /*
2005   * R402 (0x192) - FLL2 Control 2
2006   */
2007  #define ARIZONA_FLL2_CTRL_UPD                    0x8000  /* FLL2_CTRL_UPD */
2008  #define ARIZONA_FLL2_CTRL_UPD_MASK               0x8000  /* FLL2_CTRL_UPD */
2009  #define ARIZONA_FLL2_CTRL_UPD_SHIFT                  15  /* FLL2_CTRL_UPD */
2010  #define ARIZONA_FLL2_CTRL_UPD_WIDTH                   1  /* FLL2_CTRL_UPD */
2011  #define ARIZONA_FLL2_N_MASK                      0x03FF  /* FLL2_N - [9:0] */
2012  #define ARIZONA_FLL2_N_SHIFT                          0  /* FLL2_N - [9:0] */
2013  #define ARIZONA_FLL2_N_WIDTH                         10  /* FLL2_N - [9:0] */
2014  
2015  /*
2016   * R403 (0x193) - FLL2 Control 3
2017   */
2018  #define ARIZONA_FLL2_THETA_MASK                  0xFFFF  /* FLL2_THETA - [15:0] */
2019  #define ARIZONA_FLL2_THETA_SHIFT                      0  /* FLL2_THETA - [15:0] */
2020  #define ARIZONA_FLL2_THETA_WIDTH                     16  /* FLL2_THETA - [15:0] */
2021  
2022  /*
2023   * R404 (0x194) - FLL2 Control 4
2024   */
2025  #define ARIZONA_FLL2_LAMBDA_MASK                 0xFFFF  /* FLL2_LAMBDA - [15:0] */
2026  #define ARIZONA_FLL2_LAMBDA_SHIFT                     0  /* FLL2_LAMBDA - [15:0] */
2027  #define ARIZONA_FLL2_LAMBDA_WIDTH                    16  /* FLL2_LAMBDA - [15:0] */
2028  
2029  /*
2030   * R405 (0x195) - FLL2 Control 5
2031   */
2032  #define ARIZONA_FLL2_FRATIO_MASK                 0x0700  /* FLL2_FRATIO - [10:8] */
2033  #define ARIZONA_FLL2_FRATIO_SHIFT                     8  /* FLL2_FRATIO - [10:8] */
2034  #define ARIZONA_FLL2_FRATIO_WIDTH                     3  /* FLL2_FRATIO - [10:8] */
2035  #define ARIZONA_FLL2_OUTDIV_MASK                 0x000E  /* FLL2_OUTDIV - [3:1] */
2036  #define ARIZONA_FLL2_OUTDIV_SHIFT                     1  /* FLL2_OUTDIV - [3:1] */
2037  #define ARIZONA_FLL2_OUTDIV_WIDTH                     3  /* FLL2_OUTDIV - [3:1] */
2038  
2039  /*
2040   * R406 (0x196) - FLL2 Control 6
2041   */
2042  #define ARIZONA_FLL2_CLK_REF_DIV_MASK            0x00C0  /* FLL2_CLK_REF_DIV - [7:6] */
2043  #define ARIZONA_FLL2_CLK_REF_DIV_SHIFT                6  /* FLL2_CLK_REF_DIV - [7:6] */
2044  #define ARIZONA_FLL2_CLK_REF_DIV_WIDTH                2  /* FLL2_CLK_REF_DIV - [7:6] */
2045  #define ARIZONA_FLL2_CLK_REF_SRC_MASK            0x000F  /* FLL2_CLK_REF_SRC - [3:0] */
2046  #define ARIZONA_FLL2_CLK_REF_SRC_SHIFT                0  /* FLL2_CLK_REF_SRC - [3:0] */
2047  #define ARIZONA_FLL2_CLK_REF_SRC_WIDTH                4  /* FLL2_CLK_REF_SRC - [3:0] */
2048  
2049  /*
2050   * R407 (0x197) - FLL2 Loop Filter Test 1
2051   */
2052  #define ARIZONA_FLL2_FRC_INTEG_UPD               0x8000  /* FLL2_FRC_INTEG_UPD */
2053  #define ARIZONA_FLL2_FRC_INTEG_UPD_MASK          0x8000  /* FLL2_FRC_INTEG_UPD */
2054  #define ARIZONA_FLL2_FRC_INTEG_UPD_SHIFT             15  /* FLL2_FRC_INTEG_UPD */
2055  #define ARIZONA_FLL2_FRC_INTEG_UPD_WIDTH              1  /* FLL2_FRC_INTEG_UPD */
2056  #define ARIZONA_FLL2_FRC_INTEG_VAL_MASK          0x0FFF  /* FLL2_FRC_INTEG_VAL - [11:0] */
2057  #define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT              0  /* FLL2_FRC_INTEG_VAL - [11:0] */
2058  #define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH             12  /* FLL2_FRC_INTEG_VAL - [11:0] */
2059  
2060  /*
2061   * R409 (0x199) - FLL2 Control 7
2062   */
2063  #define ARIZONA_FLL2_GAIN_MASK                   0x003c  /* FLL2_GAIN */
2064  #define ARIZONA_FLL2_GAIN_SHIFT                       2  /* FLL2_GAIN */
2065  #define ARIZONA_FLL2_GAIN_WIDTH                       4  /* FLL2_GAIN */
2066  
2067  /*
2068   * R417 (0x1A1) - FLL2 Synchroniser 1
2069   */
2070  #define ARIZONA_FLL2_SYNC_ENA                    0x0001  /* FLL2_SYNC_ENA */
2071  #define ARIZONA_FLL2_SYNC_ENA_MASK               0x0001  /* FLL2_SYNC_ENA */
2072  #define ARIZONA_FLL2_SYNC_ENA_SHIFT                   0  /* FLL2_SYNC_ENA */
2073  #define ARIZONA_FLL2_SYNC_ENA_WIDTH                   1  /* FLL2_SYNC_ENA */
2074  
2075  /*
2076   * R418 (0x1A2) - FLL2 Synchroniser 2
2077   */
2078  #define ARIZONA_FLL2_SYNC_N_MASK                 0x03FF  /* FLL2_SYNC_N - [9:0] */
2079  #define ARIZONA_FLL2_SYNC_N_SHIFT                     0  /* FLL2_SYNC_N - [9:0] */
2080  #define ARIZONA_FLL2_SYNC_N_WIDTH                    10  /* FLL2_SYNC_N - [9:0] */
2081  
2082  /*
2083   * R419 (0x1A3) - FLL2 Synchroniser 3
2084   */
2085  #define ARIZONA_FLL2_SYNC_THETA_MASK             0xFFFF  /* FLL2_SYNC_THETA - [15:0] */
2086  #define ARIZONA_FLL2_SYNC_THETA_SHIFT                 0  /* FLL2_SYNC_THETA - [15:0] */
2087  #define ARIZONA_FLL2_SYNC_THETA_WIDTH                16  /* FLL2_SYNC_THETA - [15:0] */
2088  
2089  /*
2090   * R420 (0x1A4) - FLL2 Synchroniser 4
2091   */
2092  #define ARIZONA_FLL2_SYNC_LAMBDA_MASK            0xFFFF  /* FLL2_SYNC_LAMBDA - [15:0] */
2093  #define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT                0  /* FLL2_SYNC_LAMBDA - [15:0] */
2094  #define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH               16  /* FLL2_SYNC_LAMBDA - [15:0] */
2095  
2096  /*
2097   * R421 (0x1A5) - FLL2 Synchroniser 5
2098   */
2099  #define ARIZONA_FLL2_SYNC_FRATIO_MASK            0x0700  /* FLL2_SYNC_FRATIO - [10:8] */
2100  #define ARIZONA_FLL2_SYNC_FRATIO_SHIFT                8  /* FLL2_SYNC_FRATIO - [10:8] */
2101  #define ARIZONA_FLL2_SYNC_FRATIO_WIDTH                3  /* FLL2_SYNC_FRATIO - [10:8] */
2102  
2103  /*
2104   * R422 (0x1A6) - FLL2 Synchroniser 6
2105   */
2106  #define ARIZONA_FLL2_CLK_SYNC_DIV_MASK           0x00C0  /* FLL2_CLK_SYNC_DIV - [7:6] */
2107  #define ARIZONA_FLL2_CLK_SYNC_DIV_SHIFT               6  /* FLL2_CLK_SYNC_DIV - [7:6] */
2108  #define ARIZONA_FLL2_CLK_SYNC_DIV_WIDTH               2  /* FLL2_CLK_SYNC_DIV - [7:6] */
2109  #define ARIZONA_FLL2_CLK_SYNC_SRC_MASK           0x000F  /* FLL2_CLK_SYNC_SRC - [3:0] */
2110  #define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT               0  /* FLL2_CLK_SYNC_SRC - [3:0] */
2111  #define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH               4  /* FLL2_CLK_SYNC_SRC - [3:0] */
2112  
2113  /*
2114   * R423 (0x1A7) - FLL2 Synchroniser 7
2115   */
2116  #define ARIZONA_FLL2_SYNC_GAIN_MASK              0x003c  /* FLL2_SYNC_GAIN */
2117  #define ARIZONA_FLL2_SYNC_GAIN_SHIFT                  2  /* FLL2_SYNC_GAIN */
2118  #define ARIZONA_FLL2_SYNC_GAIN_WIDTH                  4  /* FLL2_SYNC_GAIN */
2119  #define ARIZONA_FLL2_SYNC_BW                     0x0001  /* FLL2_SYNC_BW */
2120  #define ARIZONA_FLL2_SYNC_BW_MASK                0x0001  /* FLL2_SYNC_BW */
2121  #define ARIZONA_FLL2_SYNC_BW_SHIFT                    0  /* FLL2_SYNC_BW */
2122  #define ARIZONA_FLL2_SYNC_BW_WIDTH                    1  /* FLL2_SYNC_BW */
2123  
2124  /*
2125   * R425 (0x1A9) - FLL2 Spread Spectrum
2126   */
2127  #define ARIZONA_FLL2_SS_AMPL_MASK                0x0030  /* FLL2_SS_AMPL - [5:4] */
2128  #define ARIZONA_FLL2_SS_AMPL_SHIFT                    4  /* FLL2_SS_AMPL - [5:4] */
2129  #define ARIZONA_FLL2_SS_AMPL_WIDTH                    2  /* FLL2_SS_AMPL - [5:4] */
2130  #define ARIZONA_FLL2_SS_FREQ_MASK                0x000C  /* FLL2_SS_FREQ - [3:2] */
2131  #define ARIZONA_FLL2_SS_FREQ_SHIFT                    2  /* FLL2_SS_FREQ - [3:2] */
2132  #define ARIZONA_FLL2_SS_FREQ_WIDTH                    2  /* FLL2_SS_FREQ - [3:2] */
2133  #define ARIZONA_FLL2_SS_SEL_MASK                 0x0003  /* FLL2_SS_SEL - [1:0] */
2134  #define ARIZONA_FLL2_SS_SEL_SHIFT                     0  /* FLL2_SS_SEL - [1:0] */
2135  #define ARIZONA_FLL2_SS_SEL_WIDTH                     2  /* FLL2_SS_SEL - [1:0] */
2136  
2137  /*
2138   * R426 (0x1AA) - FLL2 GPIO Clock
2139   */
2140  #define ARIZONA_FLL2_GPDIV_MASK                  0x00FE  /* FLL2_GPDIV - [7:1] */
2141  #define ARIZONA_FLL2_GPDIV_SHIFT                      1  /* FLL2_GPDIV - [7:1] */
2142  #define ARIZONA_FLL2_GPDIV_WIDTH                      7  /* FLL2_GPDIV - [7:1] */
2143  #define ARIZONA_FLL2_GPDIV_ENA                   0x0001  /* FLL2_GPDIV_ENA */
2144  #define ARIZONA_FLL2_GPDIV_ENA_MASK              0x0001  /* FLL2_GPDIV_ENA */
2145  #define ARIZONA_FLL2_GPDIV_ENA_SHIFT                  0  /* FLL2_GPDIV_ENA */
2146  #define ARIZONA_FLL2_GPDIV_ENA_WIDTH                  1  /* FLL2_GPDIV_ENA */
2147  
2148  /*
2149   * R512 (0x200) - Mic Charge Pump 1
2150   */
2151  #define ARIZONA_CPMIC_DISCH                      0x0004  /* CPMIC_DISCH */
2152  #define ARIZONA_CPMIC_DISCH_MASK                 0x0004  /* CPMIC_DISCH */
2153  #define ARIZONA_CPMIC_DISCH_SHIFT                     2  /* CPMIC_DISCH */
2154  #define ARIZONA_CPMIC_DISCH_WIDTH                     1  /* CPMIC_DISCH */
2155  #define ARIZONA_CPMIC_BYPASS                     0x0002  /* CPMIC_BYPASS */
2156  #define ARIZONA_CPMIC_BYPASS_MASK                0x0002  /* CPMIC_BYPASS */
2157  #define ARIZONA_CPMIC_BYPASS_SHIFT                    1  /* CPMIC_BYPASS */
2158  #define ARIZONA_CPMIC_BYPASS_WIDTH                    1  /* CPMIC_BYPASS */
2159  #define ARIZONA_CPMIC_ENA                        0x0001  /* CPMIC_ENA */
2160  #define ARIZONA_CPMIC_ENA_MASK                   0x0001  /* CPMIC_ENA */
2161  #define ARIZONA_CPMIC_ENA_SHIFT                       0  /* CPMIC_ENA */
2162  #define ARIZONA_CPMIC_ENA_WIDTH                       1  /* CPMIC_ENA */
2163  
2164  /*
2165   * R528 (0x210) - LDO1 Control 1
2166   */
2167  #define ARIZONA_LDO1_VSEL_MASK                   0x07E0  /* LDO1_VSEL - [10:5] */
2168  #define ARIZONA_LDO1_VSEL_SHIFT                       5  /* LDO1_VSEL - [10:5] */
2169  #define ARIZONA_LDO1_VSEL_WIDTH                       6  /* LDO1_VSEL - [10:5] */
2170  #define ARIZONA_LDO1_FAST                        0x0010  /* LDO1_FAST */
2171  #define ARIZONA_LDO1_FAST_MASK                   0x0010  /* LDO1_FAST */
2172  #define ARIZONA_LDO1_FAST_SHIFT                       4  /* LDO1_FAST */
2173  #define ARIZONA_LDO1_FAST_WIDTH                       1  /* LDO1_FAST */
2174  #define ARIZONA_LDO1_DISCH                       0x0004  /* LDO1_DISCH */
2175  #define ARIZONA_LDO1_DISCH_MASK                  0x0004  /* LDO1_DISCH */
2176  #define ARIZONA_LDO1_DISCH_SHIFT                      2  /* LDO1_DISCH */
2177  #define ARIZONA_LDO1_DISCH_WIDTH                      1  /* LDO1_DISCH */
2178  #define ARIZONA_LDO1_BYPASS                      0x0002  /* LDO1_BYPASS */
2179  #define ARIZONA_LDO1_BYPASS_MASK                 0x0002  /* LDO1_BYPASS */
2180  #define ARIZONA_LDO1_BYPASS_SHIFT                     1  /* LDO1_BYPASS */
2181  #define ARIZONA_LDO1_BYPASS_WIDTH                     1  /* LDO1_BYPASS */
2182  #define ARIZONA_LDO1_ENA                         0x0001  /* LDO1_ENA */
2183  #define ARIZONA_LDO1_ENA_MASK                    0x0001  /* LDO1_ENA */
2184  #define ARIZONA_LDO1_ENA_SHIFT                        0  /* LDO1_ENA */
2185  #define ARIZONA_LDO1_ENA_WIDTH                        1  /* LDO1_ENA */
2186  
2187  /*
2188   * R530 (0x212) - LDO1 Control 2
2189   */
2190  #define ARIZONA_LDO1_HI_PWR                      0x0001  /* LDO1_HI_PWR */
2191  #define ARIZONA_LDO1_HI_PWR_SHIFT                     0  /* LDO1_HI_PWR */
2192  #define ARIZONA_LDO1_HI_PWR_WIDTH                     1  /* LDO1_HI_PWR */
2193  
2194  /*
2195   * R531 (0x213) - LDO2 Control 1
2196   */
2197  #define ARIZONA_LDO2_VSEL_MASK                   0x07E0  /* LDO2_VSEL - [10:5] */
2198  #define ARIZONA_LDO2_VSEL_SHIFT                       5  /* LDO2_VSEL - [10:5] */
2199  #define ARIZONA_LDO2_VSEL_WIDTH                       6  /* LDO2_VSEL - [10:5] */
2200  #define ARIZONA_LDO2_FAST                        0x0010  /* LDO2_FAST */
2201  #define ARIZONA_LDO2_FAST_MASK                   0x0010  /* LDO2_FAST */
2202  #define ARIZONA_LDO2_FAST_SHIFT                       4  /* LDO2_FAST */
2203  #define ARIZONA_LDO2_FAST_WIDTH                       1  /* LDO2_FAST */
2204  #define ARIZONA_LDO2_DISCH                       0x0004  /* LDO2_DISCH */
2205  #define ARIZONA_LDO2_DISCH_MASK                  0x0004  /* LDO2_DISCH */
2206  #define ARIZONA_LDO2_DISCH_SHIFT                      2  /* LDO2_DISCH */
2207  #define ARIZONA_LDO2_DISCH_WIDTH                      1  /* LDO2_DISCH */
2208  #define ARIZONA_LDO2_BYPASS                      0x0002  /* LDO2_BYPASS */
2209  #define ARIZONA_LDO2_BYPASS_MASK                 0x0002  /* LDO2_BYPASS */
2210  #define ARIZONA_LDO2_BYPASS_SHIFT                     1  /* LDO2_BYPASS */
2211  #define ARIZONA_LDO2_BYPASS_WIDTH                     1  /* LDO2_BYPASS */
2212  #define ARIZONA_LDO2_ENA                         0x0001  /* LDO2_ENA */
2213  #define ARIZONA_LDO2_ENA_MASK                    0x0001  /* LDO2_ENA */
2214  #define ARIZONA_LDO2_ENA_SHIFT                        0  /* LDO2_ENA */
2215  #define ARIZONA_LDO2_ENA_WIDTH                        1  /* LDO2_ENA */
2216  
2217  /*
2218   * R536 (0x218) - Mic Bias Ctrl 1
2219   */
2220  #define ARIZONA_MICB1_EXT_CAP                    0x8000  /* MICB1_EXT_CAP */
2221  #define ARIZONA_MICB1_EXT_CAP_MASK               0x8000  /* MICB1_EXT_CAP */
2222  #define ARIZONA_MICB1_EXT_CAP_SHIFT                  15  /* MICB1_EXT_CAP */
2223  #define ARIZONA_MICB1_EXT_CAP_WIDTH                   1  /* MICB1_EXT_CAP */
2224  #define ARIZONA_MICB1_LVL_MASK                   0x01E0  /* MICB1_LVL - [8:5] */
2225  #define ARIZONA_MICB1_LVL_SHIFT                       5  /* MICB1_LVL - [8:5] */
2226  #define ARIZONA_MICB1_LVL_WIDTH                       4  /* MICB1_LVL - [8:5] */
2227  #define ARIZONA_MICB1_FAST                       0x0010  /* MICB1_FAST */
2228  #define ARIZONA_MICB1_FAST_MASK                  0x0010  /* MICB1_FAST */
2229  #define ARIZONA_MICB1_FAST_SHIFT                      4  /* MICB1_FAST */
2230  #define ARIZONA_MICB1_FAST_WIDTH                      1  /* MICB1_FAST */
2231  #define ARIZONA_MICB1_RATE                       0x0008  /* MICB1_RATE */
2232  #define ARIZONA_MICB1_RATE_MASK                  0x0008  /* MICB1_RATE */
2233  #define ARIZONA_MICB1_RATE_SHIFT                      3  /* MICB1_RATE */
2234  #define ARIZONA_MICB1_RATE_WIDTH                      1  /* MICB1_RATE */
2235  #define ARIZONA_MICB1_DISCH                      0x0004  /* MICB1_DISCH */
2236  #define ARIZONA_MICB1_DISCH_MASK                 0x0004  /* MICB1_DISCH */
2237  #define ARIZONA_MICB1_DISCH_SHIFT                     2  /* MICB1_DISCH */
2238  #define ARIZONA_MICB1_DISCH_WIDTH                     1  /* MICB1_DISCH */
2239  #define ARIZONA_MICB1_BYPASS                     0x0002  /* MICB1_BYPASS */
2240  #define ARIZONA_MICB1_BYPASS_MASK                0x0002  /* MICB1_BYPASS */
2241  #define ARIZONA_MICB1_BYPASS_SHIFT                    1  /* MICB1_BYPASS */
2242  #define ARIZONA_MICB1_BYPASS_WIDTH                    1  /* MICB1_BYPASS */
2243  #define ARIZONA_MICB1_ENA                        0x0001  /* MICB1_ENA */
2244  #define ARIZONA_MICB1_ENA_MASK                   0x0001  /* MICB1_ENA */
2245  #define ARIZONA_MICB1_ENA_SHIFT                       0  /* MICB1_ENA */
2246  #define ARIZONA_MICB1_ENA_WIDTH                       1  /* MICB1_ENA */
2247  
2248  /*
2249   * R537 (0x219) - Mic Bias Ctrl 2
2250   */
2251  #define ARIZONA_MICB2_EXT_CAP                    0x8000  /* MICB2_EXT_CAP */
2252  #define ARIZONA_MICB2_EXT_CAP_MASK               0x8000  /* MICB2_EXT_CAP */
2253  #define ARIZONA_MICB2_EXT_CAP_SHIFT                  15  /* MICB2_EXT_CAP */
2254  #define ARIZONA_MICB2_EXT_CAP_WIDTH                   1  /* MICB2_EXT_CAP */
2255  #define ARIZONA_MICB2_LVL_MASK                   0x01E0  /* MICB2_LVL - [8:5] */
2256  #define ARIZONA_MICB2_LVL_SHIFT                       5  /* MICB2_LVL - [8:5] */
2257  #define ARIZONA_MICB2_LVL_WIDTH                       4  /* MICB2_LVL - [8:5] */
2258  #define ARIZONA_MICB2_FAST                       0x0010  /* MICB2_FAST */
2259  #define ARIZONA_MICB2_FAST_MASK                  0x0010  /* MICB2_FAST */
2260  #define ARIZONA_MICB2_FAST_SHIFT                      4  /* MICB2_FAST */
2261  #define ARIZONA_MICB2_FAST_WIDTH                      1  /* MICB2_FAST */
2262  #define ARIZONA_MICB2_RATE                       0x0008  /* MICB2_RATE */
2263  #define ARIZONA_MICB2_RATE_MASK                  0x0008  /* MICB2_RATE */
2264  #define ARIZONA_MICB2_RATE_SHIFT                      3  /* MICB2_RATE */
2265  #define ARIZONA_MICB2_RATE_WIDTH                      1  /* MICB2_RATE */
2266  #define ARIZONA_MICB2_DISCH                      0x0004  /* MICB2_DISCH */
2267  #define ARIZONA_MICB2_DISCH_MASK                 0x0004  /* MICB2_DISCH */
2268  #define ARIZONA_MICB2_DISCH_SHIFT                     2  /* MICB2_DISCH */
2269  #define ARIZONA_MICB2_DISCH_WIDTH                     1  /* MICB2_DISCH */
2270  #define ARIZONA_MICB2_BYPASS                     0x0002  /* MICB2_BYPASS */
2271  #define ARIZONA_MICB2_BYPASS_MASK                0x0002  /* MICB2_BYPASS */
2272  #define ARIZONA_MICB2_BYPASS_SHIFT                    1  /* MICB2_BYPASS */
2273  #define ARIZONA_MICB2_BYPASS_WIDTH                    1  /* MICB2_BYPASS */
2274  #define ARIZONA_MICB2_ENA                        0x0001  /* MICB2_ENA */
2275  #define ARIZONA_MICB2_ENA_MASK                   0x0001  /* MICB2_ENA */
2276  #define ARIZONA_MICB2_ENA_SHIFT                       0  /* MICB2_ENA */
2277  #define ARIZONA_MICB2_ENA_WIDTH                       1  /* MICB2_ENA */
2278  
2279  /*
2280   * R538 (0x21A) - Mic Bias Ctrl 3
2281   */
2282  #define ARIZONA_MICB3_EXT_CAP                    0x8000  /* MICB3_EXT_CAP */
2283  #define ARIZONA_MICB3_EXT_CAP_MASK               0x8000  /* MICB3_EXT_CAP */
2284  #define ARIZONA_MICB3_EXT_CAP_SHIFT                  15  /* MICB3_EXT_CAP */
2285  #define ARIZONA_MICB3_EXT_CAP_WIDTH                   1  /* MICB3_EXT_CAP */
2286  #define ARIZONA_MICB3_LVL_MASK                   0x01E0  /* MICB3_LVL - [8:5] */
2287  #define ARIZONA_MICB3_LVL_SHIFT                       5  /* MICB3_LVL - [8:5] */
2288  #define ARIZONA_MICB3_LVL_WIDTH                       4  /* MICB3_LVL - [8:5] */
2289  #define ARIZONA_MICB3_FAST                       0x0010  /* MICB3_FAST */
2290  #define ARIZONA_MICB3_FAST_MASK                  0x0010  /* MICB3_FAST */
2291  #define ARIZONA_MICB3_FAST_SHIFT                      4  /* MICB3_FAST */
2292  #define ARIZONA_MICB3_FAST_WIDTH                      1  /* MICB3_FAST */
2293  #define ARIZONA_MICB3_RATE                       0x0008  /* MICB3_RATE */
2294  #define ARIZONA_MICB3_RATE_MASK                  0x0008  /* MICB3_RATE */
2295  #define ARIZONA_MICB3_RATE_SHIFT                      3  /* MICB3_RATE */
2296  #define ARIZONA_MICB3_RATE_WIDTH                      1  /* MICB3_RATE */
2297  #define ARIZONA_MICB3_DISCH                      0x0004  /* MICB3_DISCH */
2298  #define ARIZONA_MICB3_DISCH_MASK                 0x0004  /* MICB3_DISCH */
2299  #define ARIZONA_MICB3_DISCH_SHIFT                     2  /* MICB3_DISCH */
2300  #define ARIZONA_MICB3_DISCH_WIDTH                     1  /* MICB3_DISCH */
2301  #define ARIZONA_MICB3_BYPASS                     0x0002  /* MICB3_BYPASS */
2302  #define ARIZONA_MICB3_BYPASS_MASK                0x0002  /* MICB3_BYPASS */
2303  #define ARIZONA_MICB3_BYPASS_SHIFT                    1  /* MICB3_BYPASS */
2304  #define ARIZONA_MICB3_BYPASS_WIDTH                    1  /* MICB3_BYPASS */
2305  #define ARIZONA_MICB3_ENA                        0x0001  /* MICB3_ENA */
2306  #define ARIZONA_MICB3_ENA_MASK                   0x0001  /* MICB3_ENA */
2307  #define ARIZONA_MICB3_ENA_SHIFT                       0  /* MICB3_ENA */
2308  #define ARIZONA_MICB3_ENA_WIDTH                       1  /* MICB3_ENA */
2309  
2310  /*
2311   * R549 (0x225) - HP Ctrl 1L
2312   */
2313  #define ARIZONA_RMV_SHRT_HP1L                    0x4000  /* RMV_SHRT_HP1L */
2314  #define ARIZONA_RMV_SHRT_HP1L_MASK               0x4000  /* RMV_SHRT_HP1L */
2315  #define ARIZONA_RMV_SHRT_HP1L_SHIFT                  14  /* RMV_SHRT_HP1L */
2316  #define ARIZONA_RMV_SHRT_HP1L_WIDTH                   1  /* RMV_SHRT_HP1L */
2317  #define ARIZONA_HP1L_FLWR                        0x0004  /* HP1L_FLWR */
2318  #define ARIZONA_HP1L_FLWR_MASK                   0x0004  /* HP1L_FLWR */
2319  #define ARIZONA_HP1L_FLWR_SHIFT                       2  /* HP1L_FLWR */
2320  #define ARIZONA_HP1L_FLWR_WIDTH                       1  /* HP1L_FLWR */
2321  #define ARIZONA_HP1L_SHRTI                       0x0002  /* HP1L_SHRTI */
2322  #define ARIZONA_HP1L_SHRTI_MASK                  0x0002  /* HP1L_SHRTI */
2323  #define ARIZONA_HP1L_SHRTI_SHIFT                      1  /* HP1L_SHRTI */
2324  #define ARIZONA_HP1L_SHRTI_WIDTH                      1  /* HP1L_SHRTI */
2325  #define ARIZONA_HP1L_SHRTO                       0x0001  /* HP1L_SHRTO */
2326  #define ARIZONA_HP1L_SHRTO_MASK                  0x0001  /* HP1L_SHRTO */
2327  #define ARIZONA_HP1L_SHRTO_SHIFT                      0  /* HP1L_SHRTO */
2328  #define ARIZONA_HP1L_SHRTO_WIDTH                      1  /* HP1L_SHRTO */
2329  
2330  /*
2331   * R550 (0x226) - HP Ctrl 1R
2332   */
2333  #define ARIZONA_RMV_SHRT_HP1R                    0x4000  /* RMV_SHRT_HP1R */
2334  #define ARIZONA_RMV_SHRT_HP1R_MASK               0x4000  /* RMV_SHRT_HP1R */
2335  #define ARIZONA_RMV_SHRT_HP1R_SHIFT                  14  /* RMV_SHRT_HP1R */
2336  #define ARIZONA_RMV_SHRT_HP1R_WIDTH                   1  /* RMV_SHRT_HP1R */
2337  #define ARIZONA_HP1R_FLWR                        0x0004  /* HP1R_FLWR */
2338  #define ARIZONA_HP1R_FLWR_MASK                   0x0004  /* HP1R_FLWR */
2339  #define ARIZONA_HP1R_FLWR_SHIFT                       2  /* HP1R_FLWR */
2340  #define ARIZONA_HP1R_FLWR_WIDTH                       1  /* HP1R_FLWR */
2341  #define ARIZONA_HP1R_SHRTI                       0x0002  /* HP1R_SHRTI */
2342  #define ARIZONA_HP1R_SHRTI_MASK                  0x0002  /* HP1R_SHRTI */
2343  #define ARIZONA_HP1R_SHRTI_SHIFT                      1  /* HP1R_SHRTI */
2344  #define ARIZONA_HP1R_SHRTI_WIDTH                      1  /* HP1R_SHRTI */
2345  #define ARIZONA_HP1R_SHRTO                       0x0001  /* HP1R_SHRTO */
2346  #define ARIZONA_HP1R_SHRTO_MASK                  0x0001  /* HP1R_SHRTO */
2347  #define ARIZONA_HP1R_SHRTO_SHIFT                      0  /* HP1R_SHRTO */
2348  #define ARIZONA_HP1R_SHRTO_WIDTH                      1  /* HP1R_SHRTO */
2349  
2350  /*
2351   * R659 (0x293) - Accessory Detect Mode 1
2352   */
2353  #define ARIZONA_ACCDET_SRC                       0x2000  /* ACCDET_SRC */
2354  #define ARIZONA_ACCDET_SRC_MASK                  0x2000  /* ACCDET_SRC */
2355  #define ARIZONA_ACCDET_SRC_SHIFT                     13  /* ACCDET_SRC */
2356  #define ARIZONA_ACCDET_SRC_WIDTH                      1  /* ACCDET_SRC */
2357  #define ARIZONA_ACCDET_MODE_MASK                 0x0007  /* ACCDET_MODE - [2:0] */
2358  #define ARIZONA_ACCDET_MODE_SHIFT                     0  /* ACCDET_MODE - [2:0] */
2359  #define ARIZONA_ACCDET_MODE_WIDTH                     3  /* ACCDET_MODE - [2:0] */
2360  
2361  /*
2362   * R667 (0x29B) - Headphone Detect 1
2363   */
2364  #define ARIZONA_HP_IMPEDANCE_RANGE_MASK          0x0600  /* HP_IMPEDANCE_RANGE - [10:9] */
2365  #define ARIZONA_HP_IMPEDANCE_RANGE_SHIFT              9  /* HP_IMPEDANCE_RANGE - [10:9] */
2366  #define ARIZONA_HP_IMPEDANCE_RANGE_WIDTH              2  /* HP_IMPEDANCE_RANGE - [10:9] */
2367  #define ARIZONA_HP_STEP_SIZE                     0x0100  /* HP_STEP_SIZE */
2368  #define ARIZONA_HP_STEP_SIZE_MASK                0x0100  /* HP_STEP_SIZE */
2369  #define ARIZONA_HP_STEP_SIZE_SHIFT                    8  /* HP_STEP_SIZE */
2370  #define ARIZONA_HP_STEP_SIZE_WIDTH                    1  /* HP_STEP_SIZE */
2371  #define ARIZONA_HP_HOLDTIME_MASK                 0x00E0  /* HP_HOLDTIME - [7:5] */
2372  #define ARIZONA_HP_HOLDTIME_SHIFT                     5  /* HP_HOLDTIME - [7:5] */
2373  #define ARIZONA_HP_HOLDTIME_WIDTH                     3  /* HP_HOLDTIME - [7:5] */
2374  #define ARIZONA_HP_CLK_DIV_MASK                  0x0018  /* HP_CLK_DIV - [4:3] */
2375  #define ARIZONA_HP_CLK_DIV_SHIFT                      3  /* HP_CLK_DIV - [4:3] */
2376  #define ARIZONA_HP_CLK_DIV_WIDTH                      2  /* HP_CLK_DIV - [4:3] */
2377  #define ARIZONA_HP_IDAC_STEER                    0x0004  /* HP_IDAC_STEER */
2378  #define ARIZONA_HP_IDAC_STEER_MASK               0x0004  /* HP_IDAC_STEER */
2379  #define ARIZONA_HP_IDAC_STEER_SHIFT                   2  /* HP_IDAC_STEER */
2380  #define ARIZONA_HP_IDAC_STEER_WIDTH                   1  /* HP_IDAC_STEER */
2381  #define WM8998_HP_RATE_MASK                      0x0006  /* HP_RATE - [2:1] */
2382  #define WM8998_HP_RATE_SHIFT                          1  /* HP_RATE - [2:1] */
2383  #define WM8998_HP_RATE_WIDTH                          2  /* HP_RATE - [2:1] */
2384  #define ARIZONA_HP_RATE                          0x0002  /* HP_RATE */
2385  #define ARIZONA_HP_RATE_MASK                     0x0002  /* HP_RATE */
2386  #define ARIZONA_HP_RATE_SHIFT                         1  /* HP_RATE */
2387  #define ARIZONA_HP_RATE_WIDTH                         1  /* HP_RATE */
2388  #define ARIZONA_HP_POLL                          0x0001  /* HP_POLL */
2389  #define ARIZONA_HP_POLL_MASK                     0x0001  /* HP_POLL */
2390  #define ARIZONA_HP_POLL_SHIFT                         0  /* HP_POLL */
2391  #define ARIZONA_HP_POLL_WIDTH                         1  /* HP_POLL */
2392  
2393  /*
2394   * R668 (0x29C) - Headphone Detect 2
2395   */
2396  #define ARIZONA_HP_DONE                          0x0080  /* HP_DONE */
2397  #define ARIZONA_HP_DONE_MASK                     0x0080  /* HP_DONE */
2398  #define ARIZONA_HP_DONE_SHIFT                         7  /* HP_DONE */
2399  #define ARIZONA_HP_DONE_WIDTH                         1  /* HP_DONE */
2400  #define ARIZONA_HP_LVL_MASK                      0x007F  /* HP_LVL - [6:0] */
2401  #define ARIZONA_HP_LVL_SHIFT                          0  /* HP_LVL - [6:0] */
2402  #define ARIZONA_HP_LVL_WIDTH                          7  /* HP_LVL - [6:0] */
2403  
2404  #define ARIZONA_HP_DONE_B                        0x8000  /* HP_DONE */
2405  #define ARIZONA_HP_DONE_B_MASK                   0x8000  /* HP_DONE */
2406  #define ARIZONA_HP_DONE_B_SHIFT                      15  /* HP_DONE */
2407  #define ARIZONA_HP_DONE_B_WIDTH                       1  /* HP_DONE */
2408  #define ARIZONA_HP_LVL_B_MASK                    0x7FFF  /* HP_LVL - [14:0] */
2409  #define ARIZONA_HP_LVL_B_SHIFT                        0  /* HP_LVL - [14:0] */
2410  #define ARIZONA_HP_LVL_B_WIDTH                       15  /* HP_LVL - [14:0] */
2411  
2412  /*
2413   * R674 (0x2A2) - MICD clamp control
2414   */
2415  #define ARIZONA_MICD_CLAMP_MODE_MASK             0x000F  /* MICD_CLAMP_MODE - [3:0] */
2416  #define ARIZONA_MICD_CLAMP_MODE_SHIFT                 0  /* MICD_CLAMP_MODE - [3:0] */
2417  #define ARIZONA_MICD_CLAMP_MODE_WIDTH                 4  /* MICD_CLAMP_MODE - [3:0] */
2418  
2419  /*
2420   * R675 (0x2A3) - Mic Detect 1
2421   */
2422  #define ARIZONA_MICD_BIAS_STARTTIME_MASK         0xF000  /* MICD_BIAS_STARTTIME - [15:12] */
2423  #define ARIZONA_MICD_BIAS_STARTTIME_SHIFT            12  /* MICD_BIAS_STARTTIME - [15:12] */
2424  #define ARIZONA_MICD_BIAS_STARTTIME_WIDTH             4  /* MICD_BIAS_STARTTIME - [15:12] */
2425  #define ARIZONA_MICD_RATE_MASK                   0x0F00  /* MICD_RATE - [11:8] */
2426  #define ARIZONA_MICD_RATE_SHIFT                       8  /* MICD_RATE - [11:8] */
2427  #define ARIZONA_MICD_RATE_WIDTH                       4  /* MICD_RATE - [11:8] */
2428  #define ARIZONA_MICD_BIAS_SRC_MASK               0x0030  /* MICD_BIAS_SRC - [5:4] */
2429  #define ARIZONA_MICD_BIAS_SRC_SHIFT                   4  /* MICD_BIAS_SRC - [5:4] */
2430  #define ARIZONA_MICD_BIAS_SRC_WIDTH                   2  /* MICD_BIAS_SRC - [5:4] */
2431  #define ARIZONA_MICD_DBTIME                      0x0002  /* MICD_DBTIME */
2432  #define ARIZONA_MICD_DBTIME_MASK                 0x0002  /* MICD_DBTIME */
2433  #define ARIZONA_MICD_DBTIME_SHIFT                     1  /* MICD_DBTIME */
2434  #define ARIZONA_MICD_DBTIME_WIDTH                     1  /* MICD_DBTIME */
2435  #define ARIZONA_MICD_ENA                         0x0001  /* MICD_ENA */
2436  #define ARIZONA_MICD_ENA_MASK                    0x0001  /* MICD_ENA */
2437  #define ARIZONA_MICD_ENA_SHIFT                        0  /* MICD_ENA */
2438  #define ARIZONA_MICD_ENA_WIDTH                        1  /* MICD_ENA */
2439  
2440  /*
2441   * R676 (0x2A4) - Mic Detect 2
2442   */
2443  #define ARIZONA_MICD_LVL_SEL_MASK                0x00FF  /* MICD_LVL_SEL - [7:0] */
2444  #define ARIZONA_MICD_LVL_SEL_SHIFT                    0  /* MICD_LVL_SEL - [7:0] */
2445  #define ARIZONA_MICD_LVL_SEL_WIDTH                    8  /* MICD_LVL_SEL - [7:0] */
2446  
2447  /*
2448   * R677 (0x2A5) - Mic Detect 3
2449   */
2450  #define ARIZONA_MICD_LVL_0                       0x0004  /* MICD_LVL - [2] */
2451  #define ARIZONA_MICD_LVL_1                       0x0008  /* MICD_LVL - [3] */
2452  #define ARIZONA_MICD_LVL_2                       0x0010  /* MICD_LVL - [4] */
2453  #define ARIZONA_MICD_LVL_3                       0x0020  /* MICD_LVL - [5] */
2454  #define ARIZONA_MICD_LVL_4                       0x0040  /* MICD_LVL - [6] */
2455  #define ARIZONA_MICD_LVL_5                       0x0080  /* MICD_LVL - [7] */
2456  #define ARIZONA_MICD_LVL_6                       0x0100  /* MICD_LVL - [8] */
2457  #define ARIZONA_MICD_LVL_7                       0x0200  /* MICD_LVL - [9] */
2458  #define ARIZONA_MICD_LVL_8                       0x0400  /* MICD_LVL - [10] */
2459  #define ARIZONA_MICD_LVL_MASK                    0x07FC  /* MICD_LVL - [10:2] */
2460  #define ARIZONA_MICD_LVL_SHIFT                        2  /* MICD_LVL - [10:2] */
2461  #define ARIZONA_MICD_LVL_WIDTH                        9  /* MICD_LVL - [10:2] */
2462  #define ARIZONA_MICD_VALID                       0x0002  /* MICD_VALID */
2463  #define ARIZONA_MICD_VALID_MASK                  0x0002  /* MICD_VALID */
2464  #define ARIZONA_MICD_VALID_SHIFT                      1  /* MICD_VALID */
2465  #define ARIZONA_MICD_VALID_WIDTH                      1  /* MICD_VALID */
2466  #define ARIZONA_MICD_STS                         0x0001  /* MICD_STS */
2467  #define ARIZONA_MICD_STS_MASK                    0x0001  /* MICD_STS */
2468  #define ARIZONA_MICD_STS_SHIFT                        0  /* MICD_STS */
2469  #define ARIZONA_MICD_STS_WIDTH                        1  /* MICD_STS */
2470  
2471  /*
2472   * R683 (0x2AB) - Mic Detect 4
2473   */
2474  #define ARIZONA_MICDET_ADCVAL_DIFF_MASK          0xFF00  /* MICDET_ADCVAL_DIFF - [15:8] */
2475  #define ARIZONA_MICDET_ADCVAL_DIFF_SHIFT              8  /* MICDET_ADCVAL_DIFF - [15:8] */
2476  #define ARIZONA_MICDET_ADCVAL_DIFF_WIDTH              8  /* MICDET_ADCVAL_DIFF - [15:8] */
2477  #define ARIZONA_MICDET_ADCVAL_MASK               0x007F  /* MICDET_ADCVAL - [15:8] */
2478  #define ARIZONA_MICDET_ADCVAL_SHIFT                   0  /* MICDET_ADCVAL - [15:8] */
2479  #define ARIZONA_MICDET_ADCVAL_WIDTH                   7  /* MICDET_ADCVAL - [15:8] */
2480  
2481  /*
2482   * R707 (0x2C3) - Mic noise mix control 1
2483   */
2484  #define ARIZONA_MICMUTE_RATE_MASK                0x7800  /* MICMUTE_RATE - [14:11] */
2485  #define ARIZONA_MICMUTE_RATE_SHIFT                   11  /* MICMUTE_RATE - [14:11] */
2486  #define ARIZONA_MICMUTE_RATE_WIDTH                    4  /* MICMUTE_RATE - [14:11] */
2487  #define ARIZONA_MICMUTE_MIX_ENA                  0x0040  /* MICMUTE_MIX_ENA */
2488  #define ARIZONA_MICMUTE_MIX_ENA_MASK             0x0040  /* MICMUTE_MIX_ENA */
2489  #define ARIZONA_MICMUTE_MIX_ENA_SHIFT                 6  /* MICMUTE_MIX_ENA */
2490  #define ARIZONA_MICMUTE_MIX_ENA_WIDTH                 1  /* MICMUTE_MIX_ENA */
2491  
2492  /*
2493   * R715 (0x2CB) - Isolation control
2494   */
2495  #define ARIZONA_ISOLATE_DCVDD1                   0x0001  /* ISOLATE_DCVDD1 */
2496  #define ARIZONA_ISOLATE_DCVDD1_MASK              0x0001  /* ISOLATE_DCVDD1 */
2497  #define ARIZONA_ISOLATE_DCVDD1_SHIFT                  0  /* ISOLATE_DCVDD1 */
2498  #define ARIZONA_ISOLATE_DCVDD1_WIDTH                  1  /* ISOLATE_DCVDD1 */
2499  
2500  /*
2501   * R723 (0x2D3) - Jack detect analogue
2502   */
2503  #define ARIZONA_JD2_ENA                          0x0002  /* JD2_ENA */
2504  #define ARIZONA_JD2_ENA_MASK                     0x0002  /* JD2_ENA */
2505  #define ARIZONA_JD2_ENA_SHIFT                         1  /* JD2_ENA */
2506  #define ARIZONA_JD2_ENA_WIDTH                         1  /* JD2_ENA */
2507  #define ARIZONA_JD1_ENA                          0x0001  /* JD1_ENA */
2508  #define ARIZONA_JD1_ENA_MASK                     0x0001  /* JD1_ENA */
2509  #define ARIZONA_JD1_ENA_SHIFT                         0  /* JD1_ENA */
2510  #define ARIZONA_JD1_ENA_WIDTH                         1  /* JD1_ENA */
2511  
2512  /*
2513   * R768 (0x300) - Input Enables
2514   */
2515  #define ARIZONA_IN4L_ENA                         0x0080  /* IN4L_ENA */
2516  #define ARIZONA_IN4L_ENA_MASK                    0x0080  /* IN4L_ENA */
2517  #define ARIZONA_IN4L_ENA_SHIFT                        7  /* IN4L_ENA */
2518  #define ARIZONA_IN4L_ENA_WIDTH                        1  /* IN4L_ENA */
2519  #define ARIZONA_IN4R_ENA                         0x0040  /* IN4R_ENA */
2520  #define ARIZONA_IN4R_ENA_MASK                    0x0040  /* IN4R_ENA */
2521  #define ARIZONA_IN4R_ENA_SHIFT                        6  /* IN4R_ENA */
2522  #define ARIZONA_IN4R_ENA_WIDTH                        1  /* IN4R_ENA */
2523  #define ARIZONA_IN3L_ENA                         0x0020  /* IN3L_ENA */
2524  #define ARIZONA_IN3L_ENA_MASK                    0x0020  /* IN3L_ENA */
2525  #define ARIZONA_IN3L_ENA_SHIFT                        5  /* IN3L_ENA */
2526  #define ARIZONA_IN3L_ENA_WIDTH                        1  /* IN3L_ENA */
2527  #define ARIZONA_IN3R_ENA                         0x0010  /* IN3R_ENA */
2528  #define ARIZONA_IN3R_ENA_MASK                    0x0010  /* IN3R_ENA */
2529  #define ARIZONA_IN3R_ENA_SHIFT                        4  /* IN3R_ENA */
2530  #define ARIZONA_IN3R_ENA_WIDTH                        1  /* IN3R_ENA */
2531  #define ARIZONA_IN2L_ENA                         0x0008  /* IN2L_ENA */
2532  #define ARIZONA_IN2L_ENA_MASK                    0x0008  /* IN2L_ENA */
2533  #define ARIZONA_IN2L_ENA_SHIFT                        3  /* IN2L_ENA */
2534  #define ARIZONA_IN2L_ENA_WIDTH                        1  /* IN2L_ENA */
2535  #define ARIZONA_IN2R_ENA                         0x0004  /* IN2R_ENA */
2536  #define ARIZONA_IN2R_ENA_MASK                    0x0004  /* IN2R_ENA */
2537  #define ARIZONA_IN2R_ENA_SHIFT                        2  /* IN2R_ENA */
2538  #define ARIZONA_IN2R_ENA_WIDTH                        1  /* IN2R_ENA */
2539  #define ARIZONA_IN1L_ENA                         0x0002  /* IN1L_ENA */
2540  #define ARIZONA_IN1L_ENA_MASK                    0x0002  /* IN1L_ENA */
2541  #define ARIZONA_IN1L_ENA_SHIFT                        1  /* IN1L_ENA */
2542  #define ARIZONA_IN1L_ENA_WIDTH                        1  /* IN1L_ENA */
2543  #define ARIZONA_IN1R_ENA                         0x0001  /* IN1R_ENA */
2544  #define ARIZONA_IN1R_ENA_MASK                    0x0001  /* IN1R_ENA */
2545  #define ARIZONA_IN1R_ENA_SHIFT                        0  /* IN1R_ENA */
2546  #define ARIZONA_IN1R_ENA_WIDTH                        1  /* IN1R_ENA */
2547  
2548  /*
2549   * R776 (0x308) - Input Rate
2550   */
2551  #define ARIZONA_IN_RATE_MASK                     0x7800  /* IN_RATE - [14:11] */
2552  #define ARIZONA_IN_RATE_SHIFT                        11  /* IN_RATE - [14:11] */
2553  #define ARIZONA_IN_RATE_WIDTH                         4  /* IN_RATE - [14:11] */
2554  
2555  /*
2556   * R777 (0x309) - Input Volume Ramp
2557   */
2558  #define ARIZONA_IN_VD_RAMP_MASK                  0x0070  /* IN_VD_RAMP - [6:4] */
2559  #define ARIZONA_IN_VD_RAMP_SHIFT                      4  /* IN_VD_RAMP - [6:4] */
2560  #define ARIZONA_IN_VD_RAMP_WIDTH                      3  /* IN_VD_RAMP - [6:4] */
2561  #define ARIZONA_IN_VI_RAMP_MASK                  0x0007  /* IN_VI_RAMP - [2:0] */
2562  #define ARIZONA_IN_VI_RAMP_SHIFT                      0  /* IN_VI_RAMP - [2:0] */
2563  #define ARIZONA_IN_VI_RAMP_WIDTH                      3  /* IN_VI_RAMP - [2:0] */
2564  
2565  /*
2566   * R780 (0x30C) - HPF Control
2567   */
2568  #define ARIZONA_IN_HPF_CUT_MASK                  0x0007  /* IN_HPF_CUT [2:0] */
2569  #define ARIZONA_IN_HPF_CUT_SHIFT                      0  /* IN_HPF_CUT [2:0] */
2570  #define ARIZONA_IN_HPF_CUT_WIDTH                      3  /* IN_HPF_CUT [2:0] */
2571  
2572  /*
2573   * R784 (0x310) - IN1L Control
2574   */
2575  #define ARIZONA_IN1L_HPF_MASK                    0x8000  /* IN1L_HPF - [15] */
2576  #define ARIZONA_IN1L_HPF_SHIFT                       15  /* IN1L_HPF - [15] */
2577  #define ARIZONA_IN1L_HPF_WIDTH                        1  /* IN1L_HPF - [15] */
2578  #define ARIZONA_IN1_OSR_MASK                     0x6000  /* IN1_OSR - [14:13] */
2579  #define ARIZONA_IN1_OSR_SHIFT                        13  /* IN1_OSR - [14:13] */
2580  #define ARIZONA_IN1_OSR_WIDTH                         2  /* IN1_OSR - [14:13] */
2581  #define ARIZONA_IN1_DMIC_SUP_MASK                0x1800  /* IN1_DMIC_SUP - [12:11] */
2582  #define ARIZONA_IN1_DMIC_SUP_SHIFT                   11  /* IN1_DMIC_SUP - [12:11] */
2583  #define ARIZONA_IN1_DMIC_SUP_WIDTH                    2  /* IN1_DMIC_SUP - [12:11] */
2584  #define ARIZONA_IN1_MODE_MASK                    0x0400  /* IN1_MODE - [10] */
2585  #define ARIZONA_IN1_MODE_SHIFT                       10  /* IN1_MODE - [10] */
2586  #define ARIZONA_IN1_MODE_WIDTH                        1  /* IN1_MODE - [10] */
2587  #define ARIZONA_IN1_SINGLE_ENDED_MASK            0x0200  /* IN1_MODE - [9] */
2588  #define ARIZONA_IN1_SINGLE_ENDED_SHIFT                9  /* IN1_MODE - [9] */
2589  #define ARIZONA_IN1_SINGLE_ENDED_WIDTH                1  /* IN1_MODE - [9] */
2590  #define ARIZONA_IN1L_PGA_VOL_MASK                0x00FE  /* IN1L_PGA_VOL - [7:1] */
2591  #define ARIZONA_IN1L_PGA_VOL_SHIFT                    1  /* IN1L_PGA_VOL - [7:1] */
2592  #define ARIZONA_IN1L_PGA_VOL_WIDTH                    7  /* IN1L_PGA_VOL - [7:1] */
2593  
2594  /*
2595   * R785 (0x311) - ADC Digital Volume 1L
2596   */
2597  #define ARIZONA_IN1L_SRC_MASK                    0x4000  /* IN1L_SRC - [14] */
2598  #define ARIZONA_IN1L_SRC_SHIFT                       14  /* IN1L_SRC - [14] */
2599  #define ARIZONA_IN1L_SRC_WIDTH                        1  /* IN1L_SRC - [14] */
2600  #define ARIZONA_IN1L_SRC_SE_MASK                 0x2000  /* IN1L_SRC - [13] */
2601  #define ARIZONA_IN1L_SRC_SE_SHIFT                    13  /* IN1L_SRC - [13] */
2602  #define ARIZONA_IN1L_SRC_SE_WIDTH                     1  /* IN1L_SRC - [13] */
2603  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2604  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2605  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2606  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2607  #define ARIZONA_IN1L_MUTE                        0x0100  /* IN1L_MUTE */
2608  #define ARIZONA_IN1L_MUTE_MASK                   0x0100  /* IN1L_MUTE */
2609  #define ARIZONA_IN1L_MUTE_SHIFT                       8  /* IN1L_MUTE */
2610  #define ARIZONA_IN1L_MUTE_WIDTH                       1  /* IN1L_MUTE */
2611  #define ARIZONA_IN1L_DIG_VOL_MASK                0x00FF  /* IN1L_DIG_VOL - [7:0] */
2612  #define ARIZONA_IN1L_DIG_VOL_SHIFT                    0  /* IN1L_DIG_VOL - [7:0] */
2613  #define ARIZONA_IN1L_DIG_VOL_WIDTH                    8  /* IN1L_DIG_VOL - [7:0] */
2614  
2615  /*
2616   * R786 (0x312) - DMIC1L Control
2617   */
2618  #define ARIZONA_IN1_DMICL_DLY_MASK               0x003F  /* IN1_DMICL_DLY - [5:0] */
2619  #define ARIZONA_IN1_DMICL_DLY_SHIFT                   0  /* IN1_DMICL_DLY - [5:0] */
2620  #define ARIZONA_IN1_DMICL_DLY_WIDTH                   6  /* IN1_DMICL_DLY - [5:0] */
2621  
2622  /*
2623   * R788 (0x314) - IN1R Control
2624   */
2625  #define ARIZONA_IN1R_HPF_MASK                    0x8000  /* IN1R_HPF - [15] */
2626  #define ARIZONA_IN1R_HPF_SHIFT                       15  /* IN1R_HPF - [15] */
2627  #define ARIZONA_IN1R_HPF_WIDTH                        1  /* IN1R_HPF - [15] */
2628  #define ARIZONA_IN1R_PGA_VOL_MASK                0x00FE  /* IN1R_PGA_VOL - [7:1] */
2629  #define ARIZONA_IN1R_PGA_VOL_SHIFT                    1  /* IN1R_PGA_VOL - [7:1] */
2630  #define ARIZONA_IN1R_PGA_VOL_WIDTH                    7  /* IN1R_PGA_VOL - [7:1] */
2631  
2632  /*
2633   * R789 (0x315) - ADC Digital Volume 1R
2634   */
2635  #define ARIZONA_IN1R_SRC_MASK                    0x4000  /* IN1R_SRC - [14] */
2636  #define ARIZONA_IN1R_SRC_SHIFT                       14  /* IN1R_SRC - [14] */
2637  #define ARIZONA_IN1R_SRC_WIDTH                        1  /* IN1R_SRC - [14] */
2638  #define ARIZONA_IN1R_SRC_SE_MASK                 0x2000  /* IN1R_SRC - [13] */
2639  #define ARIZONA_IN1R_SRC_SE_SHIFT                    13  /* IN1R_SRC - [13] */
2640  #define ARIZONA_IN1R_SRC_SE_WIDTH                     1  /* IN1R_SRC - [13] */
2641  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2642  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2643  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2644  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2645  #define ARIZONA_IN1R_MUTE                        0x0100  /* IN1R_MUTE */
2646  #define ARIZONA_IN1R_MUTE_MASK                   0x0100  /* IN1R_MUTE */
2647  #define ARIZONA_IN1R_MUTE_SHIFT                       8  /* IN1R_MUTE */
2648  #define ARIZONA_IN1R_MUTE_WIDTH                       1  /* IN1R_MUTE */
2649  #define ARIZONA_IN1R_DIG_VOL_MASK                0x00FF  /* IN1R_DIG_VOL - [7:0] */
2650  #define ARIZONA_IN1R_DIG_VOL_SHIFT                    0  /* IN1R_DIG_VOL - [7:0] */
2651  #define ARIZONA_IN1R_DIG_VOL_WIDTH                    8  /* IN1R_DIG_VOL - [7:0] */
2652  
2653  /*
2654   * R790 (0x316) - DMIC1R Control
2655   */
2656  #define ARIZONA_IN1_DMICR_DLY_MASK               0x003F  /* IN1_DMICR_DLY - [5:0] */
2657  #define ARIZONA_IN1_DMICR_DLY_SHIFT                   0  /* IN1_DMICR_DLY - [5:0] */
2658  #define ARIZONA_IN1_DMICR_DLY_WIDTH                   6  /* IN1_DMICR_DLY - [5:0] */
2659  
2660  /*
2661   * R792 (0x318) - IN2L Control
2662   */
2663  #define ARIZONA_IN2L_HPF_MASK                    0x8000  /* IN2L_HPF - [15] */
2664  #define ARIZONA_IN2L_HPF_SHIFT                       15  /* IN2L_HPF - [15] */
2665  #define ARIZONA_IN2L_HPF_WIDTH                        1  /* IN2L_HPF - [15] */
2666  #define ARIZONA_IN2_OSR_MASK                     0x6000  /* IN2_OSR - [14:13] */
2667  #define ARIZONA_IN2_OSR_SHIFT                        13  /* IN2_OSR - [14:13] */
2668  #define ARIZONA_IN2_OSR_WIDTH                         2  /* IN2_OSR - [14:13] */
2669  #define ARIZONA_IN2_DMIC_SUP_MASK                0x1800  /* IN2_DMIC_SUP - [12:11] */
2670  #define ARIZONA_IN2_DMIC_SUP_SHIFT                   11  /* IN2_DMIC_SUP - [12:11] */
2671  #define ARIZONA_IN2_DMIC_SUP_WIDTH                    2  /* IN2_DMIC_SUP - [12:11] */
2672  #define ARIZONA_IN2_MODE_MASK                    0x0400  /* IN2_MODE - [10] */
2673  #define ARIZONA_IN2_MODE_SHIFT                       10  /* IN2_MODE - [10] */
2674  #define ARIZONA_IN2_MODE_WIDTH                        1  /* IN2_MODE - [10] */
2675  #define ARIZONA_IN2_SINGLE_ENDED_MASK            0x0200  /* IN2_MODE - [9] */
2676  #define ARIZONA_IN2_SINGLE_ENDED_SHIFT                9  /* IN2_MODE - [9] */
2677  #define ARIZONA_IN2_SINGLE_ENDED_WIDTH                1  /* IN2_MODE - [9] */
2678  #define ARIZONA_IN2L_PGA_VOL_MASK                0x00FE  /* IN2L_PGA_VOL - [7:1] */
2679  #define ARIZONA_IN2L_PGA_VOL_SHIFT                    1  /* IN2L_PGA_VOL - [7:1] */
2680  #define ARIZONA_IN2L_PGA_VOL_WIDTH                    7  /* IN2L_PGA_VOL - [7:1] */
2681  
2682  /*
2683   * R793 (0x319) - ADC Digital Volume 2L
2684   */
2685  #define ARIZONA_IN2L_SRC_MASK                    0x4000  /* IN2L_SRC - [14] */
2686  #define ARIZONA_IN2L_SRC_SHIFT                       14  /* IN2L_SRC - [14] */
2687  #define ARIZONA_IN2L_SRC_WIDTH                        1  /* IN2L_SRC - [14] */
2688  #define ARIZONA_IN2L_SRC_SE_MASK                 0x2000  /* IN2L_SRC - [13] */
2689  #define ARIZONA_IN2L_SRC_SE_SHIFT                    13  /* IN2L_SRC - [13] */
2690  #define ARIZONA_IN2L_SRC_SE_WIDTH                     1  /* IN2L_SRC - [13] */
2691  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2692  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2693  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2694  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2695  #define ARIZONA_IN2L_MUTE                        0x0100  /* IN2L_MUTE */
2696  #define ARIZONA_IN2L_MUTE_MASK                   0x0100  /* IN2L_MUTE */
2697  #define ARIZONA_IN2L_MUTE_SHIFT                       8  /* IN2L_MUTE */
2698  #define ARIZONA_IN2L_MUTE_WIDTH                       1  /* IN2L_MUTE */
2699  #define ARIZONA_IN2L_DIG_VOL_MASK                0x00FF  /* IN2L_DIG_VOL - [7:0] */
2700  #define ARIZONA_IN2L_DIG_VOL_SHIFT                    0  /* IN2L_DIG_VOL - [7:0] */
2701  #define ARIZONA_IN2L_DIG_VOL_WIDTH                    8  /* IN2L_DIG_VOL - [7:0] */
2702  
2703  /*
2704   * R794 (0x31A) - DMIC2L Control
2705   */
2706  #define ARIZONA_IN2_DMICL_DLY_MASK               0x003F  /* IN2_DMICL_DLY - [5:0] */
2707  #define ARIZONA_IN2_DMICL_DLY_SHIFT                   0  /* IN2_DMICL_DLY - [5:0] */
2708  #define ARIZONA_IN2_DMICL_DLY_WIDTH                   6  /* IN2_DMICL_DLY - [5:0] */
2709  
2710  /*
2711   * R796 (0x31C) - IN2R Control
2712   */
2713  #define ARIZONA_IN2R_HPF_MASK                    0x8000  /* IN2R_HPF - [15] */
2714  #define ARIZONA_IN2R_HPF_SHIFT                       15  /* IN2R_HPF - [15] */
2715  #define ARIZONA_IN2R_HPF_WIDTH                        1  /* IN2R_HPF - [15] */
2716  #define ARIZONA_IN2R_PGA_VOL_MASK                0x00FE  /* IN2R_PGA_VOL - [7:1] */
2717  #define ARIZONA_IN2R_PGA_VOL_SHIFT                    1  /* IN2R_PGA_VOL - [7:1] */
2718  #define ARIZONA_IN2R_PGA_VOL_WIDTH                    7  /* IN2R_PGA_VOL - [7:1] */
2719  
2720  /*
2721   * R797 (0x31D) - ADC Digital Volume 2R
2722   */
2723  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2724  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2725  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2726  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2727  #define ARIZONA_IN2R_MUTE                        0x0100  /* IN2R_MUTE */
2728  #define ARIZONA_IN2R_MUTE_MASK                   0x0100  /* IN2R_MUTE */
2729  #define ARIZONA_IN2R_MUTE_SHIFT                       8  /* IN2R_MUTE */
2730  #define ARIZONA_IN2R_MUTE_WIDTH                       1  /* IN2R_MUTE */
2731  #define ARIZONA_IN2R_DIG_VOL_MASK                0x00FF  /* IN2R_DIG_VOL - [7:0] */
2732  #define ARIZONA_IN2R_DIG_VOL_SHIFT                    0  /* IN2R_DIG_VOL - [7:0] */
2733  #define ARIZONA_IN2R_DIG_VOL_WIDTH                    8  /* IN2R_DIG_VOL - [7:0] */
2734  
2735  /*
2736   * R798 (0x31E) - DMIC2R Control
2737   */
2738  #define ARIZONA_IN2_DMICR_DLY_MASK               0x003F  /* IN2_DMICR_DLY - [5:0] */
2739  #define ARIZONA_IN2_DMICR_DLY_SHIFT                   0  /* IN2_DMICR_DLY - [5:0] */
2740  #define ARIZONA_IN2_DMICR_DLY_WIDTH                   6  /* IN2_DMICR_DLY - [5:0] */
2741  
2742  /*
2743   * R800 (0x320) - IN3L Control
2744   */
2745  #define ARIZONA_IN3L_HPF_MASK                    0x8000  /* IN3L_HPF - [15] */
2746  #define ARIZONA_IN3L_HPF_SHIFT                       15  /* IN3L_HPF - [15] */
2747  #define ARIZONA_IN3L_HPF_WIDTH                        1  /* IN3L_HPF - [15] */
2748  #define ARIZONA_IN3_OSR_MASK                     0x6000  /* IN3_OSR - [14:13] */
2749  #define ARIZONA_IN3_OSR_SHIFT                        13  /* IN3_OSR - [14:13] */
2750  #define ARIZONA_IN3_OSR_WIDTH                         2  /* IN3_OSR - [14:13] */
2751  #define ARIZONA_IN3_DMIC_SUP_MASK                0x1800  /* IN3_DMIC_SUP - [12:11] */
2752  #define ARIZONA_IN3_DMIC_SUP_SHIFT                   11  /* IN3_DMIC_SUP - [12:11] */
2753  #define ARIZONA_IN3_DMIC_SUP_WIDTH                    2  /* IN3_DMIC_SUP - [12:11] */
2754  #define ARIZONA_IN3_MODE_MASK                    0x0400  /* IN3_MODE - [10] */
2755  #define ARIZONA_IN3_MODE_SHIFT                       10  /* IN3_MODE - [10] */
2756  #define ARIZONA_IN3_MODE_WIDTH                        1  /* IN3_MODE - [10] */
2757  #define ARIZONA_IN3_SINGLE_ENDED_MASK            0x0200  /* IN3_MODE - [9] */
2758  #define ARIZONA_IN3_SINGLE_ENDED_SHIFT                9  /* IN3_MODE - [9] */
2759  #define ARIZONA_IN3_SINGLE_ENDED_WIDTH                1  /* IN3_MODE - [9] */
2760  #define ARIZONA_IN3L_PGA_VOL_MASK                0x00FE  /* IN3L_PGA_VOL - [7:1] */
2761  #define ARIZONA_IN3L_PGA_VOL_SHIFT                    1  /* IN3L_PGA_VOL - [7:1] */
2762  #define ARIZONA_IN3L_PGA_VOL_WIDTH                    7  /* IN3L_PGA_VOL - [7:1] */
2763  
2764  /*
2765   * R801 (0x321) - ADC Digital Volume 3L
2766   */
2767  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2768  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2769  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2770  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2771  #define ARIZONA_IN3L_MUTE                        0x0100  /* IN3L_MUTE */
2772  #define ARIZONA_IN3L_MUTE_MASK                   0x0100  /* IN3L_MUTE */
2773  #define ARIZONA_IN3L_MUTE_SHIFT                       8  /* IN3L_MUTE */
2774  #define ARIZONA_IN3L_MUTE_WIDTH                       1  /* IN3L_MUTE */
2775  #define ARIZONA_IN3L_DIG_VOL_MASK                0x00FF  /* IN3L_DIG_VOL - [7:0] */
2776  #define ARIZONA_IN3L_DIG_VOL_SHIFT                    0  /* IN3L_DIG_VOL - [7:0] */
2777  #define ARIZONA_IN3L_DIG_VOL_WIDTH                    8  /* IN3L_DIG_VOL - [7:0] */
2778  
2779  /*
2780   * R802 (0x322) - DMIC3L Control
2781   */
2782  #define ARIZONA_IN3_DMICL_DLY_MASK               0x003F  /* IN3_DMICL_DLY - [5:0] */
2783  #define ARIZONA_IN3_DMICL_DLY_SHIFT                   0  /* IN3_DMICL_DLY - [5:0] */
2784  #define ARIZONA_IN3_DMICL_DLY_WIDTH                   6  /* IN3_DMICL_DLY - [5:0] */
2785  
2786  /*
2787   * R804 (0x324) - IN3R Control
2788   */
2789  #define ARIZONA_IN3R_HPF_MASK                    0x8000  /* IN3R_HPF - [15] */
2790  #define ARIZONA_IN3R_HPF_SHIFT                       15  /* IN3R_HPF - [15] */
2791  #define ARIZONA_IN3R_HPF_WIDTH                        1  /* IN3R_HPF - [15] */
2792  #define ARIZONA_IN3R_PGA_VOL_MASK                0x00FE  /* IN3R_PGA_VOL - [7:1] */
2793  #define ARIZONA_IN3R_PGA_VOL_SHIFT                    1  /* IN3R_PGA_VOL - [7:1] */
2794  #define ARIZONA_IN3R_PGA_VOL_WIDTH                    7  /* IN3R_PGA_VOL - [7:1] */
2795  
2796  /*
2797   * R805 (0x325) - ADC Digital Volume 3R
2798   */
2799  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2800  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2801  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2802  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2803  #define ARIZONA_IN3R_MUTE                        0x0100  /* IN3R_MUTE */
2804  #define ARIZONA_IN3R_MUTE_MASK                   0x0100  /* IN3R_MUTE */
2805  #define ARIZONA_IN3R_MUTE_SHIFT                       8  /* IN3R_MUTE */
2806  #define ARIZONA_IN3R_MUTE_WIDTH                       1  /* IN3R_MUTE */
2807  #define ARIZONA_IN3R_DIG_VOL_MASK                0x00FF  /* IN3R_DIG_VOL - [7:0] */
2808  #define ARIZONA_IN3R_DIG_VOL_SHIFT                    0  /* IN3R_DIG_VOL - [7:0] */
2809  #define ARIZONA_IN3R_DIG_VOL_WIDTH                    8  /* IN3R_DIG_VOL - [7:0] */
2810  
2811  /*
2812   * R806 (0x326) - DMIC3R Control
2813   */
2814  #define ARIZONA_IN3_DMICR_DLY_MASK               0x003F  /* IN3_DMICR_DLY - [5:0] */
2815  #define ARIZONA_IN3_DMICR_DLY_SHIFT                   0  /* IN3_DMICR_DLY - [5:0] */
2816  #define ARIZONA_IN3_DMICR_DLY_WIDTH                   6  /* IN3_DMICR_DLY - [5:0] */
2817  
2818  /*
2819   * R808 (0x328) - IN4 Control
2820   */
2821  #define ARIZONA_IN4L_HPF_MASK                    0x8000  /* IN4L_HPF - [15] */
2822  #define ARIZONA_IN4L_HPF_SHIFT                       15  /* IN4L_HPF - [15] */
2823  #define ARIZONA_IN4L_HPF_WIDTH                        1  /* IN4L_HPF - [15] */
2824  #define ARIZONA_IN4_OSR_MASK                     0x6000  /* IN4_OSR - [14:13] */
2825  #define ARIZONA_IN4_OSR_SHIFT                        13  /* IN4_OSR - [14:13] */
2826  #define ARIZONA_IN4_OSR_WIDTH                         2  /* IN4_OSR - [14:13] */
2827  #define ARIZONA_IN4_DMIC_SUP_MASK                0x1800  /* IN4_DMIC_SUP - [12:11] */
2828  #define ARIZONA_IN4_DMIC_SUP_SHIFT                   11  /* IN4_DMIC_SUP - [12:11] */
2829  #define ARIZONA_IN4_DMIC_SUP_WIDTH                    2  /* IN4_DMIC_SUP - [12:11] */
2830  
2831  /*
2832   * R809 (0x329) - ADC Digital Volume 4L
2833   */
2834  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2835  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2836  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2837  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2838  #define ARIZONA_IN4L_MUTE                        0x0100  /* IN4L_MUTE */
2839  #define ARIZONA_IN4L_MUTE_MASK                   0x0100  /* IN4L_MUTE */
2840  #define ARIZONA_IN4L_MUTE_SHIFT                       8  /* IN4L_MUTE */
2841  #define ARIZONA_IN4L_MUTE_WIDTH                       1  /* IN4L_MUTE */
2842  #define ARIZONA_IN4L_DIG_VOL_MASK                0x00FF  /* IN4L_DIG_VOL - [7:0] */
2843  #define ARIZONA_IN4L_DIG_VOL_SHIFT                    0  /* IN4L_DIG_VOL - [7:0] */
2844  #define ARIZONA_IN4L_DIG_VOL_WIDTH                    8  /* IN4L_DIG_VOL - [7:0] */
2845  
2846  /*
2847   * R810 (0x32A) - DMIC4L Control
2848   */
2849  #define ARIZONA_IN4L_DMIC_DLY_MASK               0x003F  /* IN4L_DMIC_DLY - [5:0] */
2850  #define ARIZONA_IN4L_DMIC_DLY_SHIFT                   0  /* IN4L_DMIC_DLY - [5:0] */
2851  #define ARIZONA_IN4L_DMIC_DLY_WIDTH                   6  /* IN4L_DMIC_DLY - [5:0] */
2852  
2853  /*
2854   * R812 (0x32C) - IN4R Control
2855   */
2856  #define ARIZONA_IN4R_HPF_MASK                    0x8000  /* IN4R_HPF - [15] */
2857  #define ARIZONA_IN4R_HPF_SHIFT                       15  /* IN4R_HPF - [15] */
2858  #define ARIZONA_IN4R_HPF_WIDTH                        1  /* IN4R_HPF - [15] */
2859  
2860  /*
2861   * R813 (0x32D) - ADC Digital Volume 4R
2862   */
2863  #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
2864  #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
2865  #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
2866  #define ARIZONA_IN_VU_WIDTH                           1  /* IN_VU */
2867  #define ARIZONA_IN4R_MUTE                        0x0100  /* IN4R_MUTE */
2868  #define ARIZONA_IN4R_MUTE_MASK                   0x0100  /* IN4R_MUTE */
2869  #define ARIZONA_IN4R_MUTE_SHIFT                       8  /* IN4R_MUTE */
2870  #define ARIZONA_IN4R_MUTE_WIDTH                       1  /* IN4R_MUTE */
2871  #define ARIZONA_IN4R_DIG_VOL_MASK                0x00FF  /* IN4R_DIG_VOL - [7:0] */
2872  #define ARIZONA_IN4R_DIG_VOL_SHIFT                    0  /* IN4R_DIG_VOL - [7:0] */
2873  #define ARIZONA_IN4R_DIG_VOL_WIDTH                    8  /* IN4R_DIG_VOL - [7:0] */
2874  
2875  /*
2876   * R814 (0x32E) - DMIC4R Control
2877   */
2878  #define ARIZONA_IN4R_DMIC_DLY_MASK               0x003F  /* IN4R_DMIC_DLY - [5:0] */
2879  #define ARIZONA_IN4R_DMIC_DLY_SHIFT                   0  /* IN4R_DMIC_DLY - [5:0] */
2880  #define ARIZONA_IN4R_DMIC_DLY_WIDTH                   6  /* IN4R_DMIC_DLY - [5:0] */
2881  
2882  /*
2883   * R1024 (0x400) - Output Enables 1
2884   */
2885  #define ARIZONA_OUT6L_ENA                        0x0800  /* OUT6L_ENA */
2886  #define ARIZONA_OUT6L_ENA_MASK                   0x0800  /* OUT6L_ENA */
2887  #define ARIZONA_OUT6L_ENA_SHIFT                      11  /* OUT6L_ENA */
2888  #define ARIZONA_OUT6L_ENA_WIDTH                       1  /* OUT6L_ENA */
2889  #define ARIZONA_OUT6R_ENA                        0x0400  /* OUT6R_ENA */
2890  #define ARIZONA_OUT6R_ENA_MASK                   0x0400  /* OUT6R_ENA */
2891  #define ARIZONA_OUT6R_ENA_SHIFT                      10  /* OUT6R_ENA */
2892  #define ARIZONA_OUT6R_ENA_WIDTH                       1  /* OUT6R_ENA */
2893  #define ARIZONA_OUT5L_ENA                        0x0200  /* OUT5L_ENA */
2894  #define ARIZONA_OUT5L_ENA_MASK                   0x0200  /* OUT5L_ENA */
2895  #define ARIZONA_OUT5L_ENA_SHIFT                       9  /* OUT5L_ENA */
2896  #define ARIZONA_OUT5L_ENA_WIDTH                       1  /* OUT5L_ENA */
2897  #define ARIZONA_OUT5R_ENA                        0x0100  /* OUT5R_ENA */
2898  #define ARIZONA_OUT5R_ENA_MASK                   0x0100  /* OUT5R_ENA */
2899  #define ARIZONA_OUT5R_ENA_SHIFT                       8  /* OUT5R_ENA */
2900  #define ARIZONA_OUT5R_ENA_WIDTH                       1  /* OUT5R_ENA */
2901  #define ARIZONA_OUT4L_ENA                        0x0080  /* OUT4L_ENA */
2902  #define ARIZONA_OUT4L_ENA_MASK                   0x0080  /* OUT4L_ENA */
2903  #define ARIZONA_OUT4L_ENA_SHIFT                       7  /* OUT4L_ENA */
2904  #define ARIZONA_OUT4L_ENA_WIDTH                       1  /* OUT4L_ENA */
2905  #define ARIZONA_OUT4R_ENA                        0x0040  /* OUT4R_ENA */
2906  #define ARIZONA_OUT4R_ENA_MASK                   0x0040  /* OUT4R_ENA */
2907  #define ARIZONA_OUT4R_ENA_SHIFT                       6  /* OUT4R_ENA */
2908  #define ARIZONA_OUT4R_ENA_WIDTH                       1  /* OUT4R_ENA */
2909  #define ARIZONA_OUT3L_ENA                        0x0020  /* OUT3L_ENA */
2910  #define ARIZONA_OUT3L_ENA_MASK                   0x0020  /* OUT3L_ENA */
2911  #define ARIZONA_OUT3L_ENA_SHIFT                       5  /* OUT3L_ENA */
2912  #define ARIZONA_OUT3L_ENA_WIDTH                       1  /* OUT3L_ENA */
2913  #define ARIZONA_OUT3R_ENA                        0x0010  /* OUT3R_ENA */
2914  #define ARIZONA_OUT3R_ENA_MASK                   0x0010  /* OUT3R_ENA */
2915  #define ARIZONA_OUT3R_ENA_SHIFT                       4  /* OUT3R_ENA */
2916  #define ARIZONA_OUT3R_ENA_WIDTH                       1  /* OUT3R_ENA */
2917  #define ARIZONA_OUT2L_ENA                        0x0008  /* OUT2L_ENA */
2918  #define ARIZONA_OUT2L_ENA_MASK                   0x0008  /* OUT2L_ENA */
2919  #define ARIZONA_OUT2L_ENA_SHIFT                       3  /* OUT2L_ENA */
2920  #define ARIZONA_OUT2L_ENA_WIDTH                       1  /* OUT2L_ENA */
2921  #define ARIZONA_OUT2R_ENA                        0x0004  /* OUT2R_ENA */
2922  #define ARIZONA_OUT2R_ENA_MASK                   0x0004  /* OUT2R_ENA */
2923  #define ARIZONA_OUT2R_ENA_SHIFT                       2  /* OUT2R_ENA */
2924  #define ARIZONA_OUT2R_ENA_WIDTH                       1  /* OUT2R_ENA */
2925  #define ARIZONA_OUT1L_ENA                        0x0002  /* OUT1L_ENA */
2926  #define ARIZONA_OUT1L_ENA_MASK                   0x0002  /* OUT1L_ENA */
2927  #define ARIZONA_OUT1L_ENA_SHIFT                       1  /* OUT1L_ENA */
2928  #define ARIZONA_OUT1L_ENA_WIDTH                       1  /* OUT1L_ENA */
2929  #define ARIZONA_OUT1R_ENA                        0x0001  /* OUT1R_ENA */
2930  #define ARIZONA_OUT1R_ENA_MASK                   0x0001  /* OUT1R_ENA */
2931  #define ARIZONA_OUT1R_ENA_SHIFT                       0  /* OUT1R_ENA */
2932  #define ARIZONA_OUT1R_ENA_WIDTH                       1  /* OUT1R_ENA */
2933  
2934  /*
2935   * R1025 (0x401) - Output Status 1
2936   */
2937  #define ARIZONA_OUT6L_ENA_STS                    0x0800  /* OUT6L_ENA_STS */
2938  #define ARIZONA_OUT6L_ENA_STS_MASK               0x0800  /* OUT6L_ENA_STS */
2939  #define ARIZONA_OUT6L_ENA_STS_SHIFT                  11  /* OUT6L_ENA_STS */
2940  #define ARIZONA_OUT6L_ENA_STS_WIDTH                   1  /* OUT6L_ENA_STS */
2941  #define ARIZONA_OUT6R_ENA_STS                    0x0400  /* OUT6R_ENA_STS */
2942  #define ARIZONA_OUT6R_ENA_STS_MASK               0x0400  /* OUT6R_ENA_STS */
2943  #define ARIZONA_OUT6R_ENA_STS_SHIFT                  10  /* OUT6R_ENA_STS */
2944  #define ARIZONA_OUT6R_ENA_STS_WIDTH                   1  /* OUT6R_ENA_STS */
2945  #define ARIZONA_OUT5L_ENA_STS                    0x0200  /* OUT5L_ENA_STS */
2946  #define ARIZONA_OUT5L_ENA_STS_MASK               0x0200  /* OUT5L_ENA_STS */
2947  #define ARIZONA_OUT5L_ENA_STS_SHIFT                   9  /* OUT5L_ENA_STS */
2948  #define ARIZONA_OUT5L_ENA_STS_WIDTH                   1  /* OUT5L_ENA_STS */
2949  #define ARIZONA_OUT5R_ENA_STS                    0x0100  /* OUT5R_ENA_STS */
2950  #define ARIZONA_OUT5R_ENA_STS_MASK               0x0100  /* OUT5R_ENA_STS */
2951  #define ARIZONA_OUT5R_ENA_STS_SHIFT                   8  /* OUT5R_ENA_STS */
2952  #define ARIZONA_OUT5R_ENA_STS_WIDTH                   1  /* OUT5R_ENA_STS */
2953  #define ARIZONA_OUT4L_ENA_STS                    0x0080  /* OUT4L_ENA_STS */
2954  #define ARIZONA_OUT4L_ENA_STS_MASK               0x0080  /* OUT4L_ENA_STS */
2955  #define ARIZONA_OUT4L_ENA_STS_SHIFT                   7  /* OUT4L_ENA_STS */
2956  #define ARIZONA_OUT4L_ENA_STS_WIDTH                   1  /* OUT4L_ENA_STS */
2957  #define ARIZONA_OUT4R_ENA_STS                    0x0040  /* OUT4R_ENA_STS */
2958  #define ARIZONA_OUT4R_ENA_STS_MASK               0x0040  /* OUT4R_ENA_STS */
2959  #define ARIZONA_OUT4R_ENA_STS_SHIFT                   6  /* OUT4R_ENA_STS */
2960  #define ARIZONA_OUT4R_ENA_STS_WIDTH                   1  /* OUT4R_ENA_STS */
2961  
2962  /*
2963   * R1032 (0x408) - Output Rate 1
2964   */
2965  #define ARIZONA_OUT_RATE_MASK                    0x7800  /* OUT_RATE - [14:11] */
2966  #define ARIZONA_OUT_RATE_SHIFT                       11  /* OUT_RATE - [14:11] */
2967  #define ARIZONA_OUT_RATE_WIDTH                        4  /* OUT_RATE - [14:11] */
2968  
2969  /*
2970   * R1033 (0x409) - Output Volume Ramp
2971   */
2972  #define ARIZONA_OUT_VD_RAMP_MASK                 0x0070  /* OUT_VD_RAMP - [6:4] */
2973  #define ARIZONA_OUT_VD_RAMP_SHIFT                     4  /* OUT_VD_RAMP - [6:4] */
2974  #define ARIZONA_OUT_VD_RAMP_WIDTH                     3  /* OUT_VD_RAMP - [6:4] */
2975  #define ARIZONA_OUT_VI_RAMP_MASK                 0x0007  /* OUT_VI_RAMP - [2:0] */
2976  #define ARIZONA_OUT_VI_RAMP_SHIFT                     0  /* OUT_VI_RAMP - [2:0] */
2977  #define ARIZONA_OUT_VI_RAMP_WIDTH                     3  /* OUT_VI_RAMP - [2:0] */
2978  
2979  /*
2980   * R1040 (0x410) - Output Path Config 1L
2981   */
2982  #define ARIZONA_OUT1_LP_MODE                     0x8000  /* OUT1_LP_MODE */
2983  #define ARIZONA_OUT1_LP_MODE_MASK                0x8000  /* OUT1_LP_MODE */
2984  #define ARIZONA_OUT1_LP_MODE_SHIFT                   15  /* OUT1_LP_MODE */
2985  #define ARIZONA_OUT1_LP_MODE_WIDTH                    1  /* OUT1_LP_MODE */
2986  #define ARIZONA_OUT1_OSR                         0x2000  /* OUT1_OSR */
2987  #define ARIZONA_OUT1_OSR_MASK                    0x2000  /* OUT1_OSR */
2988  #define ARIZONA_OUT1_OSR_SHIFT                       13  /* OUT1_OSR */
2989  #define ARIZONA_OUT1_OSR_WIDTH                        1  /* OUT1_OSR */
2990  #define ARIZONA_OUT1_MONO                        0x1000  /* OUT1_MONO */
2991  #define ARIZONA_OUT1_MONO_MASK                   0x1000  /* OUT1_MONO */
2992  #define ARIZONA_OUT1_MONO_SHIFT                      12  /* OUT1_MONO */
2993  #define ARIZONA_OUT1_MONO_WIDTH                       1  /* OUT1_MONO */
2994  #define ARIZONA_OUT1L_ANC_SRC_MASK               0x0C00  /* OUT1L_ANC_SRC - [11:10] */
2995  #define ARIZONA_OUT1L_ANC_SRC_SHIFT                  10  /* OUT1L_ANC_SRC - [11:10] */
2996  #define ARIZONA_OUT1L_ANC_SRC_WIDTH                   2  /* OUT1L_ANC_SRC - [11:10] */
2997  #define ARIZONA_OUT1L_PGA_VOL_MASK               0x00FE  /* OUT1L_PGA_VOL - [7:1] */
2998  #define ARIZONA_OUT1L_PGA_VOL_SHIFT                   1  /* OUT1L_PGA_VOL - [7:1] */
2999  #define ARIZONA_OUT1L_PGA_VOL_WIDTH                   7  /* OUT1L_PGA_VOL - [7:1] */
3000  
3001  /*
3002   * R1041 (0x411) - DAC Digital Volume 1L
3003   */
3004  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3005  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3006  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3007  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3008  #define ARIZONA_OUT1L_MUTE                       0x0100  /* OUT1L_MUTE */
3009  #define ARIZONA_OUT1L_MUTE_MASK                  0x0100  /* OUT1L_MUTE */
3010  #define ARIZONA_OUT1L_MUTE_SHIFT                      8  /* OUT1L_MUTE */
3011  #define ARIZONA_OUT1L_MUTE_WIDTH                      1  /* OUT1L_MUTE */
3012  #define ARIZONA_OUT1L_VOL_MASK                   0x00FF  /* OUT1L_VOL - [7:0] */
3013  #define ARIZONA_OUT1L_VOL_SHIFT                       0  /* OUT1L_VOL - [7:0] */
3014  #define ARIZONA_OUT1L_VOL_WIDTH                       8  /* OUT1L_VOL - [7:0] */
3015  
3016  /*
3017   * R1042 (0x412) - DAC Volume Limit 1L
3018   */
3019  #define ARIZONA_OUT1L_VOL_LIM_MASK               0x00FF  /* OUT1L_VOL_LIM - [7:0] */
3020  #define ARIZONA_OUT1L_VOL_LIM_SHIFT                   0  /* OUT1L_VOL_LIM - [7:0] */
3021  #define ARIZONA_OUT1L_VOL_LIM_WIDTH                   8  /* OUT1L_VOL_LIM - [7:0] */
3022  
3023  /*
3024   * R1043 (0x413) - Noise Gate Select 1L
3025   */
3026  #define ARIZONA_OUT1L_NGATE_SRC_MASK             0x0FFF  /* OUT1L_NGATE_SRC - [11:0] */
3027  #define ARIZONA_OUT1L_NGATE_SRC_SHIFT                 0  /* OUT1L_NGATE_SRC - [11:0] */
3028  #define ARIZONA_OUT1L_NGATE_SRC_WIDTH                12  /* OUT1L_NGATE_SRC - [11:0] */
3029  
3030  /*
3031   * R1044 (0x414) - Output Path Config 1R
3032   */
3033  #define ARIZONA_OUT1R_ANC_SRC_MASK               0x0C00  /* OUT1R_ANC_SRC - [11:10] */
3034  #define ARIZONA_OUT1R_ANC_SRC_SHIFT                  10  /* OUT1R_ANC_SRC - [11:10] */
3035  #define ARIZONA_OUT1R_ANC_SRC_WIDTH                   2  /* OUT1R_ANC_SRC - [11:10] */
3036  #define ARIZONA_OUT1R_PGA_VOL_MASK               0x00FE  /* OUT1R_PGA_VOL - [7:1] */
3037  #define ARIZONA_OUT1R_PGA_VOL_SHIFT                   1  /* OUT1R_PGA_VOL - [7:1] */
3038  #define ARIZONA_OUT1R_PGA_VOL_WIDTH                   7  /* OUT1R_PGA_VOL - [7:1] */
3039  
3040  /*
3041   * R1045 (0x415) - DAC Digital Volume 1R
3042   */
3043  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3044  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3045  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3046  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3047  #define ARIZONA_OUT1R_MUTE                       0x0100  /* OUT1R_MUTE */
3048  #define ARIZONA_OUT1R_MUTE_MASK                  0x0100  /* OUT1R_MUTE */
3049  #define ARIZONA_OUT1R_MUTE_SHIFT                      8  /* OUT1R_MUTE */
3050  #define ARIZONA_OUT1R_MUTE_WIDTH                      1  /* OUT1R_MUTE */
3051  #define ARIZONA_OUT1R_VOL_MASK                   0x00FF  /* OUT1R_VOL - [7:0] */
3052  #define ARIZONA_OUT1R_VOL_SHIFT                       0  /* OUT1R_VOL - [7:0] */
3053  #define ARIZONA_OUT1R_VOL_WIDTH                       8  /* OUT1R_VOL - [7:0] */
3054  
3055  /*
3056   * R1046 (0x416) - DAC Volume Limit 1R
3057   */
3058  #define ARIZONA_OUT1R_VOL_LIM_MASK               0x00FF  /* OUT1R_VOL_LIM - [7:0] */
3059  #define ARIZONA_OUT1R_VOL_LIM_SHIFT                   0  /* OUT1R_VOL_LIM - [7:0] */
3060  #define ARIZONA_OUT1R_VOL_LIM_WIDTH                   8  /* OUT1R_VOL_LIM - [7:0] */
3061  
3062  /*
3063   * R1047 (0x417) - Noise Gate Select 1R
3064   */
3065  #define ARIZONA_OUT1R_NGATE_SRC_MASK             0x0FFF  /* OUT1R_NGATE_SRC - [11:0] */
3066  #define ARIZONA_OUT1R_NGATE_SRC_SHIFT                 0  /* OUT1R_NGATE_SRC - [11:0] */
3067  #define ARIZONA_OUT1R_NGATE_SRC_WIDTH                12  /* OUT1R_NGATE_SRC - [11:0] */
3068  
3069  /*
3070   * R1048 (0x418) - Output Path Config 2L
3071   */
3072  #define ARIZONA_OUT2_LP_MODE                     0x8000  /* OUT2_LP_MODE */
3073  #define ARIZONA_OUT2_LP_MODE_MASK                0x8000  /* OUT2_LP_MODE */
3074  #define ARIZONA_OUT2_LP_MODE_SHIFT                   15  /* OUT2_LP_MODE */
3075  #define ARIZONA_OUT2_LP_MODE_WIDTH                    1  /* OUT2_LP_MODE */
3076  #define ARIZONA_OUT2_OSR                         0x2000  /* OUT2_OSR */
3077  #define ARIZONA_OUT2_OSR_MASK                    0x2000  /* OUT2_OSR */
3078  #define ARIZONA_OUT2_OSR_SHIFT                       13  /* OUT2_OSR */
3079  #define ARIZONA_OUT2_OSR_WIDTH                        1  /* OUT2_OSR */
3080  #define ARIZONA_OUT2_MONO                        0x1000  /* OUT2_MONO */
3081  #define ARIZONA_OUT2_MONO_MASK                   0x1000  /* OUT2_MONO */
3082  #define ARIZONA_OUT2_MONO_SHIFT                      12  /* OUT2_MONO */
3083  #define ARIZONA_OUT2_MONO_WIDTH                       1  /* OUT2_MONO */
3084  #define ARIZONA_OUT2L_ANC_SRC_MASK               0x0C00  /* OUT2L_ANC_SRC - [11:10] */
3085  #define ARIZONA_OUT2L_ANC_SRC_SHIFT                  10  /* OUT2L_ANC_SRC - [11:10] */
3086  #define ARIZONA_OUT2L_ANC_SRC_WIDTH                   2  /* OUT2L_ANC_SRC - [11:10] */
3087  #define ARIZONA_OUT2L_PGA_VOL_MASK               0x00FE  /* OUT2L_PGA_VOL - [7:1] */
3088  #define ARIZONA_OUT2L_PGA_VOL_SHIFT                   1  /* OUT2L_PGA_VOL - [7:1] */
3089  #define ARIZONA_OUT2L_PGA_VOL_WIDTH                   7  /* OUT2L_PGA_VOL - [7:1] */
3090  
3091  /*
3092   * R1049 (0x419) - DAC Digital Volume 2L
3093   */
3094  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3095  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3096  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3097  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3098  #define ARIZONA_OUT2L_MUTE                       0x0100  /* OUT2L_MUTE */
3099  #define ARIZONA_OUT2L_MUTE_MASK                  0x0100  /* OUT2L_MUTE */
3100  #define ARIZONA_OUT2L_MUTE_SHIFT                      8  /* OUT2L_MUTE */
3101  #define ARIZONA_OUT2L_MUTE_WIDTH                      1  /* OUT2L_MUTE */
3102  #define ARIZONA_OUT2L_VOL_MASK                   0x00FF  /* OUT2L_VOL - [7:0] */
3103  #define ARIZONA_OUT2L_VOL_SHIFT                       0  /* OUT2L_VOL - [7:0] */
3104  #define ARIZONA_OUT2L_VOL_WIDTH                       8  /* OUT2L_VOL - [7:0] */
3105  
3106  /*
3107   * R1050 (0x41A) - DAC Volume Limit 2L
3108   */
3109  #define ARIZONA_OUT2L_VOL_LIM_MASK               0x00FF  /* OUT2L_VOL_LIM - [7:0] */
3110  #define ARIZONA_OUT2L_VOL_LIM_SHIFT                   0  /* OUT2L_VOL_LIM - [7:0] */
3111  #define ARIZONA_OUT2L_VOL_LIM_WIDTH                   8  /* OUT2L_VOL_LIM - [7:0] */
3112  
3113  /*
3114   * R1051 (0x41B) - Noise Gate Select 2L
3115   */
3116  #define ARIZONA_OUT2L_NGATE_SRC_MASK             0x0FFF  /* OUT2L_NGATE_SRC - [11:0] */
3117  #define ARIZONA_OUT2L_NGATE_SRC_SHIFT                 0  /* OUT2L_NGATE_SRC - [11:0] */
3118  #define ARIZONA_OUT2L_NGATE_SRC_WIDTH                12  /* OUT2L_NGATE_SRC - [11:0] */
3119  
3120  /*
3121   * R1052 (0x41C) - Output Path Config 2R
3122   */
3123  #define ARIZONA_OUT2R_ANC_SRC_MASK               0x0C00  /* OUT2R_ANC_SRC - [11:10] */
3124  #define ARIZONA_OUT2R_ANC_SRC_SHIFT                  10  /* OUT2R_ANC_SRC - [11:10] */
3125  #define ARIZONA_OUT2R_ANC_SRC_WIDTH                   2  /* OUT2R_ANC_SRC - [11:10] */
3126  #define ARIZONA_OUT2R_PGA_VOL_MASK               0x00FE  /* OUT2R_PGA_VOL - [7:1] */
3127  #define ARIZONA_OUT2R_PGA_VOL_SHIFT                   1  /* OUT2R_PGA_VOL - [7:1] */
3128  #define ARIZONA_OUT2R_PGA_VOL_WIDTH                   7  /* OUT2R_PGA_VOL - [7:1] */
3129  
3130  /*
3131   * R1053 (0x41D) - DAC Digital Volume 2R
3132   */
3133  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3134  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3135  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3136  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3137  #define ARIZONA_OUT2R_MUTE                       0x0100  /* OUT2R_MUTE */
3138  #define ARIZONA_OUT2R_MUTE_MASK                  0x0100  /* OUT2R_MUTE */
3139  #define ARIZONA_OUT2R_MUTE_SHIFT                      8  /* OUT2R_MUTE */
3140  #define ARIZONA_OUT2R_MUTE_WIDTH                      1  /* OUT2R_MUTE */
3141  #define ARIZONA_OUT2R_VOL_MASK                   0x00FF  /* OUT2R_VOL - [7:0] */
3142  #define ARIZONA_OUT2R_VOL_SHIFT                       0  /* OUT2R_VOL - [7:0] */
3143  #define ARIZONA_OUT2R_VOL_WIDTH                       8  /* OUT2R_VOL - [7:0] */
3144  
3145  /*
3146   * R1054 (0x41E) - DAC Volume Limit 2R
3147   */
3148  #define ARIZONA_OUT2R_VOL_LIM_MASK               0x00FF  /* OUT2R_VOL_LIM - [7:0] */
3149  #define ARIZONA_OUT2R_VOL_LIM_SHIFT                   0  /* OUT2R_VOL_LIM - [7:0] */
3150  #define ARIZONA_OUT2R_VOL_LIM_WIDTH                   8  /* OUT2R_VOL_LIM - [7:0] */
3151  
3152  /*
3153   * R1055 (0x41F) - Noise Gate Select 2R
3154   */
3155  #define ARIZONA_OUT2R_NGATE_SRC_MASK             0x0FFF  /* OUT2R_NGATE_SRC - [11:0] */
3156  #define ARIZONA_OUT2R_NGATE_SRC_SHIFT                 0  /* OUT2R_NGATE_SRC - [11:0] */
3157  #define ARIZONA_OUT2R_NGATE_SRC_WIDTH                12  /* OUT2R_NGATE_SRC - [11:0] */
3158  
3159  /*
3160   * R1056 (0x420) - Output Path Config 3L
3161   */
3162  #define ARIZONA_OUT3_LP_MODE                     0x8000  /* OUT3_LP_MODE */
3163  #define ARIZONA_OUT3_LP_MODE_MASK                0x8000  /* OUT3_LP_MODE */
3164  #define ARIZONA_OUT3_LP_MODE_SHIFT                   15  /* OUT3_LP_MODE */
3165  #define ARIZONA_OUT3_LP_MODE_WIDTH                    1  /* OUT3_LP_MODE */
3166  #define ARIZONA_OUT3_OSR                         0x2000  /* OUT3_OSR */
3167  #define ARIZONA_OUT3_OSR_MASK                    0x2000  /* OUT3_OSR */
3168  #define ARIZONA_OUT3_OSR_SHIFT                       13  /* OUT3_OSR */
3169  #define ARIZONA_OUT3_OSR_WIDTH                        1  /* OUT3_OSR */
3170  #define ARIZONA_OUT3_MONO                        0x1000  /* OUT3_MONO */
3171  #define ARIZONA_OUT3_MONO_MASK                   0x1000  /* OUT3_MONO */
3172  #define ARIZONA_OUT3_MONO_SHIFT                      12  /* OUT3_MONO */
3173  #define ARIZONA_OUT3_MONO_WIDTH                       1  /* OUT3_MONO */
3174  #define ARIZONA_OUT3L_ANC_SRC_MASK               0x0C00  /* OUT3L_ANC_SRC - [11:10] */
3175  #define ARIZONA_OUT3L_ANC_SRC_SHIFT                  10  /* OUT3L_ANC_SRC - [11:10] */
3176  #define ARIZONA_OUT3L_ANC_SRC_WIDTH                   2  /* OUT3L_ANC_SRC - [11:10] */
3177  #define ARIZONA_OUT3L_PGA_VOL_MASK               0x00FE  /* OUT3L_PGA_VOL - [7:1] */
3178  #define ARIZONA_OUT3L_PGA_VOL_SHIFT                   1  /* OUT3L_PGA_VOL - [7:1] */
3179  #define ARIZONA_OUT3L_PGA_VOL_WIDTH                   7  /* OUT3L_PGA_VOL - [7:1] */
3180  
3181  /*
3182   * R1057 (0x421) - DAC Digital Volume 3L
3183   */
3184  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3185  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3186  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3187  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3188  #define ARIZONA_OUT3L_MUTE                       0x0100  /* OUT3L_MUTE */
3189  #define ARIZONA_OUT3L_MUTE_MASK                  0x0100  /* OUT3L_MUTE */
3190  #define ARIZONA_OUT3L_MUTE_SHIFT                      8  /* OUT3L_MUTE */
3191  #define ARIZONA_OUT3L_MUTE_WIDTH                      1  /* OUT3L_MUTE */
3192  #define ARIZONA_OUT3L_VOL_MASK                   0x00FF  /* OUT3L_VOL - [7:0] */
3193  #define ARIZONA_OUT3L_VOL_SHIFT                       0  /* OUT3L_VOL - [7:0] */
3194  #define ARIZONA_OUT3L_VOL_WIDTH                       8  /* OUT3L_VOL - [7:0] */
3195  
3196  /*
3197   * R1058 (0x422) - DAC Volume Limit 3L
3198   */
3199  #define ARIZONA_OUT3L_VOL_LIM_MASK               0x00FF  /* OUT3L_VOL_LIM - [7:0] */
3200  #define ARIZONA_OUT3L_VOL_LIM_SHIFT                   0  /* OUT3L_VOL_LIM - [7:0] */
3201  #define ARIZONA_OUT3L_VOL_LIM_WIDTH                   8  /* OUT3L_VOL_LIM - [7:0] */
3202  
3203  /*
3204   * R1059 (0x423) - Noise Gate Select 3L
3205   */
3206  #define ARIZONA_OUT3_NGATE_SRC_MASK              0x0FFF  /* OUT3_NGATE_SRC - [11:0] */
3207  #define ARIZONA_OUT3_NGATE_SRC_SHIFT                  0  /* OUT3_NGATE_SRC - [11:0] */
3208  #define ARIZONA_OUT3_NGATE_SRC_WIDTH                 12  /* OUT3_NGATE_SRC - [11:0] */
3209  
3210  /*
3211   * R1060 (0x424) - Output Path Config 3R
3212   */
3213  #define ARIZONA_OUT3R_PGA_VOL_MASK               0x00FE  /* OUT3R_PGA_VOL - [7:1] */
3214  #define ARIZONA_OUT3R_PGA_VOL_SHIFT                   1  /* OUT3R_PGA_VOL - [7:1] */
3215  #define ARIZONA_OUT3R_PGA_VOL_WIDTH                   7  /* OUT3R_PGA_VOL - [7:1] */
3216  
3217  /*
3218   * R1061 (0x425) - DAC Digital Volume 3R
3219   */
3220  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3221  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3222  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3223  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3224  #define ARIZONA_OUT3R_MUTE                       0x0100  /* OUT3R_MUTE */
3225  #define ARIZONA_OUT3R_MUTE_MASK                  0x0100  /* OUT3R_MUTE */
3226  #define ARIZONA_OUT3R_MUTE_SHIFT                      8  /* OUT3R_MUTE */
3227  #define ARIZONA_OUT3R_MUTE_WIDTH                      1  /* OUT3R_MUTE */
3228  #define ARIZONA_OUT3R_VOL_MASK                   0x00FF  /* OUT3R_VOL - [7:0] */
3229  #define ARIZONA_OUT3R_VOL_SHIFT                       0  /* OUT3R_VOL - [7:0] */
3230  #define ARIZONA_OUT3R_VOL_WIDTH                       8  /* OUT3R_VOL - [7:0] */
3231  
3232  /*
3233   * R1062 (0x426) - DAC Volume Limit 3R
3234   */
3235  #define ARIZONA_OUT3R_ANC_SRC_MASK               0x0C00  /* OUT3R_ANC_SRC - [11:10] */
3236  #define ARIZONA_OUT3R_ANC_SRC_SHIFT                  10  /* OUT3R_ANC_SRC - [11:10] */
3237  #define ARIZONA_OUT3R_ANC_SRC_WIDTH                   2  /* OUT3R_ANC_SRC - [11:10] */
3238  #define ARIZONA_OUT3R_VOL_LIM_MASK               0x00FF  /* OUT3R_VOL_LIM - [7:0] */
3239  #define ARIZONA_OUT3R_VOL_LIM_SHIFT                   0  /* OUT3R_VOL_LIM - [7:0] */
3240  #define ARIZONA_OUT3R_VOL_LIM_WIDTH                   8  /* OUT3R_VOL_LIM - [7:0] */
3241  
3242  /*
3243   * R1064 (0x428) - Output Path Config 4L
3244   */
3245  #define ARIZONA_OUT4_OSR                         0x2000  /* OUT4_OSR */
3246  #define ARIZONA_OUT4_OSR_MASK                    0x2000  /* OUT4_OSR */
3247  #define ARIZONA_OUT4_OSR_SHIFT                       13  /* OUT4_OSR */
3248  #define ARIZONA_OUT4_OSR_WIDTH                        1  /* OUT4_OSR */
3249  #define ARIZONA_OUT4L_ANC_SRC_MASK               0x0C00  /* OUT4L_ANC_SRC - [11:10] */
3250  #define ARIZONA_OUT4L_ANC_SRC_SHIFT                  10  /* OUT4L_ANC_SRC - [11:10] */
3251  #define ARIZONA_OUT4L_ANC_SRC_WIDTH                   2  /* OUT4L_ANC_SRC - [11:10] */
3252  
3253  /*
3254   * R1065 (0x429) - DAC Digital Volume 4L
3255   */
3256  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3257  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3258  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3259  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3260  #define ARIZONA_OUT4L_MUTE                       0x0100  /* OUT4L_MUTE */
3261  #define ARIZONA_OUT4L_MUTE_MASK                  0x0100  /* OUT4L_MUTE */
3262  #define ARIZONA_OUT4L_MUTE_SHIFT                      8  /* OUT4L_MUTE */
3263  #define ARIZONA_OUT4L_MUTE_WIDTH                      1  /* OUT4L_MUTE */
3264  #define ARIZONA_OUT4L_VOL_MASK                   0x00FF  /* OUT4L_VOL - [7:0] */
3265  #define ARIZONA_OUT4L_VOL_SHIFT                       0  /* OUT4L_VOL - [7:0] */
3266  #define ARIZONA_OUT4L_VOL_WIDTH                       8  /* OUT4L_VOL - [7:0] */
3267  
3268  /*
3269   * R1066 (0x42A) - Out Volume 4L
3270   */
3271  #define ARIZONA_OUT4L_VOL_LIM_MASK               0x00FF  /* OUT4L_VOL_LIM - [7:0] */
3272  #define ARIZONA_OUT4L_VOL_LIM_SHIFT                   0  /* OUT4L_VOL_LIM - [7:0] */
3273  #define ARIZONA_OUT4L_VOL_LIM_WIDTH                   8  /* OUT4L_VOL_LIM - [7:0] */
3274  
3275  /*
3276   * R1067 (0x42B) - Noise Gate Select 4L
3277   */
3278  #define ARIZONA_OUT4L_NGATE_SRC_MASK             0x0FFF  /* OUT4L_NGATE_SRC - [11:0] */
3279  #define ARIZONA_OUT4L_NGATE_SRC_SHIFT                 0  /* OUT4L_NGATE_SRC - [11:0] */
3280  #define ARIZONA_OUT4L_NGATE_SRC_WIDTH                12  /* OUT4L_NGATE_SRC - [11:0] */
3281  
3282  /*
3283   * R1068 (0x42C) - Output Path Config 4R
3284   */
3285  #define ARIZONA_OUT4R_ANC_SRC_MASK               0x0C00  /* OUT4R_ANC_SRC - [11:10] */
3286  #define ARIZONA_OUT4R_ANC_SRC_SHIFT                  10  /* OUT4R_ANC_SRC - [11:10] */
3287  #define ARIZONA_OUT4R_ANC_SRC_WIDTH                   2  /* OUT4R_ANC_SRC - [11:10] */
3288  
3289  /*
3290   * R1069 (0x42D) - DAC Digital Volume 4R
3291   */
3292  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3293  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3294  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3295  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3296  #define ARIZONA_OUT4R_MUTE                       0x0100  /* OUT4R_MUTE */
3297  #define ARIZONA_OUT4R_MUTE_MASK                  0x0100  /* OUT4R_MUTE */
3298  #define ARIZONA_OUT4R_MUTE_SHIFT                      8  /* OUT4R_MUTE */
3299  #define ARIZONA_OUT4R_MUTE_WIDTH                      1  /* OUT4R_MUTE */
3300  #define ARIZONA_OUT4R_VOL_MASK                   0x00FF  /* OUT4R_VOL - [7:0] */
3301  #define ARIZONA_OUT4R_VOL_SHIFT                       0  /* OUT4R_VOL - [7:0] */
3302  #define ARIZONA_OUT4R_VOL_WIDTH                       8  /* OUT4R_VOL - [7:0] */
3303  
3304  /*
3305   * R1070 (0x42E) - Out Volume 4R
3306   */
3307  #define ARIZONA_OUT4R_VOL_LIM_MASK               0x00FF  /* OUT4R_VOL_LIM - [7:0] */
3308  #define ARIZONA_OUT4R_VOL_LIM_SHIFT                   0  /* OUT4R_VOL_LIM - [7:0] */
3309  #define ARIZONA_OUT4R_VOL_LIM_WIDTH                   8  /* OUT4R_VOL_LIM - [7:0] */
3310  
3311  /*
3312   * R1071 (0x42F) - Noise Gate Select 4R
3313   */
3314  #define ARIZONA_OUT4R_NGATE_SRC_MASK             0x0FFF  /* OUT4R_NGATE_SRC - [11:0] */
3315  #define ARIZONA_OUT4R_NGATE_SRC_SHIFT                 0  /* OUT4R_NGATE_SRC - [11:0] */
3316  #define ARIZONA_OUT4R_NGATE_SRC_WIDTH                12  /* OUT4R_NGATE_SRC - [11:0] */
3317  
3318  /*
3319   * R1072 (0x430) - Output Path Config 5L
3320   */
3321  #define ARIZONA_OUT5_OSR                         0x2000  /* OUT5_OSR */
3322  #define ARIZONA_OUT5_OSR_MASK                    0x2000  /* OUT5_OSR */
3323  #define ARIZONA_OUT5_OSR_SHIFT                       13  /* OUT5_OSR */
3324  #define ARIZONA_OUT5_OSR_WIDTH                        1  /* OUT5_OSR */
3325  #define ARIZONA_OUT5L_ANC_SRC_MASK               0x0C00  /* OUT5L_ANC_SRC - [11:10] */
3326  #define ARIZONA_OUT5L_ANC_SRC_SHIFT                  10  /* OUT5L_ANC_SRC - [11:10] */
3327  #define ARIZONA_OUT5L_ANC_SRC_WIDTH                   2  /* OUT5L_ANC_SRC - [11:10] */
3328  
3329  /*
3330   * R1073 (0x431) - DAC Digital Volume 5L
3331   */
3332  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3333  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3334  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3335  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3336  #define ARIZONA_OUT5L_MUTE                       0x0100  /* OUT5L_MUTE */
3337  #define ARIZONA_OUT5L_MUTE_MASK                  0x0100  /* OUT5L_MUTE */
3338  #define ARIZONA_OUT5L_MUTE_SHIFT                      8  /* OUT5L_MUTE */
3339  #define ARIZONA_OUT5L_MUTE_WIDTH                      1  /* OUT5L_MUTE */
3340  #define ARIZONA_OUT5L_VOL_MASK                   0x00FF  /* OUT5L_VOL - [7:0] */
3341  #define ARIZONA_OUT5L_VOL_SHIFT                       0  /* OUT5L_VOL - [7:0] */
3342  #define ARIZONA_OUT5L_VOL_WIDTH                       8  /* OUT5L_VOL - [7:0] */
3343  
3344  /*
3345   * R1074 (0x432) - DAC Volume Limit 5L
3346   */
3347  #define ARIZONA_OUT5L_VOL_LIM_MASK               0x00FF  /* OUT5L_VOL_LIM - [7:0] */
3348  #define ARIZONA_OUT5L_VOL_LIM_SHIFT                   0  /* OUT5L_VOL_LIM - [7:0] */
3349  #define ARIZONA_OUT5L_VOL_LIM_WIDTH                   8  /* OUT5L_VOL_LIM - [7:0] */
3350  
3351  /*
3352   * R1075 (0x433) - Noise Gate Select 5L
3353   */
3354  #define ARIZONA_OUT5L_NGATE_SRC_MASK             0x0FFF  /* OUT5L_NGATE_SRC - [11:0] */
3355  #define ARIZONA_OUT5L_NGATE_SRC_SHIFT                 0  /* OUT5L_NGATE_SRC - [11:0] */
3356  #define ARIZONA_OUT5L_NGATE_SRC_WIDTH                12  /* OUT5L_NGATE_SRC - [11:0] */
3357  
3358  /*
3359   * R1076 (0x434) - Output Path Config 5R
3360   */
3361  #define ARIZONA_OUT5R_ANC_SRC_MASK               0x0C00  /* OUT5R_ANC_SRC - [11:10] */
3362  #define ARIZONA_OUT5R_ANC_SRC_SHIFT                  10  /* OUT5R_ANC_SRC - [11:10] */
3363  #define ARIZONA_OUT5R_ANC_SRC_WIDTH                   2  /* OUT5R_ANC_SRC - [11:10] */
3364  
3365  /*
3366   * R1077 (0x435) - DAC Digital Volume 5R
3367   */
3368  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3369  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3370  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3371  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3372  #define ARIZONA_OUT5R_MUTE                       0x0100  /* OUT5R_MUTE */
3373  #define ARIZONA_OUT5R_MUTE_MASK                  0x0100  /* OUT5R_MUTE */
3374  #define ARIZONA_OUT5R_MUTE_SHIFT                      8  /* OUT5R_MUTE */
3375  #define ARIZONA_OUT5R_MUTE_WIDTH                      1  /* OUT5R_MUTE */
3376  #define ARIZONA_OUT5R_VOL_MASK                   0x00FF  /* OUT5R_VOL - [7:0] */
3377  #define ARIZONA_OUT5R_VOL_SHIFT                       0  /* OUT5R_VOL - [7:0] */
3378  #define ARIZONA_OUT5R_VOL_WIDTH                       8  /* OUT5R_VOL - [7:0] */
3379  
3380  /*
3381   * R1078 (0x436) - DAC Volume Limit 5R
3382   */
3383  #define ARIZONA_OUT5R_VOL_LIM_MASK               0x00FF  /* OUT5R_VOL_LIM - [7:0] */
3384  #define ARIZONA_OUT5R_VOL_LIM_SHIFT                   0  /* OUT5R_VOL_LIM - [7:0] */
3385  #define ARIZONA_OUT5R_VOL_LIM_WIDTH                   8  /* OUT5R_VOL_LIM - [7:0] */
3386  
3387  /*
3388   * R1079 (0x437) - Noise Gate Select 5R
3389   */
3390  #define ARIZONA_OUT5R_NGATE_SRC_MASK             0x0FFF  /* OUT5R_NGATE_SRC - [11:0] */
3391  #define ARIZONA_OUT5R_NGATE_SRC_SHIFT                 0  /* OUT5R_NGATE_SRC - [11:0] */
3392  #define ARIZONA_OUT5R_NGATE_SRC_WIDTH                12  /* OUT5R_NGATE_SRC - [11:0] */
3393  
3394  /*
3395   * R1080 (0x438) - Output Path Config 6L
3396   */
3397  #define ARIZONA_OUT6_OSR                         0x2000  /* OUT6_OSR */
3398  #define ARIZONA_OUT6_OSR_MASK                    0x2000  /* OUT6_OSR */
3399  #define ARIZONA_OUT6_OSR_SHIFT                       13  /* OUT6_OSR */
3400  #define ARIZONA_OUT6_OSR_WIDTH                        1  /* OUT6_OSR */
3401  #define ARIZONA_OUT6L_ANC_SRC_MASK               0x0C00  /* OUT6L_ANC_SRC - [11:10] */
3402  #define ARIZONA_OUT6L_ANC_SRC_SHIFT                  10  /* OUT6L_ANC_SRC - [11:10] */
3403  #define ARIZONA_OUT6L_ANC_SRC_WIDTH                   2  /* OUT6L_ANC_SRC - [11:10] */
3404  
3405  /*
3406   * R1081 (0x439) - DAC Digital Volume 6L
3407   */
3408  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3409  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3410  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3411  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3412  #define ARIZONA_OUT6L_MUTE                       0x0100  /* OUT6L_MUTE */
3413  #define ARIZONA_OUT6L_MUTE_MASK                  0x0100  /* OUT6L_MUTE */
3414  #define ARIZONA_OUT6L_MUTE_SHIFT                      8  /* OUT6L_MUTE */
3415  #define ARIZONA_OUT6L_MUTE_WIDTH                      1  /* OUT6L_MUTE */
3416  #define ARIZONA_OUT6L_VOL_MASK                   0x00FF  /* OUT6L_VOL - [7:0] */
3417  #define ARIZONA_OUT6L_VOL_SHIFT                       0  /* OUT6L_VOL - [7:0] */
3418  #define ARIZONA_OUT6L_VOL_WIDTH                       8  /* OUT6L_VOL - [7:0] */
3419  
3420  /*
3421   * R1082 (0x43A) - DAC Volume Limit 6L
3422   */
3423  #define ARIZONA_OUT6L_VOL_LIM_MASK               0x00FF  /* OUT6L_VOL_LIM - [7:0] */
3424  #define ARIZONA_OUT6L_VOL_LIM_SHIFT                   0  /* OUT6L_VOL_LIM - [7:0] */
3425  #define ARIZONA_OUT6L_VOL_LIM_WIDTH                   8  /* OUT6L_VOL_LIM - [7:0] */
3426  
3427  /*
3428   * R1083 (0x43B) - Noise Gate Select 6L
3429   */
3430  #define ARIZONA_OUT6L_NGATE_SRC_MASK             0x0FFF  /* OUT6L_NGATE_SRC - [11:0] */
3431  #define ARIZONA_OUT6L_NGATE_SRC_SHIFT                 0  /* OUT6L_NGATE_SRC - [11:0] */
3432  #define ARIZONA_OUT6L_NGATE_SRC_WIDTH                12  /* OUT6L_NGATE_SRC - [11:0] */
3433  
3434  /*
3435   * R1084 (0x43C) - Output Path Config 6R
3436   */
3437  #define ARIZONA_OUT6R_ANC_SRC_MASK               0x0C00  /* OUT6R_ANC_SRC - [11:10] */
3438  #define ARIZONA_OUT6R_ANC_SRC_SHIFT                  10  /* OUT6R_ANC_SRC - [11:10] */
3439  #define ARIZONA_OUT6R_ANC_SRC_WIDTH                   2  /* OUT6R_ANC_SRC - [11:10] */
3440  
3441  /*
3442   * R1085 (0x43D) - DAC Digital Volume 6R
3443   */
3444  #define ARIZONA_OUT_VU                           0x0200  /* OUT_VU */
3445  #define ARIZONA_OUT_VU_MASK                      0x0200  /* OUT_VU */
3446  #define ARIZONA_OUT_VU_SHIFT                          9  /* OUT_VU */
3447  #define ARIZONA_OUT_VU_WIDTH                          1  /* OUT_VU */
3448  #define ARIZONA_OUT6R_MUTE                       0x0100  /* OUT6R_MUTE */
3449  #define ARIZONA_OUT6R_MUTE_MASK                  0x0100  /* OUT6R_MUTE */
3450  #define ARIZONA_OUT6R_MUTE_SHIFT                      8  /* OUT6R_MUTE */
3451  #define ARIZONA_OUT6R_MUTE_WIDTH                      1  /* OUT6R_MUTE */
3452  #define ARIZONA_OUT6R_VOL_MASK                   0x00FF  /* OUT6R_VOL - [7:0] */
3453  #define ARIZONA_OUT6R_VOL_SHIFT                       0  /* OUT6R_VOL - [7:0] */
3454  #define ARIZONA_OUT6R_VOL_WIDTH                       8  /* OUT6R_VOL - [7:0] */
3455  
3456  /*
3457   * R1086 (0x43E) - DAC Volume Limit 6R
3458   */
3459  #define ARIZONA_OUT6R_VOL_LIM_MASK               0x00FF  /* OUT6R_VOL_LIM - [7:0] */
3460  #define ARIZONA_OUT6R_VOL_LIM_SHIFT                   0  /* OUT6R_VOL_LIM - [7:0] */
3461  #define ARIZONA_OUT6R_VOL_LIM_WIDTH                   8  /* OUT6R_VOL_LIM - [7:0] */
3462  
3463  /*
3464   * R1087 (0x43F) - Noise Gate Select 6R
3465   */
3466  #define ARIZONA_OUT6R_NGATE_SRC_MASK             0x0FFF  /* OUT6R_NGATE_SRC - [11:0] */
3467  #define ARIZONA_OUT6R_NGATE_SRC_SHIFT                 0  /* OUT6R_NGATE_SRC - [11:0] */
3468  #define ARIZONA_OUT6R_NGATE_SRC_WIDTH                12  /* OUT6R_NGATE_SRC - [11:0] */
3469  
3470  /*
3471   * R1088 (0x440) - DRE Enable
3472   */
3473  #define ARIZONA_DRE3R_ENA                        0x0020  /* DRE3R_ENA */
3474  #define ARIZONA_DRE3R_ENA_MASK                   0x0020  /* DRE3R_ENA */
3475  #define ARIZONA_DRE3R_ENA_SHIFT                       5  /* DRE3R_ENA */
3476  #define ARIZONA_DRE3R_ENA_WIDTH                       1  /* DRE3R_ENA */
3477  #define ARIZONA_DRE3L_ENA                        0x0010  /* DRE3L_ENA */
3478  #define ARIZONA_DRE3L_ENA_MASK                   0x0010  /* DRE3L_ENA */
3479  #define ARIZONA_DRE3L_ENA_SHIFT                       4  /* DRE3L_ENA */
3480  #define ARIZONA_DRE3L_ENA_WIDTH                       1  /* DRE3L_ENA */
3481  #define ARIZONA_DRE2R_ENA                        0x0008  /* DRE2R_ENA */
3482  #define ARIZONA_DRE2R_ENA_MASK                   0x0008  /* DRE2R_ENA */
3483  #define ARIZONA_DRE2R_ENA_SHIFT                       3  /* DRE2R_ENA */
3484  #define ARIZONA_DRE2R_ENA_WIDTH                       1  /* DRE2R_ENA */
3485  #define ARIZONA_DRE2L_ENA                        0x0004  /* DRE2L_ENA */
3486  #define ARIZONA_DRE2L_ENA_MASK                   0x0004  /* DRE2L_ENA */
3487  #define ARIZONA_DRE2L_ENA_SHIFT                       2  /* DRE2L_ENA */
3488  #define ARIZONA_DRE2L_ENA_WIDTH                       1  /* DRE2L_ENA */
3489  #define ARIZONA_DRE1R_ENA                        0x0002  /* DRE1R_ENA */
3490  #define ARIZONA_DRE1R_ENA_MASK                   0x0002  /* DRE1R_ENA */
3491  #define ARIZONA_DRE1R_ENA_SHIFT                       1  /* DRE1R_ENA */
3492  #define ARIZONA_DRE1R_ENA_WIDTH                       1  /* DRE1R_ENA */
3493  #define ARIZONA_DRE1L_ENA                        0x0001  /* DRE1L_ENA */
3494  #define ARIZONA_DRE1L_ENA_MASK                   0x0001  /* DRE1L_ENA */
3495  #define ARIZONA_DRE1L_ENA_SHIFT                       0  /* DRE1L_ENA */
3496  #define ARIZONA_DRE1L_ENA_WIDTH                       1  /* DRE1L_ENA */
3497  
3498  /*
3499   * R1088 (0x440) - DRE Enable (WM8998)
3500   */
3501  #define WM8998_DRE3L_ENA                          0x0020  /* DRE3L_ENA */
3502  #define WM8998_DRE3L_ENA_MASK                     0x0020  /* DRE3L_ENA */
3503  #define WM8998_DRE3L_ENA_SHIFT                         5  /* DRE3L_ENA */
3504  #define WM8998_DRE3L_ENA_WIDTH                         1  /* DRE3L_ENA */
3505  #define WM8998_DRE2L_ENA                          0x0008  /* DRE2L_ENA */
3506  #define WM8998_DRE2L_ENA_MASK                     0x0008  /* DRE2L_ENA */
3507  #define WM8998_DRE2L_ENA_SHIFT                         3  /* DRE2L_ENA */
3508  #define WM8998_DRE2L_ENA_WIDTH                         1  /* DRE2L_ENA */
3509  #define WM8998_DRE2R_ENA                          0x0004  /* DRE2R_ENA */
3510  #define WM8998_DRE2R_ENA_MASK                     0x0004  /* DRE2R_ENA */
3511  #define WM8998_DRE2R_ENA_SHIFT                         2  /* DRE2R_ENA */
3512  #define WM8998_DRE2R_ENA_WIDTH                         1  /* DRE2R_ENA */
3513  #define WM8998_DRE1L_ENA                          0x0002  /* DRE1L_ENA */
3514  #define WM8998_DRE1L_ENA_MASK                     0x0002  /* DRE1L_ENA */
3515  #define WM8998_DRE1L_ENA_SHIFT                         1  /* DRE1L_ENA */
3516  #define WM8998_DRE1L_ENA_WIDTH                         1  /* DRE1L_ENA */
3517  #define WM8998_DRE1R_ENA                          0x0001  /* DRE1R_ENA */
3518  #define WM8998_DRE1R_ENA_MASK                     0x0001  /* DRE1R_ENA */
3519  #define WM8998_DRE1R_ENA_SHIFT                         0  /* DRE1R_ENA */
3520  #define WM8998_DRE1R_ENA_WIDTH                         1  /* DRE1R_ENA */
3521  
3522  /*
3523   * R1089 (0x441) - DRE Control 1
3524   */
3525  #define ARIZONA_DRE_ENV_TC_FAST_MASK             0x0F00  /* DRE_ENV_TC_FAST - [11:8] */
3526  #define ARIZONA_DRE_ENV_TC_FAST_SHIFT                 8  /* DRE_ENV_TC_FAST - [11:8] */
3527  #define ARIZONA_DRE_ENV_TC_FAST_WIDTH                 4  /* DRE_ENV_TC_FAST - [11:8] */
3528  
3529  /*
3530   * R1090 (0x442) - DRE Control 2
3531   */
3532  #define ARIZONA_DRE_T_LOW_MASK                   0x3F00  /* DRE_T_LOW - [13:8] */
3533  #define ARIZONA_DRE_T_LOW_SHIFT                       8  /* DRE_T_LOW - [13:8] */
3534  #define ARIZONA_DRE_T_LOW_WIDTH                       6  /* DRE_T_LOW - [13:8] */
3535  #define ARIZONA_DRE_ALOG_VOL_DELAY_MASK          0x000F  /* DRE_ALOG_VOL_DELAY - [3:0] */
3536  #define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT              0  /* DRE_ALOG_VOL_DELAY - [3:0] */
3537  #define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH              4  /* DRE_ALOG_VOL_DELAY - [3:0] */
3538  
3539  /*
3540   * R1091 (0x443) - DRE Control 3
3541   */
3542  #define ARIZONA_DRE_GAIN_SHIFT_MASK              0xC000  /* DRE_GAIN_SHIFT - [15:14] */
3543  #define ARIZONA_DRE_GAIN_SHIFT_SHIFT                 14  /* DRE_GAIN_SHIFT - [15:14] */
3544  #define ARIZONA_DRE_GAIN_SHIFT_WIDTH                  2  /* DRE_GAIN_SHIFT - [15:14] */
3545  #define ARIZONA_DRE_LOW_LEVEL_ABS_MASK           0x000F  /* LOW_LEVEL_ABS - [3:0] */
3546  #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT               0  /* LOW_LEVEL_ABS - [3:0] */
3547  #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH               4  /* LOW_LEVEL_ABS - [3:0] */
3548  
3549  /* R486 (0x448) - EDRE_Enable
3550   */
3551  #define ARIZONA_EDRE_OUT4L_THR2_ENA              0x0200  /* EDRE_OUT4L_THR2_ENA */
3552  #define ARIZONA_EDRE_OUT4L_THR2_ENA_MASK         0x0200  /* EDRE_OUT4L_THR2_ENA */
3553  #define ARIZONA_EDRE_OUT4L_THR2_ENA_SHIFT             9  /* EDRE_OUT4L_THR2_ENA */
3554  #define ARIZONA_EDRE_OUT4L_THR2_ENA_WIDTH             1  /* EDRE_OUT4L_THR2_ENA */
3555  #define ARIZONA_EDRE_OUT4R_THR2_ENA              0x0100  /* EDRE_OUT4R_THR2_ENA */
3556  #define ARIZONA_EDRE_OUT4R_THR2_ENA_MASK         0x0100  /* EDRE_OUT4R_THR2_ENA */
3557  #define ARIZONA_EDRE_OUT4R_THR2_ENA_SHIFT             8  /* EDRE_OUT4R_THR2_ENA */
3558  #define ARIZONA_EDRE_OUT4R_THR2_ENA_WIDTH             1  /* EDRE_OUT4R_THR2_ENA */
3559  #define ARIZONA_EDRE_OUT4L_THR1_ENA              0x0080  /* EDRE_OUT4L_THR1_ENA */
3560  #define ARIZONA_EDRE_OUT4L_THR1_ENA_MASK         0x0080  /* EDRE_OUT4L_THR1_ENA */
3561  #define ARIZONA_EDRE_OUT4L_THR1_ENA_SHIFT             7  /* EDRE_OUT4L_THR1_ENA */
3562  #define ARIZONA_EDRE_OUT4L_THR1_ENA_WIDTH             1  /* EDRE_OUT4L_THR1_ENA */
3563  #define ARIZONA_EDRE_OUT4R_THR1_ENA              0x0040  /* EDRE_OUT4R_THR1_ENA */
3564  #define ARIZONA_EDRE_OUT4R_THR1_ENA_MASK         0x0040  /* EDRE_OUT4R_THR1_ENA */
3565  #define ARIZONA_EDRE_OUT4R_THR1_ENA_SHIFT             6  /* EDRE_OUT4R_THR1_ENA */
3566  #define ARIZONA_EDRE_OUT4R_THR1_ENA_WIDTH             1  /* EDRE_OUT4R_THR1_ENA */
3567  #define ARIZONA_EDRE_OUT3L_THR1_ENA              0x0020  /* EDRE_OUT3L_THR1_ENA */
3568  #define ARIZONA_EDRE_OUT3L_THR1_ENA_MASK         0x0020  /* EDRE_OUT3L_THR1_ENA */
3569  #define ARIZONA_EDRE_OUT3L_THR1_ENA_SHIFT             5  /* EDRE_OUT3L_THR1_ENA */
3570  #define ARIZONA_EDRE_OUT3L_THR1_ENA_WIDTH             1  /* EDRE_OUT3L_THR1_ENA */
3571  #define ARIZONA_EDRE_OUT3R_THR1_ENA              0x0010  /* EDRE_OUT3R_THR1_ENA */
3572  #define ARIZONA_EDRE_OUT3R_THR1_ENA_MASK         0x0010  /* EDRE_OUT3R_THR1_ENA */
3573  #define ARIZONA_EDRE_OUT3R_THR1_ENA_SHIFT             4  /* EDRE_OUT3R_THR1_ENA */
3574  #define ARIZONA_EDRE_OUT3R_THR1_ENA_WIDTH             1  /* EDRE_OUT3R_THR1_ENA */
3575  #define ARIZONA_EDRE_OUT2L_THR1_ENA              0x0008  /* EDRE_OUT2L_THR1_ENA */
3576  #define ARIZONA_EDRE_OUT2L_THR1_ENA_MASK         0x0008  /* EDRE_OUT2L_THR1_ENA */
3577  #define ARIZONA_EDRE_OUT2L_THR1_ENA_SHIFT             3  /* EDRE_OUT2L_THR1_ENA */
3578  #define ARIZONA_EDRE_OUT2L_THR1_ENA_WIDTH             1  /* EDRE_OUT2L_THR1_ENA */
3579  #define ARIZONA_EDRE_OUT2R_THR1_ENA              0x0004  /* EDRE_OUT2R_THR1_ENA */
3580  #define ARIZONA_EDRE_OUT2R_THR1_ENA_MASK         0x0004  /* EDRE_OUT2R_THR1_ENA */
3581  #define ARIZONA_EDRE_OUT2R_THR1_ENA_SHIFT             2  /* EDRE_OUT2R_THR1_ENA */
3582  #define ARIZONA_EDRE_OUT2R_THR1_ENA_WIDTH             1  /* EDRE_OUT2R_THR1_ENA */
3583  #define ARIZONA_EDRE_OUT1L_THR1_ENA              0x0002  /* EDRE_OUT1L_THR1_ENA */
3584  #define ARIZONA_EDRE_OUT1L_THR1_ENA_MASK         0x0002  /* EDRE_OUT1L_THR1_ENA */
3585  #define ARIZONA_EDRE_OUT1L_THR1_ENA_SHIFT             1  /* EDRE_OUT1L_THR1_ENA */
3586  #define ARIZONA_EDRE_OUT1L_THR1_ENA_WIDTH             1  /* EDRE_OUT1L_THR1_ENA */
3587  #define ARIZONA_EDRE_OUT1R_THR1_ENA              0x0001  /* EDRE_OUT1R_THR1_ENA */
3588  #define ARIZONA_EDRE_OUT1R_THR1_ENA_MASK         0x0001  /* EDRE_OUT1R_THR1_ENA */
3589  #define ARIZONA_EDRE_OUT1R_THR1_ENA_SHIFT             0  /* EDRE_OUT1R_THR1_ENA */
3590  #define ARIZONA_EDRE_OUT1R_THR1_ENA_WIDTH             1  /* EDRE_OUT1R_THR1_ENA */
3591  
3592  /*
3593   * R1104 (0x450) - DAC AEC Control 1
3594   */
3595  #define ARIZONA_AEC_LOOPBACK_SRC_MASK            0x003C  /* AEC_LOOPBACK_SRC - [5:2] */
3596  #define ARIZONA_AEC_LOOPBACK_SRC_SHIFT                2  /* AEC_LOOPBACK_SRC - [5:2] */
3597  #define ARIZONA_AEC_LOOPBACK_SRC_WIDTH                4  /* AEC_LOOPBACK_SRC - [5:2] */
3598  #define ARIZONA_AEC_ENA_STS                      0x0002  /* AEC_ENA_STS */
3599  #define ARIZONA_AEC_ENA_STS_MASK                 0x0002  /* AEC_ENA_STS */
3600  #define ARIZONA_AEC_ENA_STS_SHIFT                     1  /* AEC_ENA_STS */
3601  #define ARIZONA_AEC_ENA_STS_WIDTH                     1  /* AEC_ENA_STS */
3602  #define ARIZONA_AEC_LOOPBACK_ENA                 0x0001  /* AEC_LOOPBACK_ENA */
3603  #define ARIZONA_AEC_LOOPBACK_ENA_MASK            0x0001  /* AEC_LOOPBACK_ENA */
3604  #define ARIZONA_AEC_LOOPBACK_ENA_SHIFT                0  /* AEC_LOOPBACK_ENA */
3605  #define ARIZONA_AEC_LOOPBACK_ENA_WIDTH                1  /* AEC_LOOPBACK_ENA */
3606  
3607  /*
3608   * R1112 (0x458) - Noise Gate Control
3609   */
3610  #define ARIZONA_NGATE_HOLD_MASK                  0x0030  /* NGATE_HOLD - [5:4] */
3611  #define ARIZONA_NGATE_HOLD_SHIFT                      4  /* NGATE_HOLD - [5:4] */
3612  #define ARIZONA_NGATE_HOLD_WIDTH                      2  /* NGATE_HOLD - [5:4] */
3613  #define ARIZONA_NGATE_THR_MASK                   0x000E  /* NGATE_THR - [3:1] */
3614  #define ARIZONA_NGATE_THR_SHIFT                       1  /* NGATE_THR - [3:1] */
3615  #define ARIZONA_NGATE_THR_WIDTH                       3  /* NGATE_THR - [3:1] */
3616  #define ARIZONA_NGATE_ENA                        0x0001  /* NGATE_ENA */
3617  #define ARIZONA_NGATE_ENA_MASK                   0x0001  /* NGATE_ENA */
3618  #define ARIZONA_NGATE_ENA_SHIFT                       0  /* NGATE_ENA */
3619  #define ARIZONA_NGATE_ENA_WIDTH                       1  /* NGATE_ENA */
3620  
3621  /*
3622   * R1168 (0x490) - PDM SPK1 CTRL 1
3623   */
3624  #define ARIZONA_SPK1R_MUTE                       0x2000  /* SPK1R_MUTE */
3625  #define ARIZONA_SPK1R_MUTE_MASK                  0x2000  /* SPK1R_MUTE */
3626  #define ARIZONA_SPK1R_MUTE_SHIFT                     13  /* SPK1R_MUTE */
3627  #define ARIZONA_SPK1R_MUTE_WIDTH                      1  /* SPK1R_MUTE */
3628  #define ARIZONA_SPK1L_MUTE                       0x1000  /* SPK1L_MUTE */
3629  #define ARIZONA_SPK1L_MUTE_MASK                  0x1000  /* SPK1L_MUTE */
3630  #define ARIZONA_SPK1L_MUTE_SHIFT                     12  /* SPK1L_MUTE */
3631  #define ARIZONA_SPK1L_MUTE_WIDTH                      1  /* SPK1L_MUTE */
3632  #define ARIZONA_SPK1_MUTE_ENDIAN                 0x0100  /* SPK1_MUTE_ENDIAN */
3633  #define ARIZONA_SPK1_MUTE_ENDIAN_MASK            0x0100  /* SPK1_MUTE_ENDIAN */
3634  #define ARIZONA_SPK1_MUTE_ENDIAN_SHIFT                8  /* SPK1_MUTE_ENDIAN */
3635  #define ARIZONA_SPK1_MUTE_ENDIAN_WIDTH                1  /* SPK1_MUTE_ENDIAN */
3636  #define ARIZONA_SPK1_MUTE_SEQ1_MASK              0x00FF  /* SPK1_MUTE_SEQ1 - [7:0] */
3637  #define ARIZONA_SPK1_MUTE_SEQ1_SHIFT                  0  /* SPK1_MUTE_SEQ1 - [7:0] */
3638  #define ARIZONA_SPK1_MUTE_SEQ1_WIDTH                  8  /* SPK1_MUTE_SEQ1 - [7:0] */
3639  
3640  /*
3641   * R1169 (0x491) - PDM SPK1 CTRL 2
3642   */
3643  #define ARIZONA_SPK1_FMT                         0x0001  /* SPK1_FMT */
3644  #define ARIZONA_SPK1_FMT_MASK                    0x0001  /* SPK1_FMT */
3645  #define ARIZONA_SPK1_FMT_SHIFT                        0  /* SPK1_FMT */
3646  #define ARIZONA_SPK1_FMT_WIDTH                        1  /* SPK1_FMT */
3647  
3648  /*
3649   * R1170 (0x492) - PDM SPK2 CTRL 1
3650   */
3651  #define ARIZONA_SPK2R_MUTE                       0x2000  /* SPK2R_MUTE */
3652  #define ARIZONA_SPK2R_MUTE_MASK                  0x2000  /* SPK2R_MUTE */
3653  #define ARIZONA_SPK2R_MUTE_SHIFT                     13  /* SPK2R_MUTE */
3654  #define ARIZONA_SPK2R_MUTE_WIDTH                      1  /* SPK2R_MUTE */
3655  #define ARIZONA_SPK2L_MUTE                       0x1000  /* SPK2L_MUTE */
3656  #define ARIZONA_SPK2L_MUTE_MASK                  0x1000  /* SPK2L_MUTE */
3657  #define ARIZONA_SPK2L_MUTE_SHIFT                     12  /* SPK2L_MUTE */
3658  #define ARIZONA_SPK2L_MUTE_WIDTH                      1  /* SPK2L_MUTE */
3659  #define ARIZONA_SPK2_MUTE_ENDIAN                 0x0100  /* SPK2_MUTE_ENDIAN */
3660  #define ARIZONA_SPK2_MUTE_ENDIAN_MASK            0x0100  /* SPK2_MUTE_ENDIAN */
3661  #define ARIZONA_SPK2_MUTE_ENDIAN_SHIFT                8  /* SPK2_MUTE_ENDIAN */
3662  #define ARIZONA_SPK2_MUTE_ENDIAN_WIDTH                1  /* SPK2_MUTE_ENDIAN */
3663  #define ARIZONA_SPK2_MUTE_SEQ_MASK               0x00FF  /* SPK2_MUTE_SEQ - [7:0] */
3664  #define ARIZONA_SPK2_MUTE_SEQ_SHIFT                   0  /* SPK2_MUTE_SEQ - [7:0] */
3665  #define ARIZONA_SPK2_MUTE_SEQ_WIDTH                   8  /* SPK2_MUTE_SEQ - [7:0] */
3666  
3667  /*
3668   * R1171 (0x493) - PDM SPK2 CTRL 2
3669   */
3670  #define ARIZONA_SPK2_FMT                         0x0001  /* SPK2_FMT */
3671  #define ARIZONA_SPK2_FMT_MASK                    0x0001  /* SPK2_FMT */
3672  #define ARIZONA_SPK2_FMT_SHIFT                        0  /* SPK2_FMT */
3673  #define ARIZONA_SPK2_FMT_WIDTH                        1  /* SPK2_FMT */
3674  
3675  /*
3676   * R1184 (0x4A0) - HP1 Short Circuit Ctrl
3677   */
3678  #define ARIZONA_HP1_SC_ENA                       0x1000  /* HP1_SC_ENA */
3679  #define ARIZONA_HP1_SC_ENA_MASK                  0x1000  /* HP1_SC_ENA */
3680  #define ARIZONA_HP1_SC_ENA_SHIFT                     12  /* HP1_SC_ENA */
3681  #define ARIZONA_HP1_SC_ENA_WIDTH                      1  /* HP1_SC_ENA */
3682  
3683  /*
3684   * R1185 (0x4A1) - HP2 Short Circuit Ctrl
3685   */
3686  #define ARIZONA_HP2_SC_ENA                       0x1000  /* HP2_SC_ENA */
3687  #define ARIZONA_HP2_SC_ENA_MASK                  0x1000  /* HP2_SC_ENA */
3688  #define ARIZONA_HP2_SC_ENA_SHIFT                     12  /* HP2_SC_ENA */
3689  #define ARIZONA_HP2_SC_ENA_WIDTH                      1  /* HP2_SC_ENA */
3690  
3691  /*
3692   * R1186 (0x4A2) - HP3 Short Circuit Ctrl
3693   */
3694  #define ARIZONA_HP3_SC_ENA                       0x1000  /* HP3_SC_ENA */
3695  #define ARIZONA_HP3_SC_ENA_MASK                  0x1000  /* HP3_SC_ENA */
3696  #define ARIZONA_HP3_SC_ENA_SHIFT                     12  /* HP3_SC_ENA */
3697  #define ARIZONA_HP3_SC_ENA_WIDTH                      1  /* HP3_SC_ENA */
3698  
3699  /*
3700   * R1188 (0x4A4) HP Test Ctrl 1
3701   */
3702  #define ARIZONA_HP1_TST_CAP_SEL_MASK             0x0003  /* HP1_TST_CAP_SEL - [1:0] */
3703  #define ARIZONA_HP1_TST_CAP_SEL_SHIFT                 0  /* HP1_TST_CAP_SEL - [1:0] */
3704  #define ARIZONA_HP1_TST_CAP_SEL_WIDTH                 2  /* HP1_TST_CAP_SEL - [1:0] */
3705  
3706  /*
3707   * R1244 (0x4DC) - DAC comp 1
3708   */
3709  #define ARIZONA_OUT_COMP_COEFF_MASK              0xFFFF  /* OUT_COMP_COEFF - [15:0] */
3710  #define ARIZONA_OUT_COMP_COEFF_SHIFT                  0  /* OUT_COMP_COEFF - [15:0] */
3711  #define ARIZONA_OUT_COMP_COEFF_WIDTH                 16  /* OUT_COMP_COEFF - [15:0] */
3712  
3713  /*
3714   * R1245 (0x4DD) - DAC comp 2
3715   */
3716  #define ARIZONA_OUT_COMP_COEFF_1                 0x0002  /* OUT_COMP_COEFF */
3717  #define ARIZONA_OUT_COMP_COEFF_1_MASK            0x0002  /* OUT_COMP_COEFF */
3718  #define ARIZONA_OUT_COMP_COEFF_1_SHIFT                1  /* OUT_COMP_COEFF */
3719  #define ARIZONA_OUT_COMP_COEFF_1_WIDTH                1  /* OUT_COMP_COEFF */
3720  #define ARIZONA_OUT_COMP_COEFF_SEL               0x0001  /* OUT_COMP_COEFF_SEL */
3721  #define ARIZONA_OUT_COMP_COEFF_SEL_MASK          0x0001  /* OUT_COMP_COEFF_SEL */
3722  #define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT              0  /* OUT_COMP_COEFF_SEL */
3723  #define ARIZONA_OUT_COMP_COEFF_SEL_WIDTH              1  /* OUT_COMP_COEFF_SEL */
3724  
3725  /*
3726   * R1246 (0x4DE) - DAC comp 3
3727   */
3728  #define ARIZONA_AEC_COMP_COEFF_MASK              0xFFFF  /* AEC_COMP_COEFF - [15:0] */
3729  #define ARIZONA_AEC_COMP_COEFF_SHIFT                  0  /* AEC_COMP_COEFF - [15:0] */
3730  #define ARIZONA_AEC_COMP_COEFF_WIDTH                 16  /* AEC_COMP_COEFF - [15:0] */
3731  
3732  /*
3733   * R1247 (0x4DF) - DAC comp 4
3734   */
3735  #define ARIZONA_AEC_COMP_COEFF_1                 0x0002  /* AEC_COMP_COEFF */
3736  #define ARIZONA_AEC_COMP_COEFF_1_MASK            0x0002  /* AEC_COMP_COEFF */
3737  #define ARIZONA_AEC_COMP_COEFF_1_SHIFT                1  /* AEC_COMP_COEFF */
3738  #define ARIZONA_AEC_COMP_COEFF_1_WIDTH                1  /* AEC_COMP_COEFF */
3739  #define ARIZONA_AEC_COMP_COEFF_SEL               0x0001  /* AEC_COMP_COEFF_SEL */
3740  #define ARIZONA_AEC_COMP_COEFF_SEL_MASK          0x0001  /* AEC_COMP_COEFF_SEL */
3741  #define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT              0  /* AEC_COMP_COEFF_SEL */
3742  #define ARIZONA_AEC_COMP_COEFF_SEL_WIDTH              1  /* AEC_COMP_COEFF_SEL */
3743  
3744  /*
3745   * R1280 (0x500) - AIF1 BCLK Ctrl
3746   */
3747  #define ARIZONA_AIF1_BCLK_INV                    0x0080  /* AIF1_BCLK_INV */
3748  #define ARIZONA_AIF1_BCLK_INV_MASK               0x0080  /* AIF1_BCLK_INV */
3749  #define ARIZONA_AIF1_BCLK_INV_SHIFT                   7  /* AIF1_BCLK_INV */
3750  #define ARIZONA_AIF1_BCLK_INV_WIDTH                   1  /* AIF1_BCLK_INV */
3751  #define ARIZONA_AIF1_BCLK_FRC                    0x0040  /* AIF1_BCLK_FRC */
3752  #define ARIZONA_AIF1_BCLK_FRC_MASK               0x0040  /* AIF1_BCLK_FRC */
3753  #define ARIZONA_AIF1_BCLK_FRC_SHIFT                   6  /* AIF1_BCLK_FRC */
3754  #define ARIZONA_AIF1_BCLK_FRC_WIDTH                   1  /* AIF1_BCLK_FRC */
3755  #define ARIZONA_AIF1_BCLK_MSTR                   0x0020  /* AIF1_BCLK_MSTR */
3756  #define ARIZONA_AIF1_BCLK_MSTR_MASK              0x0020  /* AIF1_BCLK_MSTR */
3757  #define ARIZONA_AIF1_BCLK_MSTR_SHIFT                  5  /* AIF1_BCLK_MSTR */
3758  #define ARIZONA_AIF1_BCLK_MSTR_WIDTH                  1  /* AIF1_BCLK_MSTR */
3759  #define ARIZONA_AIF1_BCLK_FREQ_MASK              0x001F  /* AIF1_BCLK_FREQ - [4:0] */
3760  #define ARIZONA_AIF1_BCLK_FREQ_SHIFT                  0  /* AIF1_BCLK_FREQ - [4:0] */
3761  #define ARIZONA_AIF1_BCLK_FREQ_WIDTH                  5  /* AIF1_BCLK_FREQ - [4:0] */
3762  
3763  /*
3764   * R1281 (0x501) - AIF1 Tx Pin Ctrl
3765   */
3766  #define ARIZONA_AIF1TX_DAT_TRI                   0x0020  /* AIF1TX_DAT_TRI */
3767  #define ARIZONA_AIF1TX_DAT_TRI_MASK              0x0020  /* AIF1TX_DAT_TRI */
3768  #define ARIZONA_AIF1TX_DAT_TRI_SHIFT                  5  /* AIF1TX_DAT_TRI */
3769  #define ARIZONA_AIF1TX_DAT_TRI_WIDTH                  1  /* AIF1TX_DAT_TRI */
3770  #define ARIZONA_AIF1TX_LRCLK_SRC                 0x0008  /* AIF1TX_LRCLK_SRC */
3771  #define ARIZONA_AIF1TX_LRCLK_SRC_MASK            0x0008  /* AIF1TX_LRCLK_SRC */
3772  #define ARIZONA_AIF1TX_LRCLK_SRC_SHIFT                3  /* AIF1TX_LRCLK_SRC */
3773  #define ARIZONA_AIF1TX_LRCLK_SRC_WIDTH                1  /* AIF1TX_LRCLK_SRC */
3774  #define ARIZONA_AIF1TX_LRCLK_INV                 0x0004  /* AIF1TX_LRCLK_INV */
3775  #define ARIZONA_AIF1TX_LRCLK_INV_MASK            0x0004  /* AIF1TX_LRCLK_INV */
3776  #define ARIZONA_AIF1TX_LRCLK_INV_SHIFT                2  /* AIF1TX_LRCLK_INV */
3777  #define ARIZONA_AIF1TX_LRCLK_INV_WIDTH                1  /* AIF1TX_LRCLK_INV */
3778  #define ARIZONA_AIF1TX_LRCLK_FRC                 0x0002  /* AIF1TX_LRCLK_FRC */
3779  #define ARIZONA_AIF1TX_LRCLK_FRC_MASK            0x0002  /* AIF1TX_LRCLK_FRC */
3780  #define ARIZONA_AIF1TX_LRCLK_FRC_SHIFT                1  /* AIF1TX_LRCLK_FRC */
3781  #define ARIZONA_AIF1TX_LRCLK_FRC_WIDTH                1  /* AIF1TX_LRCLK_FRC */
3782  #define ARIZONA_AIF1TX_LRCLK_MSTR                0x0001  /* AIF1TX_LRCLK_MSTR */
3783  #define ARIZONA_AIF1TX_LRCLK_MSTR_MASK           0x0001  /* AIF1TX_LRCLK_MSTR */
3784  #define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT               0  /* AIF1TX_LRCLK_MSTR */
3785  #define ARIZONA_AIF1TX_LRCLK_MSTR_WIDTH               1  /* AIF1TX_LRCLK_MSTR */
3786  
3787  /*
3788   * R1282 (0x502) - AIF1 Rx Pin Ctrl
3789   */
3790  #define ARIZONA_AIF1RX_LRCLK_INV                 0x0004  /* AIF1RX_LRCLK_INV */
3791  #define ARIZONA_AIF1RX_LRCLK_INV_MASK            0x0004  /* AIF1RX_LRCLK_INV */
3792  #define ARIZONA_AIF1RX_LRCLK_INV_SHIFT                2  /* AIF1RX_LRCLK_INV */
3793  #define ARIZONA_AIF1RX_LRCLK_INV_WIDTH                1  /* AIF1RX_LRCLK_INV */
3794  #define ARIZONA_AIF1RX_LRCLK_FRC                 0x0002  /* AIF1RX_LRCLK_FRC */
3795  #define ARIZONA_AIF1RX_LRCLK_FRC_MASK            0x0002  /* AIF1RX_LRCLK_FRC */
3796  #define ARIZONA_AIF1RX_LRCLK_FRC_SHIFT                1  /* AIF1RX_LRCLK_FRC */
3797  #define ARIZONA_AIF1RX_LRCLK_FRC_WIDTH                1  /* AIF1RX_LRCLK_FRC */
3798  #define ARIZONA_AIF1RX_LRCLK_MSTR                0x0001  /* AIF1RX_LRCLK_MSTR */
3799  #define ARIZONA_AIF1RX_LRCLK_MSTR_MASK           0x0001  /* AIF1RX_LRCLK_MSTR */
3800  #define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT               0  /* AIF1RX_LRCLK_MSTR */
3801  #define ARIZONA_AIF1RX_LRCLK_MSTR_WIDTH               1  /* AIF1RX_LRCLK_MSTR */
3802  
3803  /*
3804   * R1283 (0x503) - AIF1 Rate Ctrl
3805   */
3806  #define ARIZONA_AIF1_RATE_MASK                   0x7800  /* AIF1_RATE - [14:11] */
3807  #define ARIZONA_AIF1_RATE_SHIFT                      11  /* AIF1_RATE - [14:11] */
3808  #define ARIZONA_AIF1_RATE_WIDTH                       4  /* AIF1_RATE - [14:11] */
3809  #define ARIZONA_AIF1_TRI                         0x0040  /* AIF1_TRI */
3810  #define ARIZONA_AIF1_TRI_MASK                    0x0040  /* AIF1_TRI */
3811  #define ARIZONA_AIF1_TRI_SHIFT                        6  /* AIF1_TRI */
3812  #define ARIZONA_AIF1_TRI_WIDTH                        1  /* AIF1_TRI */
3813  
3814  /*
3815   * R1284 (0x504) - AIF1 Format
3816   */
3817  #define ARIZONA_AIF1_FMT_MASK                    0x0007  /* AIF1_FMT - [2:0] */
3818  #define ARIZONA_AIF1_FMT_SHIFT                        0  /* AIF1_FMT - [2:0] */
3819  #define ARIZONA_AIF1_FMT_WIDTH                        3  /* AIF1_FMT - [2:0] */
3820  
3821  /*
3822   * R1285 (0x505) - AIF1 Tx BCLK Rate
3823   */
3824  #define ARIZONA_AIF1TX_BCPF_MASK                 0x1FFF  /* AIF1TX_BCPF - [12:0] */
3825  #define ARIZONA_AIF1TX_BCPF_SHIFT                     0  /* AIF1TX_BCPF - [12:0] */
3826  #define ARIZONA_AIF1TX_BCPF_WIDTH                    13  /* AIF1TX_BCPF - [12:0] */
3827  
3828  /*
3829   * R1286 (0x506) - AIF1 Rx BCLK Rate
3830   */
3831  #define ARIZONA_AIF1RX_BCPF_MASK                 0x1FFF  /* AIF1RX_BCPF - [12:0] */
3832  #define ARIZONA_AIF1RX_BCPF_SHIFT                     0  /* AIF1RX_BCPF - [12:0] */
3833  #define ARIZONA_AIF1RX_BCPF_WIDTH                    13  /* AIF1RX_BCPF - [12:0] */
3834  
3835  /*
3836   * R1287 (0x507) - AIF1 Frame Ctrl 1
3837   */
3838  #define ARIZONA_AIF1TX_WL_MASK                   0x3F00  /* AIF1TX_WL - [13:8] */
3839  #define ARIZONA_AIF1TX_WL_SHIFT                       8  /* AIF1TX_WL - [13:8] */
3840  #define ARIZONA_AIF1TX_WL_WIDTH                       6  /* AIF1TX_WL - [13:8] */
3841  #define ARIZONA_AIF1TX_SLOT_LEN_MASK             0x00FF  /* AIF1TX_SLOT_LEN - [7:0] */
3842  #define ARIZONA_AIF1TX_SLOT_LEN_SHIFT                 0  /* AIF1TX_SLOT_LEN - [7:0] */
3843  #define ARIZONA_AIF1TX_SLOT_LEN_WIDTH                 8  /* AIF1TX_SLOT_LEN - [7:0] */
3844  
3845  /*
3846   * R1288 (0x508) - AIF1 Frame Ctrl 2
3847   */
3848  #define ARIZONA_AIF1RX_WL_MASK                   0x3F00  /* AIF1RX_WL - [13:8] */
3849  #define ARIZONA_AIF1RX_WL_SHIFT                       8  /* AIF1RX_WL - [13:8] */
3850  #define ARIZONA_AIF1RX_WL_WIDTH                       6  /* AIF1RX_WL - [13:8] */
3851  #define ARIZONA_AIF1RX_SLOT_LEN_MASK             0x00FF  /* AIF1RX_SLOT_LEN - [7:0] */
3852  #define ARIZONA_AIF1RX_SLOT_LEN_SHIFT                 0  /* AIF1RX_SLOT_LEN - [7:0] */
3853  #define ARIZONA_AIF1RX_SLOT_LEN_WIDTH                 8  /* AIF1RX_SLOT_LEN - [7:0] */
3854  
3855  /*
3856   * R1289 (0x509) - AIF1 Frame Ctrl 3
3857   */
3858  #define ARIZONA_AIF1TX1_SLOT_MASK                0x003F  /* AIF1TX1_SLOT - [5:0] */
3859  #define ARIZONA_AIF1TX1_SLOT_SHIFT                    0  /* AIF1TX1_SLOT - [5:0] */
3860  #define ARIZONA_AIF1TX1_SLOT_WIDTH                    6  /* AIF1TX1_SLOT - [5:0] */
3861  
3862  /*
3863   * R1290 (0x50A) - AIF1 Frame Ctrl 4
3864   */
3865  #define ARIZONA_AIF1TX2_SLOT_MASK                0x003F  /* AIF1TX2_SLOT - [5:0] */
3866  #define ARIZONA_AIF1TX2_SLOT_SHIFT                    0  /* AIF1TX2_SLOT - [5:0] */
3867  #define ARIZONA_AIF1TX2_SLOT_WIDTH                    6  /* AIF1TX2_SLOT - [5:0] */
3868  
3869  /*
3870   * R1291 (0x50B) - AIF1 Frame Ctrl 5
3871   */
3872  #define ARIZONA_AIF1TX3_SLOT_MASK                0x003F  /* AIF1TX3_SLOT - [5:0] */
3873  #define ARIZONA_AIF1TX3_SLOT_SHIFT                    0  /* AIF1TX3_SLOT - [5:0] */
3874  #define ARIZONA_AIF1TX3_SLOT_WIDTH                    6  /* AIF1TX3_SLOT - [5:0] */
3875  
3876  /*
3877   * R1292 (0x50C) - AIF1 Frame Ctrl 6
3878   */
3879  #define ARIZONA_AIF1TX4_SLOT_MASK                0x003F  /* AIF1TX4_SLOT - [5:0] */
3880  #define ARIZONA_AIF1TX4_SLOT_SHIFT                    0  /* AIF1TX4_SLOT - [5:0] */
3881  #define ARIZONA_AIF1TX4_SLOT_WIDTH                    6  /* AIF1TX4_SLOT - [5:0] */
3882  
3883  /*
3884   * R1293 (0x50D) - AIF1 Frame Ctrl 7
3885   */
3886  #define ARIZONA_AIF1TX5_SLOT_MASK                0x003F  /* AIF1TX5_SLOT - [5:0] */
3887  #define ARIZONA_AIF1TX5_SLOT_SHIFT                    0  /* AIF1TX5_SLOT - [5:0] */
3888  #define ARIZONA_AIF1TX5_SLOT_WIDTH                    6  /* AIF1TX5_SLOT - [5:0] */
3889  
3890  /*
3891   * R1294 (0x50E) - AIF1 Frame Ctrl 8
3892   */
3893  #define ARIZONA_AIF1TX6_SLOT_MASK                0x003F  /* AIF1TX6_SLOT - [5:0] */
3894  #define ARIZONA_AIF1TX6_SLOT_SHIFT                    0  /* AIF1TX6_SLOT - [5:0] */
3895  #define ARIZONA_AIF1TX6_SLOT_WIDTH                    6  /* AIF1TX6_SLOT - [5:0] */
3896  
3897  /*
3898   * R1295 (0x50F) - AIF1 Frame Ctrl 9
3899   */
3900  #define ARIZONA_AIF1TX7_SLOT_MASK                0x003F  /* AIF1TX7_SLOT - [5:0] */
3901  #define ARIZONA_AIF1TX7_SLOT_SHIFT                    0  /* AIF1TX7_SLOT - [5:0] */
3902  #define ARIZONA_AIF1TX7_SLOT_WIDTH                    6  /* AIF1TX7_SLOT - [5:0] */
3903  
3904  /*
3905   * R1296 (0x510) - AIF1 Frame Ctrl 10
3906   */
3907  #define ARIZONA_AIF1TX8_SLOT_MASK                0x003F  /* AIF1TX8_SLOT - [5:0] */
3908  #define ARIZONA_AIF1TX8_SLOT_SHIFT                    0  /* AIF1TX8_SLOT - [5:0] */
3909  #define ARIZONA_AIF1TX8_SLOT_WIDTH                    6  /* AIF1TX8_SLOT - [5:0] */
3910  
3911  /*
3912   * R1297 (0x511) - AIF1 Frame Ctrl 11
3913   */
3914  #define ARIZONA_AIF1RX1_SLOT_MASK                0x003F  /* AIF1RX1_SLOT - [5:0] */
3915  #define ARIZONA_AIF1RX1_SLOT_SHIFT                    0  /* AIF1RX1_SLOT - [5:0] */
3916  #define ARIZONA_AIF1RX1_SLOT_WIDTH                    6  /* AIF1RX1_SLOT - [5:0] */
3917  
3918  /*
3919   * R1298 (0x512) - AIF1 Frame Ctrl 12
3920   */
3921  #define ARIZONA_AIF1RX2_SLOT_MASK                0x003F  /* AIF1RX2_SLOT - [5:0] */
3922  #define ARIZONA_AIF1RX2_SLOT_SHIFT                    0  /* AIF1RX2_SLOT - [5:0] */
3923  #define ARIZONA_AIF1RX2_SLOT_WIDTH                    6  /* AIF1RX2_SLOT - [5:0] */
3924  
3925  /*
3926   * R1299 (0x513) - AIF1 Frame Ctrl 13
3927   */
3928  #define ARIZONA_AIF1RX3_SLOT_MASK                0x003F  /* AIF1RX3_SLOT - [5:0] */
3929  #define ARIZONA_AIF1RX3_SLOT_SHIFT                    0  /* AIF1RX3_SLOT - [5:0] */
3930  #define ARIZONA_AIF1RX3_SLOT_WIDTH                    6  /* AIF1RX3_SLOT - [5:0] */
3931  
3932  /*
3933   * R1300 (0x514) - AIF1 Frame Ctrl 14
3934   */
3935  #define ARIZONA_AIF1RX4_SLOT_MASK                0x003F  /* AIF1RX4_SLOT - [5:0] */
3936  #define ARIZONA_AIF1RX4_SLOT_SHIFT                    0  /* AIF1RX4_SLOT - [5:0] */
3937  #define ARIZONA_AIF1RX4_SLOT_WIDTH                    6  /* AIF1RX4_SLOT - [5:0] */
3938  
3939  /*
3940   * R1301 (0x515) - AIF1 Frame Ctrl 15
3941   */
3942  #define ARIZONA_AIF1RX5_SLOT_MASK                0x003F  /* AIF1RX5_SLOT - [5:0] */
3943  #define ARIZONA_AIF1RX5_SLOT_SHIFT                    0  /* AIF1RX5_SLOT - [5:0] */
3944  #define ARIZONA_AIF1RX5_SLOT_WIDTH                    6  /* AIF1RX5_SLOT - [5:0] */
3945  
3946  /*
3947   * R1302 (0x516) - AIF1 Frame Ctrl 16
3948   */
3949  #define ARIZONA_AIF1RX6_SLOT_MASK                0x003F  /* AIF1RX6_SLOT - [5:0] */
3950  #define ARIZONA_AIF1RX6_SLOT_SHIFT                    0  /* AIF1RX6_SLOT - [5:0] */
3951  #define ARIZONA_AIF1RX6_SLOT_WIDTH                    6  /* AIF1RX6_SLOT - [5:0] */
3952  
3953  /*
3954   * R1303 (0x517) - AIF1 Frame Ctrl 17
3955   */
3956  #define ARIZONA_AIF1RX7_SLOT_MASK                0x003F  /* AIF1RX7_SLOT - [5:0] */
3957  #define ARIZONA_AIF1RX7_SLOT_SHIFT                    0  /* AIF1RX7_SLOT - [5:0] */
3958  #define ARIZONA_AIF1RX7_SLOT_WIDTH                    6  /* AIF1RX7_SLOT - [5:0] */
3959  
3960  /*
3961   * R1304 (0x518) - AIF1 Frame Ctrl 18
3962   */
3963  #define ARIZONA_AIF1RX8_SLOT_MASK                0x003F  /* AIF1RX8_SLOT - [5:0] */
3964  #define ARIZONA_AIF1RX8_SLOT_SHIFT                    0  /* AIF1RX8_SLOT - [5:0] */
3965  #define ARIZONA_AIF1RX8_SLOT_WIDTH                    6  /* AIF1RX8_SLOT - [5:0] */
3966  
3967  /*
3968   * R1305 (0x519) - AIF1 Tx Enables
3969   */
3970  #define ARIZONA_AIF1TX8_ENA                      0x0080  /* AIF1TX8_ENA */
3971  #define ARIZONA_AIF1TX8_ENA_MASK                 0x0080  /* AIF1TX8_ENA */
3972  #define ARIZONA_AIF1TX8_ENA_SHIFT                     7  /* AIF1TX8_ENA */
3973  #define ARIZONA_AIF1TX8_ENA_WIDTH                     1  /* AIF1TX8_ENA */
3974  #define ARIZONA_AIF1TX7_ENA                      0x0040  /* AIF1TX7_ENA */
3975  #define ARIZONA_AIF1TX7_ENA_MASK                 0x0040  /* AIF1TX7_ENA */
3976  #define ARIZONA_AIF1TX7_ENA_SHIFT                     6  /* AIF1TX7_ENA */
3977  #define ARIZONA_AIF1TX7_ENA_WIDTH                     1  /* AIF1TX7_ENA */
3978  #define ARIZONA_AIF1TX6_ENA                      0x0020  /* AIF1TX6_ENA */
3979  #define ARIZONA_AIF1TX6_ENA_MASK                 0x0020  /* AIF1TX6_ENA */
3980  #define ARIZONA_AIF1TX6_ENA_SHIFT                     5  /* AIF1TX6_ENA */
3981  #define ARIZONA_AIF1TX6_ENA_WIDTH                     1  /* AIF1TX6_ENA */
3982  #define ARIZONA_AIF1TX5_ENA                      0x0010  /* AIF1TX5_ENA */
3983  #define ARIZONA_AIF1TX5_ENA_MASK                 0x0010  /* AIF1TX5_ENA */
3984  #define ARIZONA_AIF1TX5_ENA_SHIFT                     4  /* AIF1TX5_ENA */
3985  #define ARIZONA_AIF1TX5_ENA_WIDTH                     1  /* AIF1TX5_ENA */
3986  #define ARIZONA_AIF1TX4_ENA                      0x0008  /* AIF1TX4_ENA */
3987  #define ARIZONA_AIF1TX4_ENA_MASK                 0x0008  /* AIF1TX4_ENA */
3988  #define ARIZONA_AIF1TX4_ENA_SHIFT                     3  /* AIF1TX4_ENA */
3989  #define ARIZONA_AIF1TX4_ENA_WIDTH                     1  /* AIF1TX4_ENA */
3990  #define ARIZONA_AIF1TX3_ENA                      0x0004  /* AIF1TX3_ENA */
3991  #define ARIZONA_AIF1TX3_ENA_MASK                 0x0004  /* AIF1TX3_ENA */
3992  #define ARIZONA_AIF1TX3_ENA_SHIFT                     2  /* AIF1TX3_ENA */
3993  #define ARIZONA_AIF1TX3_ENA_WIDTH                     1  /* AIF1TX3_ENA */
3994  #define ARIZONA_AIF1TX2_ENA                      0x0002  /* AIF1TX2_ENA */
3995  #define ARIZONA_AIF1TX2_ENA_MASK                 0x0002  /* AIF1TX2_ENA */
3996  #define ARIZONA_AIF1TX2_ENA_SHIFT                     1  /* AIF1TX2_ENA */
3997  #define ARIZONA_AIF1TX2_ENA_WIDTH                     1  /* AIF1TX2_ENA */
3998  #define ARIZONA_AIF1TX1_ENA                      0x0001  /* AIF1TX1_ENA */
3999  #define ARIZONA_AIF1TX1_ENA_MASK                 0x0001  /* AIF1TX1_ENA */
4000  #define ARIZONA_AIF1TX1_ENA_SHIFT                     0  /* AIF1TX1_ENA */
4001  #define ARIZONA_AIF1TX1_ENA_WIDTH                     1  /* AIF1TX1_ENA */
4002  
4003  /*
4004   * R1306 (0x51A) - AIF1 Rx Enables
4005   */
4006  #define ARIZONA_AIF1RX8_ENA                      0x0080  /* AIF1RX8_ENA */
4007  #define ARIZONA_AIF1RX8_ENA_MASK                 0x0080  /* AIF1RX8_ENA */
4008  #define ARIZONA_AIF1RX8_ENA_SHIFT                     7  /* AIF1RX8_ENA */
4009  #define ARIZONA_AIF1RX8_ENA_WIDTH                     1  /* AIF1RX8_ENA */
4010  #define ARIZONA_AIF1RX7_ENA                      0x0040  /* AIF1RX7_ENA */
4011  #define ARIZONA_AIF1RX7_ENA_MASK                 0x0040  /* AIF1RX7_ENA */
4012  #define ARIZONA_AIF1RX7_ENA_SHIFT                     6  /* AIF1RX7_ENA */
4013  #define ARIZONA_AIF1RX7_ENA_WIDTH                     1  /* AIF1RX7_ENA */
4014  #define ARIZONA_AIF1RX6_ENA                      0x0020  /* AIF1RX6_ENA */
4015  #define ARIZONA_AIF1RX6_ENA_MASK                 0x0020  /* AIF1RX6_ENA */
4016  #define ARIZONA_AIF1RX6_ENA_SHIFT                     5  /* AIF1RX6_ENA */
4017  #define ARIZONA_AIF1RX6_ENA_WIDTH                     1  /* AIF1RX6_ENA */
4018  #define ARIZONA_AIF1RX5_ENA                      0x0010  /* AIF1RX5_ENA */
4019  #define ARIZONA_AIF1RX5_ENA_MASK                 0x0010  /* AIF1RX5_ENA */
4020  #define ARIZONA_AIF1RX5_ENA_SHIFT                     4  /* AIF1RX5_ENA */
4021  #define ARIZONA_AIF1RX5_ENA_WIDTH                     1  /* AIF1RX5_ENA */
4022  #define ARIZONA_AIF1RX4_ENA                      0x0008  /* AIF1RX4_ENA */
4023  #define ARIZONA_AIF1RX4_ENA_MASK                 0x0008  /* AIF1RX4_ENA */
4024  #define ARIZONA_AIF1RX4_ENA_SHIFT                     3  /* AIF1RX4_ENA */
4025  #define ARIZONA_AIF1RX4_ENA_WIDTH                     1  /* AIF1RX4_ENA */
4026  #define ARIZONA_AIF1RX3_ENA                      0x0004  /* AIF1RX3_ENA */
4027  #define ARIZONA_AIF1RX3_ENA_MASK                 0x0004  /* AIF1RX3_ENA */
4028  #define ARIZONA_AIF1RX3_ENA_SHIFT                     2  /* AIF1RX3_ENA */
4029  #define ARIZONA_AIF1RX3_ENA_WIDTH                     1  /* AIF1RX3_ENA */
4030  #define ARIZONA_AIF1RX2_ENA                      0x0002  /* AIF1RX2_ENA */
4031  #define ARIZONA_AIF1RX2_ENA_MASK                 0x0002  /* AIF1RX2_ENA */
4032  #define ARIZONA_AIF1RX2_ENA_SHIFT                     1  /* AIF1RX2_ENA */
4033  #define ARIZONA_AIF1RX2_ENA_WIDTH                     1  /* AIF1RX2_ENA */
4034  #define ARIZONA_AIF1RX1_ENA                      0x0001  /* AIF1RX1_ENA */
4035  #define ARIZONA_AIF1RX1_ENA_MASK                 0x0001  /* AIF1RX1_ENA */
4036  #define ARIZONA_AIF1RX1_ENA_SHIFT                     0  /* AIF1RX1_ENA */
4037  #define ARIZONA_AIF1RX1_ENA_WIDTH                     1  /* AIF1RX1_ENA */
4038  
4039  /*
4040   * R1307 (0x51B) - AIF1 Force Write
4041   */
4042  #define ARIZONA_AIF1_FRC_WR                      0x0001  /* AIF1_FRC_WR */
4043  #define ARIZONA_AIF1_FRC_WR_MASK                 0x0001  /* AIF1_FRC_WR */
4044  #define ARIZONA_AIF1_FRC_WR_SHIFT                     0  /* AIF1_FRC_WR */
4045  #define ARIZONA_AIF1_FRC_WR_WIDTH                     1  /* AIF1_FRC_WR */
4046  
4047  /*
4048   * R1344 (0x540) - AIF2 BCLK Ctrl
4049   */
4050  #define ARIZONA_AIF2_BCLK_INV                    0x0080  /* AIF2_BCLK_INV */
4051  #define ARIZONA_AIF2_BCLK_INV_MASK               0x0080  /* AIF2_BCLK_INV */
4052  #define ARIZONA_AIF2_BCLK_INV_SHIFT                   7  /* AIF2_BCLK_INV */
4053  #define ARIZONA_AIF2_BCLK_INV_WIDTH                   1  /* AIF2_BCLK_INV */
4054  #define ARIZONA_AIF2_BCLK_FRC                    0x0040  /* AIF2_BCLK_FRC */
4055  #define ARIZONA_AIF2_BCLK_FRC_MASK               0x0040  /* AIF2_BCLK_FRC */
4056  #define ARIZONA_AIF2_BCLK_FRC_SHIFT                   6  /* AIF2_BCLK_FRC */
4057  #define ARIZONA_AIF2_BCLK_FRC_WIDTH                   1  /* AIF2_BCLK_FRC */
4058  #define ARIZONA_AIF2_BCLK_MSTR                   0x0020  /* AIF2_BCLK_MSTR */
4059  #define ARIZONA_AIF2_BCLK_MSTR_MASK              0x0020  /* AIF2_BCLK_MSTR */
4060  #define ARIZONA_AIF2_BCLK_MSTR_SHIFT                  5  /* AIF2_BCLK_MSTR */
4061  #define ARIZONA_AIF2_BCLK_MSTR_WIDTH                  1  /* AIF2_BCLK_MSTR */
4062  #define ARIZONA_AIF2_BCLK_FREQ_MASK              0x001F  /* AIF2_BCLK_FREQ - [4:0] */
4063  #define ARIZONA_AIF2_BCLK_FREQ_SHIFT                  0  /* AIF2_BCLK_FREQ - [4:0] */
4064  #define ARIZONA_AIF2_BCLK_FREQ_WIDTH                  5  /* AIF2_BCLK_FREQ - [4:0] */
4065  
4066  /*
4067   * R1345 (0x541) - AIF2 Tx Pin Ctrl
4068   */
4069  #define ARIZONA_AIF2TX_DAT_TRI                   0x0020  /* AIF2TX_DAT_TRI */
4070  #define ARIZONA_AIF2TX_DAT_TRI_MASK              0x0020  /* AIF2TX_DAT_TRI */
4071  #define ARIZONA_AIF2TX_DAT_TRI_SHIFT                  5  /* AIF2TX_DAT_TRI */
4072  #define ARIZONA_AIF2TX_DAT_TRI_WIDTH                  1  /* AIF2TX_DAT_TRI */
4073  #define ARIZONA_AIF2TX_LRCLK_SRC                 0x0008  /* AIF2TX_LRCLK_SRC */
4074  #define ARIZONA_AIF2TX_LRCLK_SRC_MASK            0x0008  /* AIF2TX_LRCLK_SRC */
4075  #define ARIZONA_AIF2TX_LRCLK_SRC_SHIFT                3  /* AIF2TX_LRCLK_SRC */
4076  #define ARIZONA_AIF2TX_LRCLK_SRC_WIDTH                1  /* AIF2TX_LRCLK_SRC */
4077  #define ARIZONA_AIF2TX_LRCLK_INV                 0x0004  /* AIF2TX_LRCLK_INV */
4078  #define ARIZONA_AIF2TX_LRCLK_INV_MASK            0x0004  /* AIF2TX_LRCLK_INV */
4079  #define ARIZONA_AIF2TX_LRCLK_INV_SHIFT                2  /* AIF2TX_LRCLK_INV */
4080  #define ARIZONA_AIF2TX_LRCLK_INV_WIDTH                1  /* AIF2TX_LRCLK_INV */
4081  #define ARIZONA_AIF2TX_LRCLK_FRC                 0x0002  /* AIF2TX_LRCLK_FRC */
4082  #define ARIZONA_AIF2TX_LRCLK_FRC_MASK            0x0002  /* AIF2TX_LRCLK_FRC */
4083  #define ARIZONA_AIF2TX_LRCLK_FRC_SHIFT                1  /* AIF2TX_LRCLK_FRC */
4084  #define ARIZONA_AIF2TX_LRCLK_FRC_WIDTH                1  /* AIF2TX_LRCLK_FRC */
4085  #define ARIZONA_AIF2TX_LRCLK_MSTR                0x0001  /* AIF2TX_LRCLK_MSTR */
4086  #define ARIZONA_AIF2TX_LRCLK_MSTR_MASK           0x0001  /* AIF2TX_LRCLK_MSTR */
4087  #define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT               0  /* AIF2TX_LRCLK_MSTR */
4088  #define ARIZONA_AIF2TX_LRCLK_MSTR_WIDTH               1  /* AIF2TX_LRCLK_MSTR */
4089  
4090  /*
4091   * R1346 (0x542) - AIF2 Rx Pin Ctrl
4092   */
4093  #define ARIZONA_AIF2RX_LRCLK_INV                 0x0004  /* AIF2RX_LRCLK_INV */
4094  #define ARIZONA_AIF2RX_LRCLK_INV_MASK            0x0004  /* AIF2RX_LRCLK_INV */
4095  #define ARIZONA_AIF2RX_LRCLK_INV_SHIFT                2  /* AIF2RX_LRCLK_INV */
4096  #define ARIZONA_AIF2RX_LRCLK_INV_WIDTH                1  /* AIF2RX_LRCLK_INV */
4097  #define ARIZONA_AIF2RX_LRCLK_FRC                 0x0002  /* AIF2RX_LRCLK_FRC */
4098  #define ARIZONA_AIF2RX_LRCLK_FRC_MASK            0x0002  /* AIF2RX_LRCLK_FRC */
4099  #define ARIZONA_AIF2RX_LRCLK_FRC_SHIFT                1  /* AIF2RX_LRCLK_FRC */
4100  #define ARIZONA_AIF2RX_LRCLK_FRC_WIDTH                1  /* AIF2RX_LRCLK_FRC */
4101  #define ARIZONA_AIF2RX_LRCLK_MSTR                0x0001  /* AIF2RX_LRCLK_MSTR */
4102  #define ARIZONA_AIF2RX_LRCLK_MSTR_MASK           0x0001  /* AIF2RX_LRCLK_MSTR */
4103  #define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT               0  /* AIF2RX_LRCLK_MSTR */
4104  #define ARIZONA_AIF2RX_LRCLK_MSTR_WIDTH               1  /* AIF2RX_LRCLK_MSTR */
4105  
4106  /*
4107   * R1347 (0x543) - AIF2 Rate Ctrl
4108   */
4109  #define ARIZONA_AIF2_RATE_MASK                   0x7800  /* AIF2_RATE - [14:11] */
4110  #define ARIZONA_AIF2_RATE_SHIFT                      11  /* AIF2_RATE - [14:11] */
4111  #define ARIZONA_AIF2_RATE_WIDTH                       4  /* AIF2_RATE - [14:11] */
4112  #define ARIZONA_AIF2_TRI                         0x0040  /* AIF2_TRI */
4113  #define ARIZONA_AIF2_TRI_MASK                    0x0040  /* AIF2_TRI */
4114  #define ARIZONA_AIF2_TRI_SHIFT                        6  /* AIF2_TRI */
4115  #define ARIZONA_AIF2_TRI_WIDTH                        1  /* AIF2_TRI */
4116  
4117  /*
4118   * R1348 (0x544) - AIF2 Format
4119   */
4120  #define ARIZONA_AIF2_FMT_MASK                    0x0007  /* AIF2_FMT - [2:0] */
4121  #define ARIZONA_AIF2_FMT_SHIFT                        0  /* AIF2_FMT - [2:0] */
4122  #define ARIZONA_AIF2_FMT_WIDTH                        3  /* AIF2_FMT - [2:0] */
4123  
4124  /*
4125   * R1349 (0x545) - AIF2 Tx BCLK Rate
4126   */
4127  #define ARIZONA_AIF2TX_BCPF_MASK                 0x1FFF  /* AIF2TX_BCPF - [12:0] */
4128  #define ARIZONA_AIF2TX_BCPF_SHIFT                     0  /* AIF2TX_BCPF - [12:0] */
4129  #define ARIZONA_AIF2TX_BCPF_WIDTH                    13  /* AIF2TX_BCPF - [12:0] */
4130  
4131  /*
4132   * R1350 (0x546) - AIF2 Rx BCLK Rate
4133   */
4134  #define ARIZONA_AIF2RX_BCPF_MASK                 0x1FFF  /* AIF2RX_BCPF - [12:0] */
4135  #define ARIZONA_AIF2RX_BCPF_SHIFT                     0  /* AIF2RX_BCPF - [12:0] */
4136  #define ARIZONA_AIF2RX_BCPF_WIDTH                    13  /* AIF2RX_BCPF - [12:0] */
4137  
4138  /*
4139   * R1351 (0x547) - AIF2 Frame Ctrl 1
4140   */
4141  #define ARIZONA_AIF2TX_WL_MASK                   0x3F00  /* AIF2TX_WL - [13:8] */
4142  #define ARIZONA_AIF2TX_WL_SHIFT                       8  /* AIF2TX_WL - [13:8] */
4143  #define ARIZONA_AIF2TX_WL_WIDTH                       6  /* AIF2TX_WL - [13:8] */
4144  #define ARIZONA_AIF2TX_SLOT_LEN_MASK             0x00FF  /* AIF2TX_SLOT_LEN - [7:0] */
4145  #define ARIZONA_AIF2TX_SLOT_LEN_SHIFT                 0  /* AIF2TX_SLOT_LEN - [7:0] */
4146  #define ARIZONA_AIF2TX_SLOT_LEN_WIDTH                 8  /* AIF2TX_SLOT_LEN - [7:0] */
4147  
4148  /*
4149   * R1352 (0x548) - AIF2 Frame Ctrl 2
4150   */
4151  #define ARIZONA_AIF2RX_WL_MASK                   0x3F00  /* AIF2RX_WL - [13:8] */
4152  #define ARIZONA_AIF2RX_WL_SHIFT                       8  /* AIF2RX_WL - [13:8] */
4153  #define ARIZONA_AIF2RX_WL_WIDTH                       6  /* AIF2RX_WL - [13:8] */
4154  #define ARIZONA_AIF2RX_SLOT_LEN_MASK             0x00FF  /* AIF2RX_SLOT_LEN - [7:0] */
4155  #define ARIZONA_AIF2RX_SLOT_LEN_SHIFT                 0  /* AIF2RX_SLOT_LEN - [7:0] */
4156  #define ARIZONA_AIF2RX_SLOT_LEN_WIDTH                 8  /* AIF2RX_SLOT_LEN - [7:0] */
4157  
4158  /*
4159   * R1353 (0x549) - AIF2 Frame Ctrl 3
4160   */
4161  #define ARIZONA_AIF2TX1_SLOT_MASK                0x003F  /* AIF2TX1_SLOT - [5:0] */
4162  #define ARIZONA_AIF2TX1_SLOT_SHIFT                    0  /* AIF2TX1_SLOT - [5:0] */
4163  #define ARIZONA_AIF2TX1_SLOT_WIDTH                    6  /* AIF2TX1_SLOT - [5:0] */
4164  
4165  /*
4166   * R1354 (0x54A) - AIF2 Frame Ctrl 4
4167   */
4168  #define ARIZONA_AIF2TX2_SLOT_MASK                0x003F  /* AIF2TX2_SLOT - [5:0] */
4169  #define ARIZONA_AIF2TX2_SLOT_SHIFT                    0  /* AIF2TX2_SLOT - [5:0] */
4170  #define ARIZONA_AIF2TX2_SLOT_WIDTH                    6  /* AIF2TX2_SLOT - [5:0] */
4171  
4172  /*
4173   * R1355 (0x54B) - AIF2 Frame Ctrl 5
4174   */
4175  #define ARIZONA_AIF2TX3_SLOT_MASK                0x003F  /* AIF2TX3_SLOT - [5:0] */
4176  #define ARIZONA_AIF2TX3_SLOT_SHIFT                    0  /* AIF2TX3_SLOT - [5:0] */
4177  #define ARIZONA_AIF2TX3_SLOT_WIDTH                    6  /* AIF2TX3_SLOT - [5:0] */
4178  
4179  /*
4180   * R1356 (0x54C) - AIF2 Frame Ctrl 6
4181   */
4182  #define ARIZONA_AIF2TX4_SLOT_MASK                0x003F  /* AIF2TX4_SLOT - [5:0] */
4183  #define ARIZONA_AIF2TX4_SLOT_SHIFT                    0  /* AIF2TX4_SLOT - [5:0] */
4184  #define ARIZONA_AIF2TX4_SLOT_WIDTH                    6  /* AIF2TX4_SLOT - [5:0] */
4185  
4186  
4187  /*
4188   * R1357 (0x54D) - AIF2 Frame Ctrl 7
4189   */
4190  #define ARIZONA_AIF2TX5_SLOT_MASK                0x003F  /* AIF2TX5_SLOT - [5:0] */
4191  #define ARIZONA_AIF2TX5_SLOT_SHIFT                    0  /* AIF2TX5_SLOT - [5:0] */
4192  #define ARIZONA_AIF2TX5_SLOT_WIDTH                    6  /* AIF2TX5_SLOT - [5:0] */
4193  
4194  /*
4195   * R1358 (0x54E) - AIF2 Frame Ctrl 8
4196   */
4197  #define ARIZONA_AIF2TX6_SLOT_MASK                0x003F  /* AIF2TX6_SLOT - [5:0] */
4198  #define ARIZONA_AIF2TX6_SLOT_SHIFT                    0  /* AIF2TX6_SLOT - [5:0] */
4199  #define ARIZONA_AIF2TX6_SLOT_WIDTH                    6  /* AIF2TX6_SLOT - [5:0] */
4200  
4201  /*
4202   * R1361 (0x551) - AIF2 Frame Ctrl 11
4203   */
4204  #define ARIZONA_AIF2RX1_SLOT_MASK                0x003F  /* AIF2RX1_SLOT - [5:0] */
4205  #define ARIZONA_AIF2RX1_SLOT_SHIFT                    0  /* AIF2RX1_SLOT - [5:0] */
4206  #define ARIZONA_AIF2RX1_SLOT_WIDTH                    6  /* AIF2RX1_SLOT - [5:0] */
4207  
4208  /*
4209   * R1362 (0x552) - AIF2 Frame Ctrl 12
4210   */
4211  #define ARIZONA_AIF2RX2_SLOT_MASK                0x003F  /* AIF2RX2_SLOT - [5:0] */
4212  #define ARIZONA_AIF2RX2_SLOT_SHIFT                    0  /* AIF2RX2_SLOT - [5:0] */
4213  #define ARIZONA_AIF2RX2_SLOT_WIDTH                    6  /* AIF2RX2_SLOT - [5:0] */
4214  
4215  /*
4216   * R1363 (0x553) - AIF2 Frame Ctrl 13
4217   */
4218  #define ARIZONA_AIF2RX3_SLOT_MASK                0x003F  /* AIF2RX3_SLOT - [5:0] */
4219  #define ARIZONA_AIF2RX3_SLOT_SHIFT                    0  /* AIF2RX3_SLOT - [5:0] */
4220  #define ARIZONA_AIF2RX3_SLOT_WIDTH                    6  /* AIF2RX3_SLOT - [5:0] */
4221  
4222  /*
4223   * R1364 (0x554) - AIF2 Frame Ctrl 14
4224   */
4225  #define ARIZONA_AIF2RX4_SLOT_MASK                0x003F  /* AIF2RX4_SLOT - [5:0] */
4226  #define ARIZONA_AIF2RX4_SLOT_SHIFT                    0  /* AIF2RX4_SLOT - [5:0] */
4227  #define ARIZONA_AIF2RX4_SLOT_WIDTH                    6  /* AIF2RX4_SLOT - [5:0] */
4228  
4229  /*
4230   * R1365 (0x555) - AIF2 Frame Ctrl 15
4231   */
4232  #define ARIZONA_AIF2RX5_SLOT_MASK                0x003F  /* AIF2RX5_SLOT - [5:0] */
4233  #define ARIZONA_AIF2RX5_SLOT_SHIFT                    0  /* AIF2RX5_SLOT - [5:0] */
4234  #define ARIZONA_AIF2RX5_SLOT_WIDTH                    6  /* AIF2RX5_SLOT - [5:0] */
4235  
4236  /*
4237   * R1366 (0x556) - AIF2 Frame Ctrl 16
4238   */
4239  #define ARIZONA_AIF2RX6_SLOT_MASK                0x003F  /* AIF2RX6_SLOT - [5:0] */
4240  #define ARIZONA_AIF2RX6_SLOT_SHIFT                    0  /* AIF2RX6_SLOT - [5:0] */
4241  #define ARIZONA_AIF2RX6_SLOT_WIDTH                    6  /* AIF2RX6_SLOT - [5:0] */
4242  
4243  /*
4244   * R1369 (0x559) - AIF2 Tx Enables
4245   */
4246  #define ARIZONA_AIF2TX6_ENA                      0x0020  /* AIF2TX6_ENA */
4247  #define ARIZONA_AIF2TX6_ENA_MASK                 0x0020  /* AIF2TX6_ENA */
4248  #define ARIZONA_AIF2TX6_ENA_SHIFT                     5  /* AIF2TX6_ENA */
4249  #define ARIZONA_AIF2TX6_ENA_WIDTH                     1  /* AIF2TX6_ENA */
4250  #define ARIZONA_AIF2TX5_ENA                      0x0010  /* AIF2TX5_ENA */
4251  #define ARIZONA_AIF2TX5_ENA_MASK                 0x0010  /* AIF2TX5_ENA */
4252  #define ARIZONA_AIF2TX5_ENA_SHIFT                     4  /* AIF2TX5_ENA */
4253  #define ARIZONA_AIF2TX5_ENA_WIDTH                     1  /* AIF2TX5_ENA */
4254  #define ARIZONA_AIF2TX4_ENA                      0x0008  /* AIF2TX4_ENA */
4255  #define ARIZONA_AIF2TX4_ENA_MASK                 0x0008  /* AIF2TX4_ENA */
4256  #define ARIZONA_AIF2TX4_ENA_SHIFT                     3  /* AIF2TX4_ENA */
4257  #define ARIZONA_AIF2TX4_ENA_WIDTH                     1  /* AIF2TX4_ENA */
4258  #define ARIZONA_AIF2TX3_ENA                      0x0004  /* AIF2TX3_ENA */
4259  #define ARIZONA_AIF2TX3_ENA_MASK                 0x0004  /* AIF2TX3_ENA */
4260  #define ARIZONA_AIF2TX3_ENA_SHIFT                     2  /* AIF2TX3_ENA */
4261  #define ARIZONA_AIF2TX3_ENA_WIDTH                     1  /* AIF2TX3_ENA */
4262  #define ARIZONA_AIF2TX2_ENA                      0x0002  /* AIF2TX2_ENA */
4263  #define ARIZONA_AIF2TX2_ENA_MASK                 0x0002  /* AIF2TX2_ENA */
4264  #define ARIZONA_AIF2TX2_ENA_SHIFT                     1  /* AIF2TX2_ENA */
4265  #define ARIZONA_AIF2TX2_ENA_WIDTH                     1  /* AIF2TX2_ENA */
4266  #define ARIZONA_AIF2TX1_ENA                      0x0001  /* AIF2TX1_ENA */
4267  #define ARIZONA_AIF2TX1_ENA_MASK                 0x0001  /* AIF2TX1_ENA */
4268  #define ARIZONA_AIF2TX1_ENA_SHIFT                     0  /* AIF2TX1_ENA */
4269  #define ARIZONA_AIF2TX1_ENA_WIDTH                     1  /* AIF2TX1_ENA */
4270  
4271  /*
4272   * R1370 (0x55A) - AIF2 Rx Enables
4273   */
4274  #define ARIZONA_AIF2RX6_ENA                      0x0020  /* AIF2RX6_ENA */
4275  #define ARIZONA_AIF2RX6_ENA_MASK                 0x0020  /* AIF2RX6_ENA */
4276  #define ARIZONA_AIF2RX6_ENA_SHIFT                     5  /* AIF2RX6_ENA */
4277  #define ARIZONA_AIF2RX6_ENA_WIDTH                     1  /* AIF2RX6_ENA */
4278  #define ARIZONA_AIF2RX5_ENA                      0x0010  /* AIF2RX5_ENA */
4279  #define ARIZONA_AIF2RX5_ENA_MASK                 0x0010  /* AIF2RX5_ENA */
4280  #define ARIZONA_AIF2RX5_ENA_SHIFT                     4  /* AIF2RX5_ENA */
4281  #define ARIZONA_AIF2RX5_ENA_WIDTH                     1  /* AIF2RX5_ENA */
4282  #define ARIZONA_AIF2RX4_ENA                      0x0008  /* AIF2RX4_ENA */
4283  #define ARIZONA_AIF2RX4_ENA_MASK                 0x0008  /* AIF2RX4_ENA */
4284  #define ARIZONA_AIF2RX4_ENA_SHIFT                     3  /* AIF2RX4_ENA */
4285  #define ARIZONA_AIF2RX4_ENA_WIDTH                     1  /* AIF2RX4_ENA */
4286  #define ARIZONA_AIF2RX3_ENA                      0x0004  /* AIF2RX3_ENA */
4287  #define ARIZONA_AIF2RX3_ENA_MASK                 0x0004  /* AIF2RX3_ENA */
4288  #define ARIZONA_AIF2RX3_ENA_SHIFT                     2  /* AIF2RX3_ENA */
4289  #define ARIZONA_AIF2RX3_ENA_WIDTH                     1  /* AIF2RX3_ENA */
4290  #define ARIZONA_AIF2RX2_ENA                      0x0002  /* AIF2RX2_ENA */
4291  #define ARIZONA_AIF2RX2_ENA_MASK                 0x0002  /* AIF2RX2_ENA */
4292  #define ARIZONA_AIF2RX2_ENA_SHIFT                     1  /* AIF2RX2_ENA */
4293  #define ARIZONA_AIF2RX2_ENA_WIDTH                     1  /* AIF2RX2_ENA */
4294  #define ARIZONA_AIF2RX1_ENA                      0x0001  /* AIF2RX1_ENA */
4295  #define ARIZONA_AIF2RX1_ENA_MASK                 0x0001  /* AIF2RX1_ENA */
4296  #define ARIZONA_AIF2RX1_ENA_SHIFT                     0  /* AIF2RX1_ENA */
4297  #define ARIZONA_AIF2RX1_ENA_WIDTH                     1  /* AIF2RX1_ENA */
4298  
4299  /*
4300   * R1371 (0x55B) - AIF2 Force Write
4301   */
4302  #define ARIZONA_AIF2_FRC_WR                      0x0001  /* AIF2_FRC_WR */
4303  #define ARIZONA_AIF2_FRC_WR_MASK                 0x0001  /* AIF2_FRC_WR */
4304  #define ARIZONA_AIF2_FRC_WR_SHIFT                     0  /* AIF2_FRC_WR */
4305  #define ARIZONA_AIF2_FRC_WR_WIDTH                     1  /* AIF2_FRC_WR */
4306  
4307  /*
4308   * R1408 (0x580) - AIF3 BCLK Ctrl
4309   */
4310  #define ARIZONA_AIF3_BCLK_INV                    0x0080  /* AIF3_BCLK_INV */
4311  #define ARIZONA_AIF3_BCLK_INV_MASK               0x0080  /* AIF3_BCLK_INV */
4312  #define ARIZONA_AIF3_BCLK_INV_SHIFT                   7  /* AIF3_BCLK_INV */
4313  #define ARIZONA_AIF3_BCLK_INV_WIDTH                   1  /* AIF3_BCLK_INV */
4314  #define ARIZONA_AIF3_BCLK_FRC                    0x0040  /* AIF3_BCLK_FRC */
4315  #define ARIZONA_AIF3_BCLK_FRC_MASK               0x0040  /* AIF3_BCLK_FRC */
4316  #define ARIZONA_AIF3_BCLK_FRC_SHIFT                   6  /* AIF3_BCLK_FRC */
4317  #define ARIZONA_AIF3_BCLK_FRC_WIDTH                   1  /* AIF3_BCLK_FRC */
4318  #define ARIZONA_AIF3_BCLK_MSTR                   0x0020  /* AIF3_BCLK_MSTR */
4319  #define ARIZONA_AIF3_BCLK_MSTR_MASK              0x0020  /* AIF3_BCLK_MSTR */
4320  #define ARIZONA_AIF3_BCLK_MSTR_SHIFT                  5  /* AIF3_BCLK_MSTR */
4321  #define ARIZONA_AIF3_BCLK_MSTR_WIDTH                  1  /* AIF3_BCLK_MSTR */
4322  #define ARIZONA_AIF3_BCLK_FREQ_MASK              0x001F  /* AIF3_BCLK_FREQ - [4:0] */
4323  #define ARIZONA_AIF3_BCLK_FREQ_SHIFT                  0  /* AIF3_BCLK_FREQ - [4:0] */
4324  #define ARIZONA_AIF3_BCLK_FREQ_WIDTH                  5  /* AIF3_BCLK_FREQ - [4:0] */
4325  
4326  /*
4327   * R1409 (0x581) - AIF3 Tx Pin Ctrl
4328   */
4329  #define ARIZONA_AIF3TX_DAT_TRI                   0x0020  /* AIF3TX_DAT_TRI */
4330  #define ARIZONA_AIF3TX_DAT_TRI_MASK              0x0020  /* AIF3TX_DAT_TRI */
4331  #define ARIZONA_AIF3TX_DAT_TRI_SHIFT                  5  /* AIF3TX_DAT_TRI */
4332  #define ARIZONA_AIF3TX_DAT_TRI_WIDTH                  1  /* AIF3TX_DAT_TRI */
4333  #define ARIZONA_AIF3TX_LRCLK_SRC                 0x0008  /* AIF3TX_LRCLK_SRC */
4334  #define ARIZONA_AIF3TX_LRCLK_SRC_MASK            0x0008  /* AIF3TX_LRCLK_SRC */
4335  #define ARIZONA_AIF3TX_LRCLK_SRC_SHIFT                3  /* AIF3TX_LRCLK_SRC */
4336  #define ARIZONA_AIF3TX_LRCLK_SRC_WIDTH                1  /* AIF3TX_LRCLK_SRC */
4337  #define ARIZONA_AIF3TX_LRCLK_INV                 0x0004  /* AIF3TX_LRCLK_INV */
4338  #define ARIZONA_AIF3TX_LRCLK_INV_MASK            0x0004  /* AIF3TX_LRCLK_INV */
4339  #define ARIZONA_AIF3TX_LRCLK_INV_SHIFT                2  /* AIF3TX_LRCLK_INV */
4340  #define ARIZONA_AIF3TX_LRCLK_INV_WIDTH                1  /* AIF3TX_LRCLK_INV */
4341  #define ARIZONA_AIF3TX_LRCLK_FRC                 0x0002  /* AIF3TX_LRCLK_FRC */
4342  #define ARIZONA_AIF3TX_LRCLK_FRC_MASK            0x0002  /* AIF3TX_LRCLK_FRC */
4343  #define ARIZONA_AIF3TX_LRCLK_FRC_SHIFT                1  /* AIF3TX_LRCLK_FRC */
4344  #define ARIZONA_AIF3TX_LRCLK_FRC_WIDTH                1  /* AIF3TX_LRCLK_FRC */
4345  #define ARIZONA_AIF3TX_LRCLK_MSTR                0x0001  /* AIF3TX_LRCLK_MSTR */
4346  #define ARIZONA_AIF3TX_LRCLK_MSTR_MASK           0x0001  /* AIF3TX_LRCLK_MSTR */
4347  #define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT               0  /* AIF3TX_LRCLK_MSTR */
4348  #define ARIZONA_AIF3TX_LRCLK_MSTR_WIDTH               1  /* AIF3TX_LRCLK_MSTR */
4349  
4350  /*
4351   * R1410 (0x582) - AIF3 Rx Pin Ctrl
4352   */
4353  #define ARIZONA_AIF3RX_LRCLK_INV                 0x0004  /* AIF3RX_LRCLK_INV */
4354  #define ARIZONA_AIF3RX_LRCLK_INV_MASK            0x0004  /* AIF3RX_LRCLK_INV */
4355  #define ARIZONA_AIF3RX_LRCLK_INV_SHIFT                2  /* AIF3RX_LRCLK_INV */
4356  #define ARIZONA_AIF3RX_LRCLK_INV_WIDTH                1  /* AIF3RX_LRCLK_INV */
4357  #define ARIZONA_AIF3RX_LRCLK_FRC                 0x0002  /* AIF3RX_LRCLK_FRC */
4358  #define ARIZONA_AIF3RX_LRCLK_FRC_MASK            0x0002  /* AIF3RX_LRCLK_FRC */
4359  #define ARIZONA_AIF3RX_LRCLK_FRC_SHIFT                1  /* AIF3RX_LRCLK_FRC */
4360  #define ARIZONA_AIF3RX_LRCLK_FRC_WIDTH                1  /* AIF3RX_LRCLK_FRC */
4361  #define ARIZONA_AIF3RX_LRCLK_MSTR                0x0001  /* AIF3RX_LRCLK_MSTR */
4362  #define ARIZONA_AIF3RX_LRCLK_MSTR_MASK           0x0001  /* AIF3RX_LRCLK_MSTR */
4363  #define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT               0  /* AIF3RX_LRCLK_MSTR */
4364  #define ARIZONA_AIF3RX_LRCLK_MSTR_WIDTH               1  /* AIF3RX_LRCLK_MSTR */
4365  
4366  /*
4367   * R1411 (0x583) - AIF3 Rate Ctrl
4368   */
4369  #define ARIZONA_AIF3_RATE_MASK                   0x7800  /* AIF3_RATE - [14:11] */
4370  #define ARIZONA_AIF3_RATE_SHIFT                      11  /* AIF3_RATE - [14:11] */
4371  #define ARIZONA_AIF3_RATE_WIDTH                       4  /* AIF3_RATE - [14:11] */
4372  #define ARIZONA_AIF3_TRI                         0x0040  /* AIF3_TRI */
4373  #define ARIZONA_AIF3_TRI_MASK                    0x0040  /* AIF3_TRI */
4374  #define ARIZONA_AIF3_TRI_SHIFT                        6  /* AIF3_TRI */
4375  #define ARIZONA_AIF3_TRI_WIDTH                        1  /* AIF3_TRI */
4376  
4377  /*
4378   * R1412 (0x584) - AIF3 Format
4379   */
4380  #define ARIZONA_AIF3_FMT_MASK                    0x0007  /* AIF3_FMT - [2:0] */
4381  #define ARIZONA_AIF3_FMT_SHIFT                        0  /* AIF3_FMT - [2:0] */
4382  #define ARIZONA_AIF3_FMT_WIDTH                        3  /* AIF3_FMT - [2:0] */
4383  
4384  /*
4385   * R1413 (0x585) - AIF3 Tx BCLK Rate
4386   */
4387  #define ARIZONA_AIF3TX_BCPF_MASK                 0x1FFF  /* AIF3TX_BCPF - [12:0] */
4388  #define ARIZONA_AIF3TX_BCPF_SHIFT                     0  /* AIF3TX_BCPF - [12:0] */
4389  #define ARIZONA_AIF3TX_BCPF_WIDTH                    13  /* AIF3TX_BCPF - [12:0] */
4390  
4391  /*
4392   * R1414 (0x586) - AIF3 Rx BCLK Rate
4393   */
4394  #define ARIZONA_AIF3RX_BCPF_MASK                 0x1FFF  /* AIF3RX_BCPF - [12:0] */
4395  #define ARIZONA_AIF3RX_BCPF_SHIFT                     0  /* AIF3RX_BCPF - [12:0] */
4396  #define ARIZONA_AIF3RX_BCPF_WIDTH                    13  /* AIF3RX_BCPF - [12:0] */
4397  
4398  /*
4399   * R1415 (0x587) - AIF3 Frame Ctrl 1
4400   */
4401  #define ARIZONA_AIF3TX_WL_MASK                   0x3F00  /* AIF3TX_WL - [13:8] */
4402  #define ARIZONA_AIF3TX_WL_SHIFT                       8  /* AIF3TX_WL - [13:8] */
4403  #define ARIZONA_AIF3TX_WL_WIDTH                       6  /* AIF3TX_WL - [13:8] */
4404  #define ARIZONA_AIF3TX_SLOT_LEN_MASK             0x00FF  /* AIF3TX_SLOT_LEN - [7:0] */
4405  #define ARIZONA_AIF3TX_SLOT_LEN_SHIFT                 0  /* AIF3TX_SLOT_LEN - [7:0] */
4406  #define ARIZONA_AIF3TX_SLOT_LEN_WIDTH                 8  /* AIF3TX_SLOT_LEN - [7:0] */
4407  
4408  /*
4409   * R1416 (0x588) - AIF3 Frame Ctrl 2
4410   */
4411  #define ARIZONA_AIF3RX_WL_MASK                   0x3F00  /* AIF3RX_WL - [13:8] */
4412  #define ARIZONA_AIF3RX_WL_SHIFT                       8  /* AIF3RX_WL - [13:8] */
4413  #define ARIZONA_AIF3RX_WL_WIDTH                       6  /* AIF3RX_WL - [13:8] */
4414  #define ARIZONA_AIF3RX_SLOT_LEN_MASK             0x00FF  /* AIF3RX_SLOT_LEN - [7:0] */
4415  #define ARIZONA_AIF3RX_SLOT_LEN_SHIFT                 0  /* AIF3RX_SLOT_LEN - [7:0] */
4416  #define ARIZONA_AIF3RX_SLOT_LEN_WIDTH                 8  /* AIF3RX_SLOT_LEN - [7:0] */
4417  
4418  /*
4419   * R1417 (0x589) - AIF3 Frame Ctrl 3
4420   */
4421  #define ARIZONA_AIF3TX1_SLOT_MASK                0x003F  /* AIF3TX1_SLOT - [5:0] */
4422  #define ARIZONA_AIF3TX1_SLOT_SHIFT                    0  /* AIF3TX1_SLOT - [5:0] */
4423  #define ARIZONA_AIF3TX1_SLOT_WIDTH                    6  /* AIF3TX1_SLOT - [5:0] */
4424  
4425  /*
4426   * R1418 (0x58A) - AIF3 Frame Ctrl 4
4427   */
4428  #define ARIZONA_AIF3TX2_SLOT_MASK                0x003F  /* AIF3TX2_SLOT - [5:0] */
4429  #define ARIZONA_AIF3TX2_SLOT_SHIFT                    0  /* AIF3TX2_SLOT - [5:0] */
4430  #define ARIZONA_AIF3TX2_SLOT_WIDTH                    6  /* AIF3TX2_SLOT - [5:0] */
4431  
4432  /*
4433   * R1425 (0x591) - AIF3 Frame Ctrl 11
4434   */
4435  #define ARIZONA_AIF3RX1_SLOT_MASK                0x003F  /* AIF3RX1_SLOT - [5:0] */
4436  #define ARIZONA_AIF3RX1_SLOT_SHIFT                    0  /* AIF3RX1_SLOT - [5:0] */
4437  #define ARIZONA_AIF3RX1_SLOT_WIDTH                    6  /* AIF3RX1_SLOT - [5:0] */
4438  
4439  /*
4440   * R1426 (0x592) - AIF3 Frame Ctrl 12
4441   */
4442  #define ARIZONA_AIF3RX2_SLOT_MASK                0x003F  /* AIF3RX2_SLOT - [5:0] */
4443  #define ARIZONA_AIF3RX2_SLOT_SHIFT                    0  /* AIF3RX2_SLOT - [5:0] */
4444  #define ARIZONA_AIF3RX2_SLOT_WIDTH                    6  /* AIF3RX2_SLOT - [5:0] */
4445  
4446  /*
4447   * R1433 (0x599) - AIF3 Tx Enables
4448   */
4449  #define ARIZONA_AIF3TX2_ENA                      0x0002  /* AIF3TX2_ENA */
4450  #define ARIZONA_AIF3TX2_ENA_MASK                 0x0002  /* AIF3TX2_ENA */
4451  #define ARIZONA_AIF3TX2_ENA_SHIFT                     1  /* AIF3TX2_ENA */
4452  #define ARIZONA_AIF3TX2_ENA_WIDTH                     1  /* AIF3TX2_ENA */
4453  #define ARIZONA_AIF3TX1_ENA                      0x0001  /* AIF3TX1_ENA */
4454  #define ARIZONA_AIF3TX1_ENA_MASK                 0x0001  /* AIF3TX1_ENA */
4455  #define ARIZONA_AIF3TX1_ENA_SHIFT                     0  /* AIF3TX1_ENA */
4456  #define ARIZONA_AIF3TX1_ENA_WIDTH                     1  /* AIF3TX1_ENA */
4457  
4458  /*
4459   * R1434 (0x59A) - AIF3 Rx Enables
4460   */
4461  #define ARIZONA_AIF3RX2_ENA                      0x0002  /* AIF3RX2_ENA */
4462  #define ARIZONA_AIF3RX2_ENA_MASK                 0x0002  /* AIF3RX2_ENA */
4463  #define ARIZONA_AIF3RX2_ENA_SHIFT                     1  /* AIF3RX2_ENA */
4464  #define ARIZONA_AIF3RX2_ENA_WIDTH                     1  /* AIF3RX2_ENA */
4465  #define ARIZONA_AIF3RX1_ENA                      0x0001  /* AIF3RX1_ENA */
4466  #define ARIZONA_AIF3RX1_ENA_MASK                 0x0001  /* AIF3RX1_ENA */
4467  #define ARIZONA_AIF3RX1_ENA_SHIFT                     0  /* AIF3RX1_ENA */
4468  #define ARIZONA_AIF3RX1_ENA_WIDTH                     1  /* AIF3RX1_ENA */
4469  
4470  /*
4471   * R1435 (0x59B) - AIF3 Force Write
4472   */
4473  #define ARIZONA_AIF3_FRC_WR                      0x0001  /* AIF3_FRC_WR */
4474  #define ARIZONA_AIF3_FRC_WR_MASK                 0x0001  /* AIF3_FRC_WR */
4475  #define ARIZONA_AIF3_FRC_WR_SHIFT                     0  /* AIF3_FRC_WR */
4476  #define ARIZONA_AIF3_FRC_WR_WIDTH                     1  /* AIF3_FRC_WR */
4477  
4478  /*
4479   * R1474 (0x5C2) - SPD1 TX Control
4480   */
4481  #define ARIZONA_SPD1_VAL2                        0x2000  /* SPD1_VAL2 */
4482  #define ARIZONA_SPD1_VAL2_MASK                   0x2000  /* SPD1_VAL2 */
4483  #define ARIZONA_SPD1_VAL2_SHIFT                      13  /* SPD1_VAL2 */
4484  #define ARIZONA_SPD1_VAL2_WIDTH                       1  /* SPD1_VAL2 */
4485  #define ARIZONA_SPD1_VAL1                        0x1000  /* SPD1_VAL1 */
4486  #define ARIZONA_SPD1_VAL1_MASK                   0x1000  /* SPD1_VAL1 */
4487  #define ARIZONA_SPD1_VAL1_SHIFT                      12  /* SPD1_VAL1 */
4488  #define ARIZONA_SPD1_VAL1_WIDTH                       1  /* SPD1_VAL1 */
4489  #define ARIZONA_SPD1_RATE_MASK                   0x00F0  /* SPD1_RATE */
4490  #define ARIZONA_SPD1_RATE_SHIFT                       4  /* SPD1_RATE */
4491  #define ARIZONA_SPD1_RATE_WIDTH                       4  /* SPD1_RATE */
4492  #define ARIZONA_SPD1_ENA                         0x0001  /* SPD1_ENA */
4493  #define ARIZONA_SPD1_ENA_MASK                    0x0001  /* SPD1_ENA */
4494  #define ARIZONA_SPD1_ENA_SHIFT                        0  /* SPD1_ENA */
4495  #define ARIZONA_SPD1_ENA_WIDTH                        1  /* SPD1_ENA */
4496  
4497  /*
4498   * R1475 (0x5C3) - SPD1 TX Channel Status 1
4499   */
4500  #define ARIZONA_SPD1_CATCODE_MASK                0xFF00  /* SPD1_CATCODE */
4501  #define ARIZONA_SPD1_CATCODE_SHIFT                    8  /* SPD1_CATCODE */
4502  #define ARIZONA_SPD1_CATCODE_WIDTH                    8  /* SPD1_CATCODE */
4503  #define ARIZONA_SPD1_CHSTMODE_MASK               0x00C0  /* SPD1_CHSTMODE */
4504  #define ARIZONA_SPD1_CHSTMODE_SHIFT                   6  /* SPD1_CHSTMODE */
4505  #define ARIZONA_SPD1_CHSTMODE_WIDTH                   2  /* SPD1_CHSTMODE */
4506  #define ARIZONA_SPD1_PREEMPH_MASK                0x0038  /* SPD1_PREEMPH */
4507  #define ARIZONA_SPD1_PREEMPH_SHIFT                    3  /* SPD1_PREEMPH */
4508  #define ARIZONA_SPD1_PREEMPH_WIDTH                    3  /* SPD1_PREEMPH */
4509  #define ARIZONA_SPD1_NOCOPY                      0x0004  /* SPD1_NOCOPY */
4510  #define ARIZONA_SPD1_NOCOPY_MASK                 0x0004  /* SPD1_NOCOPY */
4511  #define ARIZONA_SPD1_NOCOPY_SHIFT                     2  /* SPD1_NOCOPY */
4512  #define ARIZONA_SPD1_NOCOPY_WIDTH                     1  /* SPD1_NOCOPY */
4513  #define ARIZONA_SPD1_NOAUDIO                     0x0002  /* SPD1_NOAUDIO */
4514  #define ARIZONA_SPD1_NOAUDIO_MASK                0x0002  /* SPD1_NOAUDIO */
4515  #define ARIZONA_SPD1_NOAUDIO_SHIFT                    1  /* SPD1_NOAUDIO */
4516  #define ARIZONA_SPD1_NOAUDIO_WIDTH                    1  /* SPD1_NOAUDIO */
4517  #define ARIZONA_SPD1_PRO                         0x0001  /* SPD1_PRO */
4518  #define ARIZONA_SPD1_PRO_MASK                    0x0001  /* SPD1_PRO */
4519  #define ARIZONA_SPD1_PRO_SHIFT                        0  /* SPD1_PRO */
4520  #define ARIZONA_SPD1_PRO_WIDTH                        1  /* SPD1_PRO */
4521  
4522  /*
4523   * R1475 (0x5C4) - SPD1 TX Channel Status 2
4524   */
4525  #define ARIZONA_SPD1_FREQ_MASK                   0xF000  /* SPD1_FREQ */
4526  #define ARIZONA_SPD1_FREQ_SHIFT                      12  /* SPD1_FREQ */
4527  #define ARIZONA_SPD1_FREQ_WIDTH                       4  /* SPD1_FREQ */
4528  #define ARIZONA_SPD1_CHNUM2_MASK                 0x0F00  /* SPD1_CHNUM2 */
4529  #define ARIZONA_SPD1_CHNUM2_SHIFT                     8  /* SPD1_CHNUM2 */
4530  #define ARIZONA_SPD1_CHNUM2_WIDTH                     4  /* SPD1_CHNUM2 */
4531  #define ARIZONA_SPD1_CHNUM1_MASK                 0x00F0  /* SPD1_CHNUM1 */
4532  #define ARIZONA_SPD1_CHNUM1_SHIFT                     4  /* SPD1_CHNUM1 */
4533  #define ARIZONA_SPD1_CHNUM1_WIDTH                     4  /* SPD1_CHNUM1 */
4534  #define ARIZONA_SPD1_SRCNUM_MASK                 0x000F  /* SPD1_SRCNUM */
4535  #define ARIZONA_SPD1_SRCNUM_SHIFT                     0  /* SPD1_SRCNUM */
4536  #define ARIZONA_SPD1_SRCNUM_WIDTH                     4  /* SPD1_SRCNUM */
4537  
4538  /*
4539   * R1475 (0x5C5) - SPD1 TX Channel Status 3
4540   */
4541  #define ARIZONA_SPD1_ORGSAMP_MASK                 0x0F00  /* SPD1_ORGSAMP */
4542  #define ARIZONA_SPD1_ORGSAMP_SHIFT                     8  /* SPD1_ORGSAMP */
4543  #define ARIZONA_SPD1_ORGSAMP_WIDTH                     4  /* SPD1_ORGSAMP */
4544  #define ARIZONA_SPD1_TXWL_MASK                    0x00E0  /* SPD1_TXWL */
4545  #define ARIZONA_SPD1_TXWL_SHIFT                        5  /* SPD1_TXWL */
4546  #define ARIZONA_SPD1_TXWL_WIDTH                        3  /* SPD1_TXWL */
4547  #define ARIZONA_SPD1_MAXWL                        0x0010  /* SPD1_MAXWL */
4548  #define ARIZONA_SPD1_MAXWL_MASK                   0x0010  /* SPD1_MAXWL */
4549  #define ARIZONA_SPD1_MAXWL_SHIFT                       4  /* SPD1_MAXWL */
4550  #define ARIZONA_SPD1_MAXWL_WIDTH                       1  /* SPD1_MAXWL */
4551  #define ARIZONA_SPD1_CS31_30_MASK                 0x000C  /* SPD1_CS31_30 */
4552  #define ARIZONA_SPD1_CS31_30_SHIFT                     2  /* SPD1_CS31_30 */
4553  #define ARIZONA_SPD1_CS31_30_WIDTH                     2  /* SPD1_CS31_30 */
4554  #define ARIZONA_SPD1_CLKACU_MASK                  0x0003  /* SPD1_CLKACU */
4555  #define ARIZONA_SPD1_CLKACU_SHIFT                      2  /* SPD1_CLKACU */
4556  #define ARIZONA_SPD1_CLKACU_WIDTH                      0  /* SPD1_CLKACU */
4557  
4558  /*
4559   * R1507 (0x5E3) - SLIMbus Framer Ref Gear
4560   */
4561  #define ARIZONA_SLIMCLK_SRC                      0x0010  /* SLIMCLK_SRC */
4562  #define ARIZONA_SLIMCLK_SRC_MASK                 0x0010  /* SLIMCLK_SRC */
4563  #define ARIZONA_SLIMCLK_SRC_SHIFT                     4  /* SLIMCLK_SRC */
4564  #define ARIZONA_SLIMCLK_SRC_WIDTH                     1  /* SLIMCLK_SRC */
4565  #define ARIZONA_FRAMER_REF_GEAR_MASK             0x000F  /* FRAMER_REF_GEAR - [3:0] */
4566  #define ARIZONA_FRAMER_REF_GEAR_SHIFT                 0  /* FRAMER_REF_GEAR - [3:0] */
4567  #define ARIZONA_FRAMER_REF_GEAR_WIDTH                 4  /* FRAMER_REF_GEAR - [3:0] */
4568  
4569  /*
4570   * R1509 (0x5E5) - SLIMbus Rates 1
4571   */
4572  #define ARIZONA_SLIMRX2_RATE_MASK                0x7800  /* SLIMRX2_RATE - [14:11] */
4573  #define ARIZONA_SLIMRX2_RATE_SHIFT                   11  /* SLIMRX2_RATE - [14:11] */
4574  #define ARIZONA_SLIMRX2_RATE_WIDTH                    4  /* SLIMRX2_RATE - [14:11] */
4575  #define ARIZONA_SLIMRX1_RATE_MASK                0x0078  /* SLIMRX1_RATE - [6:3] */
4576  #define ARIZONA_SLIMRX1_RATE_SHIFT                    3  /* SLIMRX1_RATE - [6:3] */
4577  #define ARIZONA_SLIMRX1_RATE_WIDTH                    4  /* SLIMRX1_RATE - [6:3] */
4578  
4579  /*
4580   * R1510 (0x5E6) - SLIMbus Rates 2
4581   */
4582  #define ARIZONA_SLIMRX4_RATE_MASK                0x7800  /* SLIMRX4_RATE - [14:11] */
4583  #define ARIZONA_SLIMRX4_RATE_SHIFT                   11  /* SLIMRX4_RATE - [14:11] */
4584  #define ARIZONA_SLIMRX4_RATE_WIDTH                    4  /* SLIMRX4_RATE - [14:11] */
4585  #define ARIZONA_SLIMRX3_RATE_MASK                0x0078  /* SLIMRX3_RATE - [6:3] */
4586  #define ARIZONA_SLIMRX3_RATE_SHIFT                    3  /* SLIMRX3_RATE - [6:3] */
4587  #define ARIZONA_SLIMRX3_RATE_WIDTH                    4  /* SLIMRX3_RATE - [6:3] */
4588  
4589  /*
4590   * R1511 (0x5E7) - SLIMbus Rates 3
4591   */
4592  #define ARIZONA_SLIMRX6_RATE_MASK                0x7800  /* SLIMRX6_RATE - [14:11] */
4593  #define ARIZONA_SLIMRX6_RATE_SHIFT                   11  /* SLIMRX6_RATE - [14:11] */
4594  #define ARIZONA_SLIMRX6_RATE_WIDTH                    4  /* SLIMRX6_RATE - [14:11] */
4595  #define ARIZONA_SLIMRX5_RATE_MASK                0x0078  /* SLIMRX5_RATE - [6:3] */
4596  #define ARIZONA_SLIMRX5_RATE_SHIFT                    3  /* SLIMRX5_RATE - [6:3] */
4597  #define ARIZONA_SLIMRX5_RATE_WIDTH                    4  /* SLIMRX5_RATE - [6:3] */
4598  
4599  /*
4600   * R1512 (0x5E8) - SLIMbus Rates 4
4601   */
4602  #define ARIZONA_SLIMRX8_RATE_MASK                0x7800  /* SLIMRX8_RATE - [14:11] */
4603  #define ARIZONA_SLIMRX8_RATE_SHIFT                   11  /* SLIMRX8_RATE - [14:11] */
4604  #define ARIZONA_SLIMRX8_RATE_WIDTH                    4  /* SLIMRX8_RATE - [14:11] */
4605  #define ARIZONA_SLIMRX7_RATE_MASK                0x0078  /* SLIMRX7_RATE - [6:3] */
4606  #define ARIZONA_SLIMRX7_RATE_SHIFT                    3  /* SLIMRX7_RATE - [6:3] */
4607  #define ARIZONA_SLIMRX7_RATE_WIDTH                    4  /* SLIMRX7_RATE - [6:3] */
4608  
4609  /*
4610   * R1513 (0x5E9) - SLIMbus Rates 5
4611   */
4612  #define ARIZONA_SLIMTX2_RATE_MASK                0x7800  /* SLIMTX2_RATE - [14:11] */
4613  #define ARIZONA_SLIMTX2_RATE_SHIFT                   11  /* SLIMTX2_RATE - [14:11] */
4614  #define ARIZONA_SLIMTX2_RATE_WIDTH                    4  /* SLIMTX2_RATE - [14:11] */
4615  #define ARIZONA_SLIMTX1_RATE_MASK                0x0078  /* SLIMTX1_RATE - [6:3] */
4616  #define ARIZONA_SLIMTX1_RATE_SHIFT                    3  /* SLIMTX1_RATE - [6:3] */
4617  #define ARIZONA_SLIMTX1_RATE_WIDTH                    4  /* SLIMTX1_RATE - [6:3] */
4618  
4619  /*
4620   * R1514 (0x5EA) - SLIMbus Rates 6
4621   */
4622  #define ARIZONA_SLIMTX4_RATE_MASK                0x7800  /* SLIMTX4_RATE - [14:11] */
4623  #define ARIZONA_SLIMTX4_RATE_SHIFT                   11  /* SLIMTX4_RATE - [14:11] */
4624  #define ARIZONA_SLIMTX4_RATE_WIDTH                    4  /* SLIMTX4_RATE - [14:11] */
4625  #define ARIZONA_SLIMTX3_RATE_MASK                0x0078  /* SLIMTX3_RATE - [6:3] */
4626  #define ARIZONA_SLIMTX3_RATE_SHIFT                    3  /* SLIMTX3_RATE - [6:3] */
4627  #define ARIZONA_SLIMTX3_RATE_WIDTH                    4  /* SLIMTX3_RATE - [6:3] */
4628  
4629  /*
4630   * R1515 (0x5EB) - SLIMbus Rates 7
4631   */
4632  #define ARIZONA_SLIMTX6_RATE_MASK                0x7800  /* SLIMTX6_RATE - [14:11] */
4633  #define ARIZONA_SLIMTX6_RATE_SHIFT                   11  /* SLIMTX6_RATE - [14:11] */
4634  #define ARIZONA_SLIMTX6_RATE_WIDTH                    4  /* SLIMTX6_RATE - [14:11] */
4635  #define ARIZONA_SLIMTX5_RATE_MASK                0x0078  /* SLIMTX5_RATE - [6:3] */
4636  #define ARIZONA_SLIMTX5_RATE_SHIFT                    3  /* SLIMTX5_RATE - [6:3] */
4637  #define ARIZONA_SLIMTX5_RATE_WIDTH                    4  /* SLIMTX5_RATE - [6:3] */
4638  
4639  /*
4640   * R1516 (0x5EC) - SLIMbus Rates 8
4641   */
4642  #define ARIZONA_SLIMTX8_RATE_MASK                0x7800  /* SLIMTX8_RATE - [14:11] */
4643  #define ARIZONA_SLIMTX8_RATE_SHIFT                   11  /* SLIMTX8_RATE - [14:11] */
4644  #define ARIZONA_SLIMTX8_RATE_WIDTH                    4  /* SLIMTX8_RATE - [14:11] */
4645  #define ARIZONA_SLIMTX7_RATE_MASK                0x0078  /* SLIMTX7_RATE - [6:3] */
4646  #define ARIZONA_SLIMTX7_RATE_SHIFT                    3  /* SLIMTX7_RATE - [6:3] */
4647  #define ARIZONA_SLIMTX7_RATE_WIDTH                    4  /* SLIMTX7_RATE - [6:3] */
4648  
4649  /*
4650   * R1525 (0x5F5) - SLIMbus RX Channel Enable
4651   */
4652  #define ARIZONA_SLIMRX8_ENA                      0x0080  /* SLIMRX8_ENA */
4653  #define ARIZONA_SLIMRX8_ENA_MASK                 0x0080  /* SLIMRX8_ENA */
4654  #define ARIZONA_SLIMRX8_ENA_SHIFT                     7  /* SLIMRX8_ENA */
4655  #define ARIZONA_SLIMRX8_ENA_WIDTH                     1  /* SLIMRX8_ENA */
4656  #define ARIZONA_SLIMRX7_ENA                      0x0040  /* SLIMRX7_ENA */
4657  #define ARIZONA_SLIMRX7_ENA_MASK                 0x0040  /* SLIMRX7_ENA */
4658  #define ARIZONA_SLIMRX7_ENA_SHIFT                     6  /* SLIMRX7_ENA */
4659  #define ARIZONA_SLIMRX7_ENA_WIDTH                     1  /* SLIMRX7_ENA */
4660  #define ARIZONA_SLIMRX6_ENA                      0x0020  /* SLIMRX6_ENA */
4661  #define ARIZONA_SLIMRX6_ENA_MASK                 0x0020  /* SLIMRX6_ENA */
4662  #define ARIZONA_SLIMRX6_ENA_SHIFT                     5  /* SLIMRX6_ENA */
4663  #define ARIZONA_SLIMRX6_ENA_WIDTH                     1  /* SLIMRX6_ENA */
4664  #define ARIZONA_SLIMRX5_ENA                      0x0010  /* SLIMRX5_ENA */
4665  #define ARIZONA_SLIMRX5_ENA_MASK                 0x0010  /* SLIMRX5_ENA */
4666  #define ARIZONA_SLIMRX5_ENA_SHIFT                     4  /* SLIMRX5_ENA */
4667  #define ARIZONA_SLIMRX5_ENA_WIDTH                     1  /* SLIMRX5_ENA */
4668  #define ARIZONA_SLIMRX4_ENA                      0x0008  /* SLIMRX4_ENA */
4669  #define ARIZONA_SLIMRX4_ENA_MASK                 0x0008  /* SLIMRX4_ENA */
4670  #define ARIZONA_SLIMRX4_ENA_SHIFT                     3  /* SLIMRX4_ENA */
4671  #define ARIZONA_SLIMRX4_ENA_WIDTH                     1  /* SLIMRX4_ENA */
4672  #define ARIZONA_SLIMRX3_ENA                      0x0004  /* SLIMRX3_ENA */
4673  #define ARIZONA_SLIMRX3_ENA_MASK                 0x0004  /* SLIMRX3_ENA */
4674  #define ARIZONA_SLIMRX3_ENA_SHIFT                     2  /* SLIMRX3_ENA */
4675  #define ARIZONA_SLIMRX3_ENA_WIDTH                     1  /* SLIMRX3_ENA */
4676  #define ARIZONA_SLIMRX2_ENA                      0x0002  /* SLIMRX2_ENA */
4677  #define ARIZONA_SLIMRX2_ENA_MASK                 0x0002  /* SLIMRX2_ENA */
4678  #define ARIZONA_SLIMRX2_ENA_SHIFT                     1  /* SLIMRX2_ENA */
4679  #define ARIZONA_SLIMRX2_ENA_WIDTH                     1  /* SLIMRX2_ENA */
4680  #define ARIZONA_SLIMRX1_ENA                      0x0001  /* SLIMRX1_ENA */
4681  #define ARIZONA_SLIMRX1_ENA_MASK                 0x0001  /* SLIMRX1_ENA */
4682  #define ARIZONA_SLIMRX1_ENA_SHIFT                     0  /* SLIMRX1_ENA */
4683  #define ARIZONA_SLIMRX1_ENA_WIDTH                     1  /* SLIMRX1_ENA */
4684  
4685  /*
4686   * R1526 (0x5F6) - SLIMbus TX Channel Enable
4687   */
4688  #define ARIZONA_SLIMTX8_ENA                      0x0080  /* SLIMTX8_ENA */
4689  #define ARIZONA_SLIMTX8_ENA_MASK                 0x0080  /* SLIMTX8_ENA */
4690  #define ARIZONA_SLIMTX8_ENA_SHIFT                     7  /* SLIMTX8_ENA */
4691  #define ARIZONA_SLIMTX8_ENA_WIDTH                     1  /* SLIMTX8_ENA */
4692  #define ARIZONA_SLIMTX7_ENA                      0x0040  /* SLIMTX7_ENA */
4693  #define ARIZONA_SLIMTX7_ENA_MASK                 0x0040  /* SLIMTX7_ENA */
4694  #define ARIZONA_SLIMTX7_ENA_SHIFT                     6  /* SLIMTX7_ENA */
4695  #define ARIZONA_SLIMTX7_ENA_WIDTH                     1  /* SLIMTX7_ENA */
4696  #define ARIZONA_SLIMTX6_ENA                      0x0020  /* SLIMTX6_ENA */
4697  #define ARIZONA_SLIMTX6_ENA_MASK                 0x0020  /* SLIMTX6_ENA */
4698  #define ARIZONA_SLIMTX6_ENA_SHIFT                     5  /* SLIMTX6_ENA */
4699  #define ARIZONA_SLIMTX6_ENA_WIDTH                     1  /* SLIMTX6_ENA */
4700  #define ARIZONA_SLIMTX5_ENA                      0x0010  /* SLIMTX5_ENA */
4701  #define ARIZONA_SLIMTX5_ENA_MASK                 0x0010  /* SLIMTX5_ENA */
4702  #define ARIZONA_SLIMTX5_ENA_SHIFT                     4  /* SLIMTX5_ENA */
4703  #define ARIZONA_SLIMTX5_ENA_WIDTH                     1  /* SLIMTX5_ENA */
4704  #define ARIZONA_SLIMTX4_ENA                      0x0008  /* SLIMTX4_ENA */
4705  #define ARIZONA_SLIMTX4_ENA_MASK                 0x0008  /* SLIMTX4_ENA */
4706  #define ARIZONA_SLIMTX4_ENA_SHIFT                     3  /* SLIMTX4_ENA */
4707  #define ARIZONA_SLIMTX4_ENA_WIDTH                     1  /* SLIMTX4_ENA */
4708  #define ARIZONA_SLIMTX3_ENA                      0x0004  /* SLIMTX3_ENA */
4709  #define ARIZONA_SLIMTX3_ENA_MASK                 0x0004  /* SLIMTX3_ENA */
4710  #define ARIZONA_SLIMTX3_ENA_SHIFT                     2  /* SLIMTX3_ENA */
4711  #define ARIZONA_SLIMTX3_ENA_WIDTH                     1  /* SLIMTX3_ENA */
4712  #define ARIZONA_SLIMTX2_ENA                      0x0002  /* SLIMTX2_ENA */
4713  #define ARIZONA_SLIMTX2_ENA_MASK                 0x0002  /* SLIMTX2_ENA */
4714  #define ARIZONA_SLIMTX2_ENA_SHIFT                     1  /* SLIMTX2_ENA */
4715  #define ARIZONA_SLIMTX2_ENA_WIDTH                     1  /* SLIMTX2_ENA */
4716  #define ARIZONA_SLIMTX1_ENA                      0x0001  /* SLIMTX1_ENA */
4717  #define ARIZONA_SLIMTX1_ENA_MASK                 0x0001  /* SLIMTX1_ENA */
4718  #define ARIZONA_SLIMTX1_ENA_SHIFT                     0  /* SLIMTX1_ENA */
4719  #define ARIZONA_SLIMTX1_ENA_WIDTH                     1  /* SLIMTX1_ENA */
4720  
4721  /*
4722   * R1527 (0x5F7) - SLIMbus RX Port Status
4723   */
4724  #define ARIZONA_SLIMRX8_PORT_STS                 0x0080  /* SLIMRX8_PORT_STS */
4725  #define ARIZONA_SLIMRX8_PORT_STS_MASK            0x0080  /* SLIMRX8_PORT_STS */
4726  #define ARIZONA_SLIMRX8_PORT_STS_SHIFT                7  /* SLIMRX8_PORT_STS */
4727  #define ARIZONA_SLIMRX8_PORT_STS_WIDTH                1  /* SLIMRX8_PORT_STS */
4728  #define ARIZONA_SLIMRX7_PORT_STS                 0x0040  /* SLIMRX7_PORT_STS */
4729  #define ARIZONA_SLIMRX7_PORT_STS_MASK            0x0040  /* SLIMRX7_PORT_STS */
4730  #define ARIZONA_SLIMRX7_PORT_STS_SHIFT                6  /* SLIMRX7_PORT_STS */
4731  #define ARIZONA_SLIMRX7_PORT_STS_WIDTH                1  /* SLIMRX7_PORT_STS */
4732  #define ARIZONA_SLIMRX6_PORT_STS                 0x0020  /* SLIMRX6_PORT_STS */
4733  #define ARIZONA_SLIMRX6_PORT_STS_MASK            0x0020  /* SLIMRX6_PORT_STS */
4734  #define ARIZONA_SLIMRX6_PORT_STS_SHIFT                5  /* SLIMRX6_PORT_STS */
4735  #define ARIZONA_SLIMRX6_PORT_STS_WIDTH                1  /* SLIMRX6_PORT_STS */
4736  #define ARIZONA_SLIMRX5_PORT_STS                 0x0010  /* SLIMRX5_PORT_STS */
4737  #define ARIZONA_SLIMRX5_PORT_STS_MASK            0x0010  /* SLIMRX5_PORT_STS */
4738  #define ARIZONA_SLIMRX5_PORT_STS_SHIFT                4  /* SLIMRX5_PORT_STS */
4739  #define ARIZONA_SLIMRX5_PORT_STS_WIDTH                1  /* SLIMRX5_PORT_STS */
4740  #define ARIZONA_SLIMRX4_PORT_STS                 0x0008  /* SLIMRX4_PORT_STS */
4741  #define ARIZONA_SLIMRX4_PORT_STS_MASK            0x0008  /* SLIMRX4_PORT_STS */
4742  #define ARIZONA_SLIMRX4_PORT_STS_SHIFT                3  /* SLIMRX4_PORT_STS */
4743  #define ARIZONA_SLIMRX4_PORT_STS_WIDTH                1  /* SLIMRX4_PORT_STS */
4744  #define ARIZONA_SLIMRX3_PORT_STS                 0x0004  /* SLIMRX3_PORT_STS */
4745  #define ARIZONA_SLIMRX3_PORT_STS_MASK            0x0004  /* SLIMRX3_PORT_STS */
4746  #define ARIZONA_SLIMRX3_PORT_STS_SHIFT                2  /* SLIMRX3_PORT_STS */
4747  #define ARIZONA_SLIMRX3_PORT_STS_WIDTH                1  /* SLIMRX3_PORT_STS */
4748  #define ARIZONA_SLIMRX2_PORT_STS                 0x0002  /* SLIMRX2_PORT_STS */
4749  #define ARIZONA_SLIMRX2_PORT_STS_MASK            0x0002  /* SLIMRX2_PORT_STS */
4750  #define ARIZONA_SLIMRX2_PORT_STS_SHIFT                1  /* SLIMRX2_PORT_STS */
4751  #define ARIZONA_SLIMRX2_PORT_STS_WIDTH                1  /* SLIMRX2_PORT_STS */
4752  #define ARIZONA_SLIMRX1_PORT_STS                 0x0001  /* SLIMRX1_PORT_STS */
4753  #define ARIZONA_SLIMRX1_PORT_STS_MASK            0x0001  /* SLIMRX1_PORT_STS */
4754  #define ARIZONA_SLIMRX1_PORT_STS_SHIFT                0  /* SLIMRX1_PORT_STS */
4755  #define ARIZONA_SLIMRX1_PORT_STS_WIDTH                1  /* SLIMRX1_PORT_STS */
4756  
4757  /*
4758   * R1528 (0x5F8) - SLIMbus TX Port Status
4759   */
4760  #define ARIZONA_SLIMTX8_PORT_STS                 0x0080  /* SLIMTX8_PORT_STS */
4761  #define ARIZONA_SLIMTX8_PORT_STS_MASK            0x0080  /* SLIMTX8_PORT_STS */
4762  #define ARIZONA_SLIMTX8_PORT_STS_SHIFT                7  /* SLIMTX8_PORT_STS */
4763  #define ARIZONA_SLIMTX8_PORT_STS_WIDTH                1  /* SLIMTX8_PORT_STS */
4764  #define ARIZONA_SLIMTX7_PORT_STS                 0x0040  /* SLIMTX7_PORT_STS */
4765  #define ARIZONA_SLIMTX7_PORT_STS_MASK            0x0040  /* SLIMTX7_PORT_STS */
4766  #define ARIZONA_SLIMTX7_PORT_STS_SHIFT                6  /* SLIMTX7_PORT_STS */
4767  #define ARIZONA_SLIMTX7_PORT_STS_WIDTH                1  /* SLIMTX7_PORT_STS */
4768  #define ARIZONA_SLIMTX6_PORT_STS                 0x0020  /* SLIMTX6_PORT_STS */
4769  #define ARIZONA_SLIMTX6_PORT_STS_MASK            0x0020  /* SLIMTX6_PORT_STS */
4770  #define ARIZONA_SLIMTX6_PORT_STS_SHIFT                5  /* SLIMTX6_PORT_STS */
4771  #define ARIZONA_SLIMTX6_PORT_STS_WIDTH                1  /* SLIMTX6_PORT_STS */
4772  #define ARIZONA_SLIMTX5_PORT_STS                 0x0010  /* SLIMTX5_PORT_STS */
4773  #define ARIZONA_SLIMTX5_PORT_STS_MASK            0x0010  /* SLIMTX5_PORT_STS */
4774  #define ARIZONA_SLIMTX5_PORT_STS_SHIFT                4  /* SLIMTX5_PORT_STS */
4775  #define ARIZONA_SLIMTX5_PORT_STS_WIDTH                1  /* SLIMTX5_PORT_STS */
4776  #define ARIZONA_SLIMTX4_PORT_STS                 0x0008  /* SLIMTX4_PORT_STS */
4777  #define ARIZONA_SLIMTX4_PORT_STS_MASK            0x0008  /* SLIMTX4_PORT_STS */
4778  #define ARIZONA_SLIMTX4_PORT_STS_SHIFT                3  /* SLIMTX4_PORT_STS */
4779  #define ARIZONA_SLIMTX4_PORT_STS_WIDTH                1  /* SLIMTX4_PORT_STS */
4780  #define ARIZONA_SLIMTX3_PORT_STS                 0x0004  /* SLIMTX3_PORT_STS */
4781  #define ARIZONA_SLIMTX3_PORT_STS_MASK            0x0004  /* SLIMTX3_PORT_STS */
4782  #define ARIZONA_SLIMTX3_PORT_STS_SHIFT                2  /* SLIMTX3_PORT_STS */
4783  #define ARIZONA_SLIMTX3_PORT_STS_WIDTH                1  /* SLIMTX3_PORT_STS */
4784  #define ARIZONA_SLIMTX2_PORT_STS                 0x0002  /* SLIMTX2_PORT_STS */
4785  #define ARIZONA_SLIMTX2_PORT_STS_MASK            0x0002  /* SLIMTX2_PORT_STS */
4786  #define ARIZONA_SLIMTX2_PORT_STS_SHIFT                1  /* SLIMTX2_PORT_STS */
4787  #define ARIZONA_SLIMTX2_PORT_STS_WIDTH                1  /* SLIMTX2_PORT_STS */
4788  #define ARIZONA_SLIMTX1_PORT_STS                 0x0001  /* SLIMTX1_PORT_STS */
4789  #define ARIZONA_SLIMTX1_PORT_STS_MASK            0x0001  /* SLIMTX1_PORT_STS */
4790  #define ARIZONA_SLIMTX1_PORT_STS_SHIFT                0  /* SLIMTX1_PORT_STS */
4791  #define ARIZONA_SLIMTX1_PORT_STS_WIDTH                1  /* SLIMTX1_PORT_STS */
4792  
4793  /*
4794   * R3087 (0xC0F) - IRQ CTRL 1
4795   */
4796  #define ARIZONA_IRQ_POL                          0x0400  /* IRQ_POL */
4797  #define ARIZONA_IRQ_POL_MASK                     0x0400  /* IRQ_POL */
4798  #define ARIZONA_IRQ_POL_SHIFT                        10  /* IRQ_POL */
4799  #define ARIZONA_IRQ_POL_WIDTH                         1  /* IRQ_POL */
4800  #define ARIZONA_IRQ_OP_CFG                       0x0200  /* IRQ_OP_CFG */
4801  #define ARIZONA_IRQ_OP_CFG_MASK                  0x0200  /* IRQ_OP_CFG */
4802  #define ARIZONA_IRQ_OP_CFG_SHIFT                      9  /* IRQ_OP_CFG */
4803  #define ARIZONA_IRQ_OP_CFG_WIDTH                      1  /* IRQ_OP_CFG */
4804  
4805  /*
4806   * R3088 (0xC10) - GPIO Debounce Config
4807   */
4808  #define ARIZONA_GP_DBTIME_MASK                   0xF000  /* GP_DBTIME - [15:12] */
4809  #define ARIZONA_GP_DBTIME_SHIFT                      12  /* GP_DBTIME - [15:12] */
4810  #define ARIZONA_GP_DBTIME_WIDTH                       4  /* GP_DBTIME - [15:12] */
4811  
4812  /*
4813   * R3096 (0xC18) - GP Switch 1
4814   */
4815  #define ARIZONA_SW1_MODE_MASK                    0x0003  /* SW1_MODE - [1:0] */
4816  #define ARIZONA_SW1_MODE_SHIFT                        0  /* SW1_MODE - [1:0] */
4817  #define ARIZONA_SW1_MODE_WIDTH                        2  /* SW1_MODE - [1:0] */
4818  
4819  /*
4820   * R3104 (0xC20) - Misc Pad Ctrl 1
4821   */
4822  #define ARIZONA_LDO1ENA_PD                       0x8000  /* LDO1ENA_PD */
4823  #define ARIZONA_LDO1ENA_PD_MASK                  0x8000  /* LDO1ENA_PD */
4824  #define ARIZONA_LDO1ENA_PD_SHIFT                     15  /* LDO1ENA_PD */
4825  #define ARIZONA_LDO1ENA_PD_WIDTH                      1  /* LDO1ENA_PD */
4826  #define ARIZONA_MCLK2_PD                         0x2000  /* MCLK2_PD */
4827  #define ARIZONA_MCLK2_PD_MASK                    0x2000  /* MCLK2_PD */
4828  #define ARIZONA_MCLK2_PD_SHIFT                       13  /* MCLK2_PD */
4829  #define ARIZONA_MCLK2_PD_WIDTH                        1  /* MCLK2_PD */
4830  #define ARIZONA_RSTB_PU                          0x0002  /* RSTB_PU */
4831  #define ARIZONA_RSTB_PU_MASK                     0x0002  /* RSTB_PU */
4832  #define ARIZONA_RSTB_PU_SHIFT                         1  /* RSTB_PU */
4833  #define ARIZONA_RSTB_PU_WIDTH                         1  /* RSTB_PU */
4834  
4835  /*
4836   * R3105 (0xC21) - Misc Pad Ctrl 2
4837   */
4838  #define ARIZONA_MCLK1_PD                         0x1000  /* MCLK1_PD */
4839  #define ARIZONA_MCLK1_PD_MASK                    0x1000  /* MCLK1_PD */
4840  #define ARIZONA_MCLK1_PD_SHIFT                       12  /* MCLK1_PD */
4841  #define ARIZONA_MCLK1_PD_WIDTH                        1  /* MCLK1_PD */
4842  #define ARIZONA_MICD_PD                          0x0100  /* MICD_PD */
4843  #define ARIZONA_MICD_PD_MASK                     0x0100  /* MICD_PD */
4844  #define ARIZONA_MICD_PD_SHIFT                         8  /* MICD_PD */
4845  #define ARIZONA_MICD_PD_WIDTH                         1  /* MICD_PD */
4846  #define ARIZONA_ADDR_PD                          0x0001  /* ADDR_PD */
4847  #define ARIZONA_ADDR_PD_MASK                     0x0001  /* ADDR_PD */
4848  #define ARIZONA_ADDR_PD_SHIFT                         0  /* ADDR_PD */
4849  #define ARIZONA_ADDR_PD_WIDTH                         1  /* ADDR_PD */
4850  
4851  /*
4852   * R3106 (0xC22) - Misc Pad Ctrl 3
4853   */
4854  #define ARIZONA_DMICDAT4_PD                      0x0008  /* DMICDAT4_PD */
4855  #define ARIZONA_DMICDAT4_PD_MASK                 0x0008  /* DMICDAT4_PD */
4856  #define ARIZONA_DMICDAT4_PD_SHIFT                     3  /* DMICDAT4_PD */
4857  #define ARIZONA_DMICDAT4_PD_WIDTH                     1  /* DMICDAT4_PD */
4858  #define ARIZONA_DMICDAT3_PD                      0x0004  /* DMICDAT3_PD */
4859  #define ARIZONA_DMICDAT3_PD_MASK                 0x0004  /* DMICDAT3_PD */
4860  #define ARIZONA_DMICDAT3_PD_SHIFT                     2  /* DMICDAT3_PD */
4861  #define ARIZONA_DMICDAT3_PD_WIDTH                     1  /* DMICDAT3_PD */
4862  #define ARIZONA_DMICDAT2_PD                      0x0002  /* DMICDAT2_PD */
4863  #define ARIZONA_DMICDAT2_PD_MASK                 0x0002  /* DMICDAT2_PD */
4864  #define ARIZONA_DMICDAT2_PD_SHIFT                     1  /* DMICDAT2_PD */
4865  #define ARIZONA_DMICDAT2_PD_WIDTH                     1  /* DMICDAT2_PD */
4866  #define ARIZONA_DMICDAT1_PD                      0x0001  /* DMICDAT1_PD */
4867  #define ARIZONA_DMICDAT1_PD_MASK                 0x0001  /* DMICDAT1_PD */
4868  #define ARIZONA_DMICDAT1_PD_SHIFT                     0  /* DMICDAT1_PD */
4869  #define ARIZONA_DMICDAT1_PD_WIDTH                     1  /* DMICDAT1_PD */
4870  
4871  /*
4872   * R3107 (0xC23) - Misc Pad Ctrl 4
4873   */
4874  #define ARIZONA_AIF1RXLRCLK_PU                   0x0020  /* AIF1RXLRCLK_PU */
4875  #define ARIZONA_AIF1RXLRCLK_PU_MASK              0x0020  /* AIF1RXLRCLK_PU */
4876  #define ARIZONA_AIF1RXLRCLK_PU_SHIFT                  5  /* AIF1RXLRCLK_PU */
4877  #define ARIZONA_AIF1RXLRCLK_PU_WIDTH                  1  /* AIF1RXLRCLK_PU */
4878  #define ARIZONA_AIF1RXLRCLK_PD                   0x0010  /* AIF1RXLRCLK_PD */
4879  #define ARIZONA_AIF1RXLRCLK_PD_MASK              0x0010  /* AIF1RXLRCLK_PD */
4880  #define ARIZONA_AIF1RXLRCLK_PD_SHIFT                  4  /* AIF1RXLRCLK_PD */
4881  #define ARIZONA_AIF1RXLRCLK_PD_WIDTH                  1  /* AIF1RXLRCLK_PD */
4882  #define ARIZONA_AIF1BCLK_PU                      0x0008  /* AIF1BCLK_PU */
4883  #define ARIZONA_AIF1BCLK_PU_MASK                 0x0008  /* AIF1BCLK_PU */
4884  #define ARIZONA_AIF1BCLK_PU_SHIFT                     3  /* AIF1BCLK_PU */
4885  #define ARIZONA_AIF1BCLK_PU_WIDTH                     1  /* AIF1BCLK_PU */
4886  #define ARIZONA_AIF1BCLK_PD                      0x0004  /* AIF1BCLK_PD */
4887  #define ARIZONA_AIF1BCLK_PD_MASK                 0x0004  /* AIF1BCLK_PD */
4888  #define ARIZONA_AIF1BCLK_PD_SHIFT                     2  /* AIF1BCLK_PD */
4889  #define ARIZONA_AIF1BCLK_PD_WIDTH                     1  /* AIF1BCLK_PD */
4890  #define ARIZONA_AIF1RXDAT_PU                     0x0002  /* AIF1RXDAT_PU */
4891  #define ARIZONA_AIF1RXDAT_PU_MASK                0x0002  /* AIF1RXDAT_PU */
4892  #define ARIZONA_AIF1RXDAT_PU_SHIFT                    1  /* AIF1RXDAT_PU */
4893  #define ARIZONA_AIF1RXDAT_PU_WIDTH                    1  /* AIF1RXDAT_PU */
4894  #define ARIZONA_AIF1RXDAT_PD                     0x0001  /* AIF1RXDAT_PD */
4895  #define ARIZONA_AIF1RXDAT_PD_MASK                0x0001  /* AIF1RXDAT_PD */
4896  #define ARIZONA_AIF1RXDAT_PD_SHIFT                    0  /* AIF1RXDAT_PD */
4897  #define ARIZONA_AIF1RXDAT_PD_WIDTH                    1  /* AIF1RXDAT_PD */
4898  
4899  /*
4900   * R3108 (0xC24) - Misc Pad Ctrl 5
4901   */
4902  #define ARIZONA_AIF2RXLRCLK_PU                   0x0020  /* AIF2RXLRCLK_PU */
4903  #define ARIZONA_AIF2RXLRCLK_PU_MASK              0x0020  /* AIF2RXLRCLK_PU */
4904  #define ARIZONA_AIF2RXLRCLK_PU_SHIFT                  5  /* AIF2RXLRCLK_PU */
4905  #define ARIZONA_AIF2RXLRCLK_PU_WIDTH                  1  /* AIF2RXLRCLK_PU */
4906  #define ARIZONA_AIF2RXLRCLK_PD                   0x0010  /* AIF2RXLRCLK_PD */
4907  #define ARIZONA_AIF2RXLRCLK_PD_MASK              0x0010  /* AIF2RXLRCLK_PD */
4908  #define ARIZONA_AIF2RXLRCLK_PD_SHIFT                  4  /* AIF2RXLRCLK_PD */
4909  #define ARIZONA_AIF2RXLRCLK_PD_WIDTH                  1  /* AIF2RXLRCLK_PD */
4910  #define ARIZONA_AIF2BCLK_PU                      0x0008  /* AIF2BCLK_PU */
4911  #define ARIZONA_AIF2BCLK_PU_MASK                 0x0008  /* AIF2BCLK_PU */
4912  #define ARIZONA_AIF2BCLK_PU_SHIFT                     3  /* AIF2BCLK_PU */
4913  #define ARIZONA_AIF2BCLK_PU_WIDTH                     1  /* AIF2BCLK_PU */
4914  #define ARIZONA_AIF2BCLK_PD                      0x0004  /* AIF2BCLK_PD */
4915  #define ARIZONA_AIF2BCLK_PD_MASK                 0x0004  /* AIF2BCLK_PD */
4916  #define ARIZONA_AIF2BCLK_PD_SHIFT                     2  /* AIF2BCLK_PD */
4917  #define ARIZONA_AIF2BCLK_PD_WIDTH                     1  /* AIF2BCLK_PD */
4918  #define ARIZONA_AIF2RXDAT_PU                     0x0002  /* AIF2RXDAT_PU */
4919  #define ARIZONA_AIF2RXDAT_PU_MASK                0x0002  /* AIF2RXDAT_PU */
4920  #define ARIZONA_AIF2RXDAT_PU_SHIFT                    1  /* AIF2RXDAT_PU */
4921  #define ARIZONA_AIF2RXDAT_PU_WIDTH                    1  /* AIF2RXDAT_PU */
4922  #define ARIZONA_AIF2RXDAT_PD                     0x0001  /* AIF2RXDAT_PD */
4923  #define ARIZONA_AIF2RXDAT_PD_MASK                0x0001  /* AIF2RXDAT_PD */
4924  #define ARIZONA_AIF2RXDAT_PD_SHIFT                    0  /* AIF2RXDAT_PD */
4925  #define ARIZONA_AIF2RXDAT_PD_WIDTH                    1  /* AIF2RXDAT_PD */
4926  
4927  /*
4928   * R3109 (0xC25) - Misc Pad Ctrl 6
4929   */
4930  #define ARIZONA_AIF3RXLRCLK_PU                   0x0020  /* AIF3RXLRCLK_PU */
4931  #define ARIZONA_AIF3RXLRCLK_PU_MASK              0x0020  /* AIF3RXLRCLK_PU */
4932  #define ARIZONA_AIF3RXLRCLK_PU_SHIFT                  5  /* AIF3RXLRCLK_PU */
4933  #define ARIZONA_AIF3RXLRCLK_PU_WIDTH                  1  /* AIF3RXLRCLK_PU */
4934  #define ARIZONA_AIF3RXLRCLK_PD                   0x0010  /* AIF3RXLRCLK_PD */
4935  #define ARIZONA_AIF3RXLRCLK_PD_MASK              0x0010  /* AIF3RXLRCLK_PD */
4936  #define ARIZONA_AIF3RXLRCLK_PD_SHIFT                  4  /* AIF3RXLRCLK_PD */
4937  #define ARIZONA_AIF3RXLRCLK_PD_WIDTH                  1  /* AIF3RXLRCLK_PD */
4938  #define ARIZONA_AIF3BCLK_PU                      0x0008  /* AIF3BCLK_PU */
4939  #define ARIZONA_AIF3BCLK_PU_MASK                 0x0008  /* AIF3BCLK_PU */
4940  #define ARIZONA_AIF3BCLK_PU_SHIFT                     3  /* AIF3BCLK_PU */
4941  #define ARIZONA_AIF3BCLK_PU_WIDTH                     1  /* AIF3BCLK_PU */
4942  #define ARIZONA_AIF3BCLK_PD                      0x0004  /* AIF3BCLK_PD */
4943  #define ARIZONA_AIF3BCLK_PD_MASK                 0x0004  /* AIF3BCLK_PD */
4944  #define ARIZONA_AIF3BCLK_PD_SHIFT                     2  /* AIF3BCLK_PD */
4945  #define ARIZONA_AIF3BCLK_PD_WIDTH                     1  /* AIF3BCLK_PD */
4946  #define ARIZONA_AIF3RXDAT_PU                     0x0002  /* AIF3RXDAT_PU */
4947  #define ARIZONA_AIF3RXDAT_PU_MASK                0x0002  /* AIF3RXDAT_PU */
4948  #define ARIZONA_AIF3RXDAT_PU_SHIFT                    1  /* AIF3RXDAT_PU */
4949  #define ARIZONA_AIF3RXDAT_PU_WIDTH                    1  /* AIF3RXDAT_PU */
4950  #define ARIZONA_AIF3RXDAT_PD                     0x0001  /* AIF3RXDAT_PD */
4951  #define ARIZONA_AIF3RXDAT_PD_MASK                0x0001  /* AIF3RXDAT_PD */
4952  #define ARIZONA_AIF3RXDAT_PD_SHIFT                    0  /* AIF3RXDAT_PD */
4953  #define ARIZONA_AIF3RXDAT_PD_WIDTH                    1  /* AIF3RXDAT_PD */
4954  
4955  /*
4956   * R3328 (0xD00) - Interrupt Status 1
4957   */
4958  #define ARIZONA_GP4_EINT1                        0x0008  /* GP4_EINT1 */
4959  #define ARIZONA_GP4_EINT1_MASK                   0x0008  /* GP4_EINT1 */
4960  #define ARIZONA_GP4_EINT1_SHIFT                       3  /* GP4_EINT1 */
4961  #define ARIZONA_GP4_EINT1_WIDTH                       1  /* GP4_EINT1 */
4962  #define ARIZONA_GP3_EINT1                        0x0004  /* GP3_EINT1 */
4963  #define ARIZONA_GP3_EINT1_MASK                   0x0004  /* GP3_EINT1 */
4964  #define ARIZONA_GP3_EINT1_SHIFT                       2  /* GP3_EINT1 */
4965  #define ARIZONA_GP3_EINT1_WIDTH                       1  /* GP3_EINT1 */
4966  #define ARIZONA_GP2_EINT1                        0x0002  /* GP2_EINT1 */
4967  #define ARIZONA_GP2_EINT1_MASK                   0x0002  /* GP2_EINT1 */
4968  #define ARIZONA_GP2_EINT1_SHIFT                       1  /* GP2_EINT1 */
4969  #define ARIZONA_GP2_EINT1_WIDTH                       1  /* GP2_EINT1 */
4970  #define ARIZONA_GP1_EINT1                        0x0001  /* GP1_EINT1 */
4971  #define ARIZONA_GP1_EINT1_MASK                   0x0001  /* GP1_EINT1 */
4972  #define ARIZONA_GP1_EINT1_SHIFT                       0  /* GP1_EINT1 */
4973  #define ARIZONA_GP1_EINT1_WIDTH                       1  /* GP1_EINT1 */
4974  
4975  /*
4976   * R3329 (0xD01) - Interrupt Status 2
4977   */
4978  #define ARIZONA_DSP4_RAM_RDY_EINT1               0x0800  /* DSP4_RAM_RDY_EINT1 */
4979  #define ARIZONA_DSP4_RAM_RDY_EINT1_MASK          0x0800  /* DSP4_RAM_RDY_EINT1 */
4980  #define ARIZONA_DSP4_RAM_RDY_EINT1_SHIFT             11  /* DSP4_RAM_RDY_EINT1 */
4981  #define ARIZONA_DSP4_RAM_RDY_EINT1_WIDTH              1  /* DSP4_RAM_RDY_EINT1 */
4982  #define ARIZONA_DSP3_RAM_RDY_EINT1               0x0400  /* DSP3_RAM_RDY_EINT1 */
4983  #define ARIZONA_DSP3_RAM_RDY_EINT1_MASK          0x0400  /* DSP3_RAM_RDY_EINT1 */
4984  #define ARIZONA_DSP3_RAM_RDY_EINT1_SHIFT             10  /* DSP3_RAM_RDY_EINT1 */
4985  #define ARIZONA_DSP3_RAM_RDY_EINT1_WIDTH              1  /* DSP3_RAM_RDY_EINT1 */
4986  #define ARIZONA_DSP2_RAM_RDY_EINT1               0x0200  /* DSP2_RAM_RDY_EINT1 */
4987  #define ARIZONA_DSP2_RAM_RDY_EINT1_MASK          0x0200  /* DSP2_RAM_RDY_EINT1 */
4988  #define ARIZONA_DSP2_RAM_RDY_EINT1_SHIFT              9  /* DSP2_RAM_RDY_EINT1 */
4989  #define ARIZONA_DSP2_RAM_RDY_EINT1_WIDTH              1  /* DSP2_RAM_RDY_EINT1 */
4990  #define ARIZONA_DSP1_RAM_RDY_EINT1               0x0100  /* DSP1_RAM_RDY_EINT1 */
4991  #define ARIZONA_DSP1_RAM_RDY_EINT1_MASK          0x0100  /* DSP1_RAM_RDY_EINT1 */
4992  #define ARIZONA_DSP1_RAM_RDY_EINT1_SHIFT              8  /* DSP1_RAM_RDY_EINT1 */
4993  #define ARIZONA_DSP1_RAM_RDY_EINT1_WIDTH              1  /* DSP1_RAM_RDY_EINT1 */
4994  #define ARIZONA_DSP_IRQ8_EINT1                   0x0080  /* DSP_IRQ8_EINT1 */
4995  #define ARIZONA_DSP_IRQ8_EINT1_MASK              0x0080  /* DSP_IRQ8_EINT1 */
4996  #define ARIZONA_DSP_IRQ8_EINT1_SHIFT                  7  /* DSP_IRQ8_EINT1 */
4997  #define ARIZONA_DSP_IRQ8_EINT1_WIDTH                  1  /* DSP_IRQ8_EINT1 */
4998  #define ARIZONA_DSP_IRQ7_EINT1                   0x0040  /* DSP_IRQ7_EINT1 */
4999  #define ARIZONA_DSP_IRQ7_EINT1_MASK              0x0040  /* DSP_IRQ7_EINT1 */
5000  #define ARIZONA_DSP_IRQ7_EINT1_SHIFT                  6  /* DSP_IRQ7_EINT1 */
5001  #define ARIZONA_DSP_IRQ7_EINT1_WIDTH                  1  /* DSP_IRQ7_EINT1 */
5002  #define ARIZONA_DSP_IRQ6_EINT1                   0x0020  /* DSP_IRQ6_EINT1 */
5003  #define ARIZONA_DSP_IRQ6_EINT1_MASK              0x0020  /* DSP_IRQ6_EINT1 */
5004  #define ARIZONA_DSP_IRQ6_EINT1_SHIFT                  5  /* DSP_IRQ6_EINT1 */
5005  #define ARIZONA_DSP_IRQ6_EINT1_WIDTH                  1  /* DSP_IRQ6_EINT1 */
5006  #define ARIZONA_DSP_IRQ5_EINT1                   0x0010  /* DSP_IRQ5_EINT1 */
5007  #define ARIZONA_DSP_IRQ5_EINT1_MASK              0x0010  /* DSP_IRQ5_EINT1 */
5008  #define ARIZONA_DSP_IRQ5_EINT1_SHIFT                  4  /* DSP_IRQ5_EINT1 */
5009  #define ARIZONA_DSP_IRQ5_EINT1_WIDTH                  1  /* DSP_IRQ5_EINT1 */
5010  #define ARIZONA_DSP_IRQ4_EINT1                   0x0008  /* DSP_IRQ4_EINT1 */
5011  #define ARIZONA_DSP_IRQ4_EINT1_MASK              0x0008  /* DSP_IRQ4_EINT1 */
5012  #define ARIZONA_DSP_IRQ4_EINT1_SHIFT                  3  /* DSP_IRQ4_EINT1 */
5013  #define ARIZONA_DSP_IRQ4_EINT1_WIDTH                  1  /* DSP_IRQ4_EINT1 */
5014  #define ARIZONA_DSP_IRQ3_EINT1                   0x0004  /* DSP_IRQ3_EINT1 */
5015  #define ARIZONA_DSP_IRQ3_EINT1_MASK              0x0004  /* DSP_IRQ3_EINT1 */
5016  #define ARIZONA_DSP_IRQ3_EINT1_SHIFT                  2  /* DSP_IRQ3_EINT1 */
5017  #define ARIZONA_DSP_IRQ3_EINT1_WIDTH                  1  /* DSP_IRQ3_EINT1 */
5018  #define ARIZONA_DSP_IRQ2_EINT1                   0x0002  /* DSP_IRQ2_EINT1 */
5019  #define ARIZONA_DSP_IRQ2_EINT1_MASK              0x0002  /* DSP_IRQ2_EINT1 */
5020  #define ARIZONA_DSP_IRQ2_EINT1_SHIFT                  1  /* DSP_IRQ2_EINT1 */
5021  #define ARIZONA_DSP_IRQ2_EINT1_WIDTH                  1  /* DSP_IRQ2_EINT1 */
5022  #define ARIZONA_DSP_IRQ1_EINT1                   0x0001  /* DSP_IRQ1_EINT1 */
5023  #define ARIZONA_DSP_IRQ1_EINT1_MASK              0x0001  /* DSP_IRQ1_EINT1 */
5024  #define ARIZONA_DSP_IRQ1_EINT1_SHIFT                  0  /* DSP_IRQ1_EINT1 */
5025  #define ARIZONA_DSP_IRQ1_EINT1_WIDTH                  1  /* DSP_IRQ1_EINT1 */
5026  
5027  /*
5028   * R3330 (0xD02) - Interrupt Status 3
5029   */
5030  #define ARIZONA_SPK_OVERHEAT_WARN_EINT1          0x8000  /* SPK_OVERHEAT_WARN_EINT1 */
5031  #define ARIZONA_SPK_OVERHEAT_WARN_EINT1_MASK     0x8000  /* SPK_OVERHEAD_WARN_EINT1 */
5032  #define ARIZONA_SPK_OVERHEAT_WARN_EINT1_SHIFT        15  /* SPK_OVERHEAT_WARN_EINT1 */
5033  #define ARIZONA_SPK_OVERHEAT_WARN_EINT1_WIDTH         1  /* SPK_OVERHEAT_WARN_EINT1 */
5034  #define ARIZONA_SPK_OVERHEAT_EINT1               0x4000  /* SPK_OVERHEAT_EINT1 */
5035  #define ARIZONA_SPK_OVERHEAT_EINT1_MASK          0x4000  /* SPK_OVERHEAT_EINT1 */
5036  #define ARIZONA_SPK_OVERHEAT_EINT1_SHIFT             14  /* SPK_OVERHEAT_EINT1 */
5037  #define ARIZONA_SPK_OVERHEAT_EINT1_WIDTH              1  /* SPK_OVERHEAT_EINT1 */
5038  #define ARIZONA_HPDET_EINT1                      0x2000  /* HPDET_EINT1 */
5039  #define ARIZONA_HPDET_EINT1_MASK                 0x2000  /* HPDET_EINT1 */
5040  #define ARIZONA_HPDET_EINT1_SHIFT                    13  /* HPDET_EINT1 */
5041  #define ARIZONA_HPDET_EINT1_WIDTH                     1  /* HPDET_EINT1 */
5042  #define ARIZONA_MICDET_EINT1                     0x1000  /* MICDET_EINT1 */
5043  #define ARIZONA_MICDET_EINT1_MASK                0x1000  /* MICDET_EINT1 */
5044  #define ARIZONA_MICDET_EINT1_SHIFT                   12  /* MICDET_EINT1 */
5045  #define ARIZONA_MICDET_EINT1_WIDTH                    1  /* MICDET_EINT1 */
5046  #define ARIZONA_WSEQ_DONE_EINT1                  0x0800  /* WSEQ_DONE_EINT1 */
5047  #define ARIZONA_WSEQ_DONE_EINT1_MASK             0x0800  /* WSEQ_DONE_EINT1 */
5048  #define ARIZONA_WSEQ_DONE_EINT1_SHIFT                11  /* WSEQ_DONE_EINT1 */
5049  #define ARIZONA_WSEQ_DONE_EINT1_WIDTH                 1  /* WSEQ_DONE_EINT1 */
5050  #define ARIZONA_DRC2_SIG_DET_EINT1               0x0400  /* DRC2_SIG_DET_EINT1 */
5051  #define ARIZONA_DRC2_SIG_DET_EINT1_MASK          0x0400  /* DRC2_SIG_DET_EINT1 */
5052  #define ARIZONA_DRC2_SIG_DET_EINT1_SHIFT             10  /* DRC2_SIG_DET_EINT1 */
5053  #define ARIZONA_DRC2_SIG_DET_EINT1_WIDTH              1  /* DRC2_SIG_DET_EINT1 */
5054  #define ARIZONA_DRC1_SIG_DET_EINT1               0x0200  /* DRC1_SIG_DET_EINT1 */
5055  #define ARIZONA_DRC1_SIG_DET_EINT1_MASK          0x0200  /* DRC1_SIG_DET_EINT1 */
5056  #define ARIZONA_DRC1_SIG_DET_EINT1_SHIFT              9  /* DRC1_SIG_DET_EINT1 */
5057  #define ARIZONA_DRC1_SIG_DET_EINT1_WIDTH              1  /* DRC1_SIG_DET_EINT1 */
5058  #define ARIZONA_ASRC2_LOCK_EINT1                 0x0100  /* ASRC2_LOCK_EINT1 */
5059  #define ARIZONA_ASRC2_LOCK_EINT1_MASK            0x0100  /* ASRC2_LOCK_EINT1 */
5060  #define ARIZONA_ASRC2_LOCK_EINT1_SHIFT                8  /* ASRC2_LOCK_EINT1 */
5061  #define ARIZONA_ASRC2_LOCK_EINT1_WIDTH                1  /* ASRC2_LOCK_EINT1 */
5062  #define ARIZONA_ASRC1_LOCK_EINT1                 0x0080  /* ASRC1_LOCK_EINT1 */
5063  #define ARIZONA_ASRC1_LOCK_EINT1_MASK            0x0080  /* ASRC1_LOCK_EINT1 */
5064  #define ARIZONA_ASRC1_LOCK_EINT1_SHIFT                7  /* ASRC1_LOCK_EINT1 */
5065  #define ARIZONA_ASRC1_LOCK_EINT1_WIDTH                1  /* ASRC1_LOCK_EINT1 */
5066  #define ARIZONA_UNDERCLOCKED_EINT1               0x0040  /* UNDERCLOCKED_EINT1 */
5067  #define ARIZONA_UNDERCLOCKED_EINT1_MASK          0x0040  /* UNDERCLOCKED_EINT1 */
5068  #define ARIZONA_UNDERCLOCKED_EINT1_SHIFT              6  /* UNDERCLOCKED_EINT1 */
5069  #define ARIZONA_UNDERCLOCKED_EINT1_WIDTH              1  /* UNDERCLOCKED_EINT1 */
5070  #define ARIZONA_OVERCLOCKED_EINT1                0x0020  /* OVERCLOCKED_EINT1 */
5071  #define ARIZONA_OVERCLOCKED_EINT1_MASK           0x0020  /* OVERCLOCKED_EINT1 */
5072  #define ARIZONA_OVERCLOCKED_EINT1_SHIFT               5  /* OVERCLOCKED_EINT1 */
5073  #define ARIZONA_OVERCLOCKED_EINT1_WIDTH               1  /* OVERCLOCKED_EINT1 */
5074  #define ARIZONA_FLL2_LOCK_EINT1                  0x0008  /* FLL2_LOCK_EINT1 */
5075  #define ARIZONA_FLL2_LOCK_EINT1_MASK             0x0008  /* FLL2_LOCK_EINT1 */
5076  #define ARIZONA_FLL2_LOCK_EINT1_SHIFT                 3  /* FLL2_LOCK_EINT1 */
5077  #define ARIZONA_FLL2_LOCK_EINT1_WIDTH                 1  /* FLL2_LOCK_EINT1 */
5078  #define ARIZONA_FLL1_LOCK_EINT1                  0x0004  /* FLL1_LOCK_EINT1 */
5079  #define ARIZONA_FLL1_LOCK_EINT1_MASK             0x0004  /* FLL1_LOCK_EINT1 */
5080  #define ARIZONA_FLL1_LOCK_EINT1_SHIFT                 2  /* FLL1_LOCK_EINT1 */
5081  #define ARIZONA_FLL1_LOCK_EINT1_WIDTH                 1  /* FLL1_LOCK_EINT1 */
5082  #define ARIZONA_CLKGEN_ERR_EINT1                 0x0002  /* CLKGEN_ERR_EINT1 */
5083  #define ARIZONA_CLKGEN_ERR_EINT1_MASK            0x0002  /* CLKGEN_ERR_EINT1 */
5084  #define ARIZONA_CLKGEN_ERR_EINT1_SHIFT                1  /* CLKGEN_ERR_EINT1 */
5085  #define ARIZONA_CLKGEN_ERR_EINT1_WIDTH                1  /* CLKGEN_ERR_EINT1 */
5086  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1           0x0001  /* CLKGEN_ERR_ASYNC_EINT1 */
5087  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK      0x0001  /* CLKGEN_ERR_ASYNC_EINT1 */
5088  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT          0  /* CLKGEN_ERR_ASYNC_EINT1 */
5089  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_WIDTH          1  /* CLKGEN_ERR_ASYNC_EINT1 */
5090  
5091  /*
5092   * R3331 (0xD03) - Interrupt Status 4
5093   */
5094  #define ARIZONA_ASRC_CFG_ERR_EINT1               0x8000  /* ASRC_CFG_ERR_EINT1 */
5095  #define ARIZONA_ASRC_CFG_ERR_EINT1_MASK          0x8000  /* ASRC_CFG_ERR_EINT1 */
5096  #define ARIZONA_ASRC_CFG_ERR_EINT1_SHIFT             15  /* ASRC_CFG_ERR_EINT1 */
5097  #define ARIZONA_ASRC_CFG_ERR_EINT1_WIDTH              1  /* ASRC_CFG_ERR_EINT1 */
5098  #define ARIZONA_AIF3_ERR_EINT1                   0x4000  /* AIF3_ERR_EINT1 */
5099  #define ARIZONA_AIF3_ERR_EINT1_MASK              0x4000  /* AIF3_ERR_EINT1 */
5100  #define ARIZONA_AIF3_ERR_EINT1_SHIFT                 14  /* AIF3_ERR_EINT1 */
5101  #define ARIZONA_AIF3_ERR_EINT1_WIDTH                  1  /* AIF3_ERR_EINT1 */
5102  #define ARIZONA_AIF2_ERR_EINT1                   0x2000  /* AIF2_ERR_EINT1 */
5103  #define ARIZONA_AIF2_ERR_EINT1_MASK              0x2000  /* AIF2_ERR_EINT1 */
5104  #define ARIZONA_AIF2_ERR_EINT1_SHIFT                 13  /* AIF2_ERR_EINT1 */
5105  #define ARIZONA_AIF2_ERR_EINT1_WIDTH                  1  /* AIF2_ERR_EINT1 */
5106  #define ARIZONA_AIF1_ERR_EINT1                   0x1000  /* AIF1_ERR_EINT1 */
5107  #define ARIZONA_AIF1_ERR_EINT1_MASK              0x1000  /* AIF1_ERR_EINT1 */
5108  #define ARIZONA_AIF1_ERR_EINT1_SHIFT                 12  /* AIF1_ERR_EINT1 */
5109  #define ARIZONA_AIF1_ERR_EINT1_WIDTH                  1  /* AIF1_ERR_EINT1 */
5110  #define ARIZONA_CTRLIF_ERR_EINT1                 0x0800  /* CTRLIF_ERR_EINT1 */
5111  #define ARIZONA_CTRLIF_ERR_EINT1_MASK            0x0800  /* CTRLIF_ERR_EINT1 */
5112  #define ARIZONA_CTRLIF_ERR_EINT1_SHIFT               11  /* CTRLIF_ERR_EINT1 */
5113  #define ARIZONA_CTRLIF_ERR_EINT1_WIDTH                1  /* CTRLIF_ERR_EINT1 */
5114  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1       0x0400  /* MIXER_DROPPED_SAMPLE_EINT1 */
5115  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK  0x0400  /* MIXER_DROPPED_SAMPLE_EINT1 */
5116  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_SHIFT     10  /* MIXER_DROPPED_SAMPLE_EINT1 */
5117  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_WIDTH      1  /* MIXER_DROPPED_SAMPLE_EINT1 */
5118  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1          0x0200  /* ASYNC_CLK_ENA_LOW_EINT1 */
5119  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK     0x0200  /* ASYNC_CLK_ENA_LOW_EINT1 */
5120  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_SHIFT         9  /* ASYNC_CLK_ENA_LOW_EINT1 */
5121  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_WIDTH         1  /* ASYNC_CLK_ENA_LOW_EINT1 */
5122  #define ARIZONA_SYSCLK_ENA_LOW_EINT1             0x0100  /* SYSCLK_ENA_LOW_EINT1 */
5123  #define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK        0x0100  /* SYSCLK_ENA_LOW_EINT1 */
5124  #define ARIZONA_SYSCLK_ENA_LOW_EINT1_SHIFT            8  /* SYSCLK_ENA_LOW_EINT1 */
5125  #define ARIZONA_SYSCLK_ENA_LOW_EINT1_WIDTH            1  /* SYSCLK_ENA_LOW_EINT1 */
5126  #define ARIZONA_ISRC1_CFG_ERR_EINT1              0x0080  /* ISRC1_CFG_ERR_EINT1 */
5127  #define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK         0x0080  /* ISRC1_CFG_ERR_EINT1 */
5128  #define ARIZONA_ISRC1_CFG_ERR_EINT1_SHIFT             7  /* ISRC1_CFG_ERR_EINT1 */
5129  #define ARIZONA_ISRC1_CFG_ERR_EINT1_WIDTH             1  /* ISRC1_CFG_ERR_EINT1 */
5130  #define ARIZONA_ISRC2_CFG_ERR_EINT1              0x0040  /* ISRC2_CFG_ERR_EINT1 */
5131  #define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK         0x0040  /* ISRC2_CFG_ERR_EINT1 */
5132  #define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT             6  /* ISRC2_CFG_ERR_EINT1 */
5133  #define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH             1  /* ISRC2_CFG_ERR_EINT1 */
5134  #define ARIZONA_HP3R_DONE_EINT1                  0x0020  /* HP3R_DONE_EINT1 */
5135  #define ARIZONA_HP3R_DONE_EINT1_MASK             0x0020  /* HP3R_DONE_EINT1 */
5136  #define ARIZONA_HP3R_DONE_EINT1_SHIFT                 5  /* HP3R_DONE_EINT1 */
5137  #define ARIZONA_HP3R_DONE_EINT1_WIDTH                 1  /* HP3R_DONE_EINT1 */
5138  #define ARIZONA_HP3L_DONE_EINT1                  0x0010  /* HP3L_DONE_EINT1 */
5139  #define ARIZONA_HP3L_DONE_EINT1_MASK             0x0010  /* HP3L_DONE_EINT1 */
5140  #define ARIZONA_HP3L_DONE_EINT1_SHIFT                 4  /* HP3L_DONE_EINT1 */
5141  #define ARIZONA_HP3L_DONE_EINT1_WIDTH                 1  /* HP3L_DONE_EINT1 */
5142  #define ARIZONA_HP2R_DONE_EINT1                  0x0008  /* HP2R_DONE_EINT1 */
5143  #define ARIZONA_HP2R_DONE_EINT1_MASK             0x0008  /* HP2R_DONE_EINT1 */
5144  #define ARIZONA_HP2R_DONE_EINT1_SHIFT                 3  /* HP2R_DONE_EINT1 */
5145  #define ARIZONA_HP2R_DONE_EINT1_WIDTH                 1  /* HP2R_DONE_EINT1 */
5146  #define ARIZONA_HP2L_DONE_EINT1                  0x0004  /* HP2L_DONE_EINT1 */
5147  #define ARIZONA_HP2L_DONE_EINT1_MASK             0x0004  /* HP2L_DONE_EINT1 */
5148  #define ARIZONA_HP2L_DONE_EINT1_SHIFT                 2  /* HP2L_DONE_EINT1 */
5149  #define ARIZONA_HP2L_DONE_EINT1_WIDTH                 1  /* HP2L_DONE_EINT1 */
5150  #define ARIZONA_HP1R_DONE_EINT1                  0x0002  /* HP1R_DONE_EINT1 */
5151  #define ARIZONA_HP1R_DONE_EINT1_MASK             0x0002  /* HP1R_DONE_EINT1 */
5152  #define ARIZONA_HP1R_DONE_EINT1_SHIFT                 1  /* HP1R_DONE_EINT1 */
5153  #define ARIZONA_HP1R_DONE_EINT1_WIDTH                 1  /* HP1R_DONE_EINT1 */
5154  #define ARIZONA_HP1L_DONE_EINT1                  0x0001  /* HP1L_DONE_EINT1 */
5155  #define ARIZONA_HP1L_DONE_EINT1_MASK             0x0001  /* HP1L_DONE_EINT1 */
5156  #define ARIZONA_HP1L_DONE_EINT1_SHIFT                 0  /* HP1L_DONE_EINT1 */
5157  #define ARIZONA_HP1L_DONE_EINT1_WIDTH                 1  /* HP1L_DONE_EINT1 */
5158  
5159  /*
5160   * R3331 (0xD03) - Interrupt Status 4 (Alternate layout)
5161   *
5162   * Alternate layout used on later devices, note only fields that have moved
5163   * are specified
5164   */
5165  #define ARIZONA_V2_AIF3_ERR_EINT1                  0x8000  /* AIF3_ERR_EINT1 */
5166  #define ARIZONA_V2_AIF3_ERR_EINT1_MASK             0x8000  /* AIF3_ERR_EINT1 */
5167  #define ARIZONA_V2_AIF3_ERR_EINT1_SHIFT                15  /* AIF3_ERR_EINT1 */
5168  #define ARIZONA_V2_AIF3_ERR_EINT1_WIDTH                 1  /* AIF3_ERR_EINT1 */
5169  #define ARIZONA_V2_AIF2_ERR_EINT1                  0x4000  /* AIF2_ERR_EINT1 */
5170  #define ARIZONA_V2_AIF2_ERR_EINT1_MASK             0x4000  /* AIF2_ERR_EINT1 */
5171  #define ARIZONA_V2_AIF2_ERR_EINT1_SHIFT                14  /* AIF2_ERR_EINT1 */
5172  #define ARIZONA_V2_AIF2_ERR_EINT1_WIDTH                 1  /* AIF2_ERR_EINT1 */
5173  #define ARIZONA_V2_AIF1_ERR_EINT1                  0x2000  /* AIF1_ERR_EINT1 */
5174  #define ARIZONA_V2_AIF1_ERR_EINT1_MASK             0x2000  /* AIF1_ERR_EINT1 */
5175  #define ARIZONA_V2_AIF1_ERR_EINT1_SHIFT                13  /* AIF1_ERR_EINT1 */
5176  #define ARIZONA_V2_AIF1_ERR_EINT1_WIDTH                 1  /* AIF1_ERR_EINT1 */
5177  #define ARIZONA_V2_CTRLIF_ERR_EINT1                0x1000  /* CTRLIF_ERR_EINT1 */
5178  #define ARIZONA_V2_CTRLIF_ERR_EINT1_MASK           0x1000  /* CTRLIF_ERR_EINT1 */
5179  #define ARIZONA_V2_CTRLIF_ERR_EINT1_SHIFT              12  /* CTRLIF_ERR_EINT1 */
5180  #define ARIZONA_V2_CTRLIF_ERR_EINT1_WIDTH               1  /* CTRLIF_ERR_EINT1 */
5181  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1      0x0800  /* MIXER_DROPPED_SAMPLE_EINT1 */
5182  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800  /* MIXER_DROPPED_SAMPLE_EINT1 */
5183  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_SHIFT    11  /* MIXER_DROPPED_SAMPLE_EINT1 */
5184  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_WIDTH     1  /* MIXER_DROPPED_SAMPLE_EINT1 */
5185  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1         0x0400  /* ASYNC_CLK_ENA_LOW_EINT1 */
5186  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_MASK    0x0400  /* ASYNC_CLK_ENA_LOW_EINT1 */
5187  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_SHIFT       10  /* ASYNC_CLK_ENA_LOW_EINT1 */
5188  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_WIDTH        1  /* ASYNC_CLK_ENA_LOW_EINT1 */
5189  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1            0x0200  /* SYSCLK_ENA_LOW_EINT1 */
5190  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_MASK       0x0200  /* SYSCLK_ENA_LOW_EINT1 */
5191  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_SHIFT           9  /* SYSCLK_ENA_LOW_EINT1 */
5192  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_WIDTH           1  /* SYSCLK_ENA_LOW_EINT1 */
5193  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1             0x0100  /* ISRC1_CFG_ERR_EINT1 */
5194  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_MASK        0x0100  /* ISRC1_CFG_ERR_EINT1 */
5195  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_SHIFT            8  /* ISRC1_CFG_ERR_EINT1 */
5196  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_WIDTH            1  /* ISRC1_CFG_ERR_EINT1 */
5197  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1             0x0080  /* ISRC2_CFG_ERR_EINT1 */
5198  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_MASK        0x0080  /* ISRC2_CFG_ERR_EINT1 */
5199  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_SHIFT            7  /* ISRC2_CFG_ERR_EINT1 */
5200  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_WIDTH            1  /* ISRC2_CFG_ERR_EINT1 */
5201  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1             0x0040  /* ISRC3_CFG_ERR_EINT1 */
5202  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_MASK        0x0040  /* ISRC3_CFG_ERR_EINT1 */
5203  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_SHIFT            6  /* ISRC3_CFG_ERR_EINT1 */
5204  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_WIDTH            1  /* ISRC3_CFG_ERR_EINT1 */
5205  
5206  /*
5207   * R3332 (0xD04) - Interrupt Status 5
5208   */
5209  #define ARIZONA_BOOT_DONE_EINT1                  0x0100  /* BOOT_DONE_EINT1 */
5210  #define ARIZONA_BOOT_DONE_EINT1_MASK             0x0100  /* BOOT_DONE_EINT1 */
5211  #define ARIZONA_BOOT_DONE_EINT1_SHIFT                 8  /* BOOT_DONE_EINT1 */
5212  #define ARIZONA_BOOT_DONE_EINT1_WIDTH                 1  /* BOOT_DONE_EINT1 */
5213  #define ARIZONA_DCS_DAC_DONE_EINT1               0x0080  /* DCS_DAC_DONE_EINT1 */
5214  #define ARIZONA_DCS_DAC_DONE_EINT1_MASK          0x0080  /* DCS_DAC_DONE_EINT1 */
5215  #define ARIZONA_DCS_DAC_DONE_EINT1_SHIFT              7  /* DCS_DAC_DONE_EINT1 */
5216  #define ARIZONA_DCS_DAC_DONE_EINT1_WIDTH              1  /* DCS_DAC_DONE_EINT1 */
5217  #define ARIZONA_DCS_HP_DONE_EINT1                0x0040  /* DCS_HP_DONE_EINT1 */
5218  #define ARIZONA_DCS_HP_DONE_EINT1_MASK           0x0040  /* DCS_HP_DONE_EINT1 */
5219  #define ARIZONA_DCS_HP_DONE_EINT1_SHIFT               6  /* DCS_HP_DONE_EINT1 */
5220  #define ARIZONA_DCS_HP_DONE_EINT1_WIDTH               1  /* DCS_HP_DONE_EINT1 */
5221  #define ARIZONA_FLL2_CLOCK_OK_EINT1              0x0002  /* FLL2_CLOCK_OK_EINT1 */
5222  #define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK         0x0002  /* FLL2_CLOCK_OK_EINT1 */
5223  #define ARIZONA_FLL2_CLOCK_OK_EINT1_SHIFT             1  /* FLL2_CLOCK_OK_EINT1 */
5224  #define ARIZONA_FLL2_CLOCK_OK_EINT1_WIDTH             1  /* FLL2_CLOCK_OK_EINT1 */
5225  #define ARIZONA_FLL1_CLOCK_OK_EINT1              0x0001  /* FLL1_CLOCK_OK_EINT1 */
5226  #define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK         0x0001  /* FLL1_CLOCK_OK_EINT1 */
5227  #define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT             0  /* FLL1_CLOCK_OK_EINT1 */
5228  #define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH             1  /* FLL1_CLOCK_OK_EINT1 */
5229  
5230  /*
5231   * R3332 (0xD05) - Interrupt Status 5 (Alternate layout)
5232   *
5233   * Alternate layout used on later devices, note only fields that have moved
5234   * are specified
5235   */
5236  #define ARIZONA_V2_ASRC_CFG_ERR_EINT1            0x0008  /* ASRC_CFG_ERR_EINT1 */
5237  #define ARIZONA_V2_ASRC_CFG_ERR_EINT1_MASK       0x0008  /* ASRC_CFG_ERR_EINT1 */
5238  #define ARIZONA_V2_ASRC_CFG_ERR_EINT1_SHIFT           3  /* ASRC_CFG_ERR_EINT1 */
5239  #define ARIZONA_V2_ASRC_CFG_ERR_EINT1_WIDTH           1  /* ASRC_CFG_ERR_EINT1 */
5240  
5241  /*
5242   * R3333 (0xD05) - Interrupt Status 6
5243   */
5244  #define ARIZONA_DSP_SHARED_WR_COLL_EINT1         0x8000  /* DSP_SHARED_WR_COLL_EINT1 */
5245  #define ARIZONA_DSP_SHARED_WR_COLL_EINT1_MASK    0x8000  /* DSP_SHARED_WR_COLL_EINT1 */
5246  #define ARIZONA_DSP_SHARED_WR_COLL_EINT1_SHIFT       15  /* DSP_SHARED_WR_COLL_EINT1 */
5247  #define ARIZONA_DSP_SHARED_WR_COLL_EINT1_WIDTH        1  /* DSP_SHARED_WR_COLL_EINT1 */
5248  #define ARIZONA_SPK_SHUTDOWN_EINT1               0x4000  /* SPK_SHUTDOWN_EINT1 */
5249  #define ARIZONA_SPK_SHUTDOWN_EINT1_MASK          0x4000  /* SPK_SHUTDOWN_EINT1 */
5250  #define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT             14  /* SPK_SHUTDOWN_EINT1 */
5251  #define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH              1  /* SPK_SHUTDOWN_EINT1 */
5252  #define ARIZONA_SPK1R_SHORT_EINT1                0x2000  /* SPK1R_SHORT_EINT1 */
5253  #define ARIZONA_SPK1R_SHORT_EINT1_MASK           0x2000  /* SPK1R_SHORT_EINT1 */
5254  #define ARIZONA_SPK1R_SHORT_EINT1_SHIFT              13  /* SPK1R_SHORT_EINT1 */
5255  #define ARIZONA_SPK1R_SHORT_EINT1_WIDTH               1  /* SPK1R_SHORT_EINT1 */
5256  #define ARIZONA_SPK1L_SHORT_EINT1                0x1000  /* SPK1L_SHORT_EINT1 */
5257  #define ARIZONA_SPK1L_SHORT_EINT1_MASK           0x1000  /* SPK1L_SHORT_EINT1 */
5258  #define ARIZONA_SPK1L_SHORT_EINT1_SHIFT              12  /* SPK1L_SHORT_EINT1 */
5259  #define ARIZONA_SPK1L_SHORT_EINT1_WIDTH               1  /* SPK1L_SHORT_EINT1 */
5260  #define ARIZONA_HP3R_SC_NEG_EINT1                0x0800  /* HP3R_SC_NEG_EINT1 */
5261  #define ARIZONA_HP3R_SC_NEG_EINT1_MASK           0x0800  /* HP3R_SC_NEG_EINT1 */
5262  #define ARIZONA_HP3R_SC_NEG_EINT1_SHIFT              11  /* HP3R_SC_NEG_EINT1 */
5263  #define ARIZONA_HP3R_SC_NEG_EINT1_WIDTH               1  /* HP3R_SC_NEG_EINT1 */
5264  #define ARIZONA_HP3R_SC_POS_EINT1                0x0400  /* HP3R_SC_POS_EINT1 */
5265  #define ARIZONA_HP3R_SC_POS_EINT1_MASK           0x0400  /* HP3R_SC_POS_EINT1 */
5266  #define ARIZONA_HP3R_SC_POS_EINT1_SHIFT              10  /* HP3R_SC_POS_EINT1 */
5267  #define ARIZONA_HP3R_SC_POS_EINT1_WIDTH               1  /* HP3R_SC_POS_EINT1 */
5268  #define ARIZONA_HP3L_SC_NEG_EINT1                0x0200  /* HP3L_SC_NEG_EINT1 */
5269  #define ARIZONA_HP3L_SC_NEG_EINT1_MASK           0x0200  /* HP3L_SC_NEG_EINT1 */
5270  #define ARIZONA_HP3L_SC_NEG_EINT1_SHIFT               9  /* HP3L_SC_NEG_EINT1 */
5271  #define ARIZONA_HP3L_SC_NEG_EINT1_WIDTH               1  /* HP3L_SC_NEG_EINT1 */
5272  #define ARIZONA_HP3L_SC_POS_EINT1                0x0100  /* HP3L_SC_POS_EINT1 */
5273  #define ARIZONA_HP3L_SC_POS_EINT1_MASK           0x0100  /* HP3L_SC_POS_EINT1 */
5274  #define ARIZONA_HP3L_SC_POS_EINT1_SHIFT               8  /* HP3L_SC_POS_EINT1 */
5275  #define ARIZONA_HP3L_SC_POS_EINT1_WIDTH               1  /* HP3L_SC_POS_EINT1 */
5276  #define ARIZONA_HP2R_SC_NEG_EINT1                0x0080  /* HP2R_SC_NEG_EINT1 */
5277  #define ARIZONA_HP2R_SC_NEG_EINT1_MASK           0x0080  /* HP2R_SC_NEG_EINT1 */
5278  #define ARIZONA_HP2R_SC_NEG_EINT1_SHIFT               7  /* HP2R_SC_NEG_EINT1 */
5279  #define ARIZONA_HP2R_SC_NEG_EINT1_WIDTH               1  /* HP2R_SC_NEG_EINT1 */
5280  #define ARIZONA_HP2R_SC_POS_EINT1                0x0040  /* HP2R_SC_POS_EINT1 */
5281  #define ARIZONA_HP2R_SC_POS_EINT1_MASK           0x0040  /* HP2R_SC_POS_EINT1 */
5282  #define ARIZONA_HP2R_SC_POS_EINT1_SHIFT               6  /* HP2R_SC_POS_EINT1 */
5283  #define ARIZONA_HP2R_SC_POS_EINT1_WIDTH               1  /* HP2R_SC_POS_EINT1 */
5284  #define ARIZONA_HP2L_SC_NEG_EINT1                0x0020  /* HP2L_SC_NEG_EINT1 */
5285  #define ARIZONA_HP2L_SC_NEG_EINT1_MASK           0x0020  /* HP2L_SC_NEG_EINT1 */
5286  #define ARIZONA_HP2L_SC_NEG_EINT1_SHIFT               5  /* HP2L_SC_NEG_EINT1 */
5287  #define ARIZONA_HP2L_SC_NEG_EINT1_WIDTH               1  /* HP2L_SC_NEG_EINT1 */
5288  #define ARIZONA_HP2L_SC_POS_EINT1                0x0010  /* HP2L_SC_POS_EINT1 */
5289  #define ARIZONA_HP2L_SC_POS_EINT1_MASK           0x0010  /* HP2L_SC_POS_EINT1 */
5290  #define ARIZONA_HP2L_SC_POS_EINT1_SHIFT               4  /* HP2L_SC_POS_EINT1 */
5291  #define ARIZONA_HP2L_SC_POS_EINT1_WIDTH               1  /* HP2L_SC_POS_EINT1 */
5292  #define ARIZONA_HP1R_SC_NEG_EINT1                0x0008  /* HP1R_SC_NEG_EINT1 */
5293  #define ARIZONA_HP1R_SC_NEG_EINT1_MASK           0x0008  /* HP1R_SC_NEG_EINT1 */
5294  #define ARIZONA_HP1R_SC_NEG_EINT1_SHIFT               3  /* HP1R_SC_NEG_EINT1 */
5295  #define ARIZONA_HP1R_SC_NEG_EINT1_WIDTH               1  /* HP1R_SC_NEG_EINT1 */
5296  #define ARIZONA_HP1R_SC_POS_EINT1                0x0004  /* HP1R_SC_POS_EINT1 */
5297  #define ARIZONA_HP1R_SC_POS_EINT1_MASK           0x0004  /* HP1R_SC_POS_EINT1 */
5298  #define ARIZONA_HP1R_SC_POS_EINT1_SHIFT               2  /* HP1R_SC_POS_EINT1 */
5299  #define ARIZONA_HP1R_SC_POS_EINT1_WIDTH               1  /* HP1R_SC_POS_EINT1 */
5300  #define ARIZONA_HP1L_SC_NEG_EINT1                0x0002  /* HP1L_SC_NEG_EINT1 */
5301  #define ARIZONA_HP1L_SC_NEG_EINT1_MASK           0x0002  /* HP1L_SC_NEG_EINT1 */
5302  #define ARIZONA_HP1L_SC_NEG_EINT1_SHIFT               1  /* HP1L_SC_NEG_EINT1 */
5303  #define ARIZONA_HP1L_SC_NEG_EINT1_WIDTH               1  /* HP1L_SC_NEG_EINT1 */
5304  #define ARIZONA_HP1L_SC_POS_EINT1                0x0001  /* HP1L_SC_POS_EINT1 */
5305  #define ARIZONA_HP1L_SC_POS_EINT1_MASK           0x0001  /* HP1L_SC_POS_EINT1 */
5306  #define ARIZONA_HP1L_SC_POS_EINT1_SHIFT               0  /* HP1L_SC_POS_EINT1 */
5307  #define ARIZONA_HP1L_SC_POS_EINT1_WIDTH               1  /* HP1L_SC_POS_EINT1 */
5308  
5309  /*
5310   * R3336 (0xD08) - Interrupt Status 1 Mask
5311   */
5312  #define ARIZONA_IM_GP4_EINT1                     0x0008  /* IM_GP4_EINT1 */
5313  #define ARIZONA_IM_GP4_EINT1_MASK                0x0008  /* IM_GP4_EINT1 */
5314  #define ARIZONA_IM_GP4_EINT1_SHIFT                    3  /* IM_GP4_EINT1 */
5315  #define ARIZONA_IM_GP4_EINT1_WIDTH                    1  /* IM_GP4_EINT1 */
5316  #define ARIZONA_IM_GP3_EINT1                     0x0004  /* IM_GP3_EINT1 */
5317  #define ARIZONA_IM_GP3_EINT1_MASK                0x0004  /* IM_GP3_EINT1 */
5318  #define ARIZONA_IM_GP3_EINT1_SHIFT                    2  /* IM_GP3_EINT1 */
5319  #define ARIZONA_IM_GP3_EINT1_WIDTH                    1  /* IM_GP3_EINT1 */
5320  #define ARIZONA_IM_GP2_EINT1                     0x0002  /* IM_GP2_EINT1 */
5321  #define ARIZONA_IM_GP2_EINT1_MASK                0x0002  /* IM_GP2_EINT1 */
5322  #define ARIZONA_IM_GP2_EINT1_SHIFT                    1  /* IM_GP2_EINT1 */
5323  #define ARIZONA_IM_GP2_EINT1_WIDTH                    1  /* IM_GP2_EINT1 */
5324  #define ARIZONA_IM_GP1_EINT1                     0x0001  /* IM_GP1_EINT1 */
5325  #define ARIZONA_IM_GP1_EINT1_MASK                0x0001  /* IM_GP1_EINT1 */
5326  #define ARIZONA_IM_GP1_EINT1_SHIFT                    0  /* IM_GP1_EINT1 */
5327  #define ARIZONA_IM_GP1_EINT1_WIDTH                    1  /* IM_GP1_EINT1 */
5328  
5329  /*
5330   * R3337 (0xD09) - Interrupt Status 2 Mask
5331   */
5332  #define ARIZONA_IM_DSP1_RAM_RDY_EINT1            0x0100  /* IM_DSP1_RAM_RDY_EINT1 */
5333  #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK       0x0100  /* IM_DSP1_RAM_RDY_EINT1 */
5334  #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_SHIFT           8  /* IM_DSP1_RAM_RDY_EINT1 */
5335  #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_WIDTH           1  /* IM_DSP1_RAM_RDY_EINT1 */
5336  #define ARIZONA_IM_DSP_IRQ2_EINT1                0x0002  /* IM_DSP_IRQ2_EINT1 */
5337  #define ARIZONA_IM_DSP_IRQ2_EINT1_MASK           0x0002  /* IM_DSP_IRQ2_EINT1 */
5338  #define ARIZONA_IM_DSP_IRQ2_EINT1_SHIFT               1  /* IM_DSP_IRQ2_EINT1 */
5339  #define ARIZONA_IM_DSP_IRQ2_EINT1_WIDTH               1  /* IM_DSP_IRQ2_EINT1 */
5340  #define ARIZONA_IM_DSP_IRQ1_EINT1                0x0001  /* IM_DSP_IRQ1_EINT1 */
5341  #define ARIZONA_IM_DSP_IRQ1_EINT1_MASK           0x0001  /* IM_DSP_IRQ1_EINT1 */
5342  #define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT               0  /* IM_DSP_IRQ1_EINT1 */
5343  #define ARIZONA_IM_DSP_IRQ1_EINT1_WIDTH               1  /* IM_DSP_IRQ1_EINT1 */
5344  
5345  /*
5346   * R3338 (0xD0A) - Interrupt Status 3 Mask
5347   */
5348  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1       0x8000  /* IM_SPK_OVERHEAT_WARN_EINT1 */
5349  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_MASK  0x8000  /* IM_SPK_OVERHEAT_WARN_EINT1 */
5350  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT     15  /* IM_SPK_OVERHEAT_WARN_EINT1 */
5351  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH      1  /* IM_SPK_OVERHEAT_WARN_EINT1 */
5352  #define ARIZONA_IM_SPK_OVERHEAT_EINT1            0x4000  /* IM_SPK_OVERHEAT_EINT1 */
5353  #define ARIZONA_IM_SPK_OVERHEAT_EINT1_MASK       0x4000  /* IM_SPK_OVERHEAT_EINT1 */
5354  #define ARIZONA_IM_SPK_OVERHEAT_EINT1_SHIFT          14  /* IM_SPK_OVERHEAT_EINT1 */
5355  #define ARIZONA_IM_SPK_OVERHEAT_EINT1_WIDTH           1  /* IM_SPK_OVERHEAT_EINT1 */
5356  #define ARIZONA_IM_HPDET_EINT1                   0x2000  /* IM_HPDET_EINT1 */
5357  #define ARIZONA_IM_HPDET_EINT1_MASK              0x2000  /* IM_HPDET_EINT1 */
5358  #define ARIZONA_IM_HPDET_EINT1_SHIFT                 13  /* IM_HPDET_EINT1 */
5359  #define ARIZONA_IM_HPDET_EINT1_WIDTH                  1  /* IM_HPDET_EINT1 */
5360  #define ARIZONA_IM_MICDET_EINT1                  0x1000  /* IM_MICDET_EINT1 */
5361  #define ARIZONA_IM_MICDET_EINT1_MASK             0x1000  /* IM_MICDET_EINT1 */
5362  #define ARIZONA_IM_MICDET_EINT1_SHIFT                12  /* IM_MICDET_EINT1 */
5363  #define ARIZONA_IM_MICDET_EINT1_WIDTH                 1  /* IM_MICDET_EINT1 */
5364  #define ARIZONA_IM_WSEQ_DONE_EINT1               0x0800  /* IM_WSEQ_DONE_EINT1 */
5365  #define ARIZONA_IM_WSEQ_DONE_EINT1_MASK          0x0800  /* IM_WSEQ_DONE_EINT1 */
5366  #define ARIZONA_IM_WSEQ_DONE_EINT1_SHIFT             11  /* IM_WSEQ_DONE_EINT1 */
5367  #define ARIZONA_IM_WSEQ_DONE_EINT1_WIDTH              1  /* IM_WSEQ_DONE_EINT1 */
5368  #define ARIZONA_IM_DRC2_SIG_DET_EINT1            0x0400  /* IM_DRC2_SIG_DET_EINT1 */
5369  #define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK       0x0400  /* IM_DRC2_SIG_DET_EINT1 */
5370  #define ARIZONA_IM_DRC2_SIG_DET_EINT1_SHIFT          10  /* IM_DRC2_SIG_DET_EINT1 */
5371  #define ARIZONA_IM_DRC2_SIG_DET_EINT1_WIDTH           1  /* IM_DRC2_SIG_DET_EINT1 */
5372  #define ARIZONA_IM_DRC1_SIG_DET_EINT1            0x0200  /* IM_DRC1_SIG_DET_EINT1 */
5373  #define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK       0x0200  /* IM_DRC1_SIG_DET_EINT1 */
5374  #define ARIZONA_IM_DRC1_SIG_DET_EINT1_SHIFT           9  /* IM_DRC1_SIG_DET_EINT1 */
5375  #define ARIZONA_IM_DRC1_SIG_DET_EINT1_WIDTH           1  /* IM_DRC1_SIG_DET_EINT1 */
5376  #define ARIZONA_IM_ASRC2_LOCK_EINT1              0x0100  /* IM_ASRC2_LOCK_EINT1 */
5377  #define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK         0x0100  /* IM_ASRC2_LOCK_EINT1 */
5378  #define ARIZONA_IM_ASRC2_LOCK_EINT1_SHIFT             8  /* IM_ASRC2_LOCK_EINT1 */
5379  #define ARIZONA_IM_ASRC2_LOCK_EINT1_WIDTH             1  /* IM_ASRC2_LOCK_EINT1 */
5380  #define ARIZONA_IM_ASRC1_LOCK_EINT1              0x0080  /* IM_ASRC1_LOCK_EINT1 */
5381  #define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK         0x0080  /* IM_ASRC1_LOCK_EINT1 */
5382  #define ARIZONA_IM_ASRC1_LOCK_EINT1_SHIFT             7  /* IM_ASRC1_LOCK_EINT1 */
5383  #define ARIZONA_IM_ASRC1_LOCK_EINT1_WIDTH             1  /* IM_ASRC1_LOCK_EINT1 */
5384  #define ARIZONA_IM_UNDERCLOCKED_EINT1            0x0040  /* IM_UNDERCLOCKED_EINT1 */
5385  #define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK       0x0040  /* IM_UNDERCLOCKED_EINT1 */
5386  #define ARIZONA_IM_UNDERCLOCKED_EINT1_SHIFT           6  /* IM_UNDERCLOCKED_EINT1 */
5387  #define ARIZONA_IM_UNDERCLOCKED_EINT1_WIDTH           1  /* IM_UNDERCLOCKED_EINT1 */
5388  #define ARIZONA_IM_OVERCLOCKED_EINT1             0x0020  /* IM_OVERCLOCKED_EINT1 */
5389  #define ARIZONA_IM_OVERCLOCKED_EINT1_MASK        0x0020  /* IM_OVERCLOCKED_EINT1 */
5390  #define ARIZONA_IM_OVERCLOCKED_EINT1_SHIFT            5  /* IM_OVERCLOCKED_EINT1 */
5391  #define ARIZONA_IM_OVERCLOCKED_EINT1_WIDTH            1  /* IM_OVERCLOCKED_EINT1 */
5392  #define ARIZONA_IM_FLL2_LOCK_EINT1               0x0008  /* IM_FLL2_LOCK_EINT1 */
5393  #define ARIZONA_IM_FLL2_LOCK_EINT1_MASK          0x0008  /* IM_FLL2_LOCK_EINT1 */
5394  #define ARIZONA_IM_FLL2_LOCK_EINT1_SHIFT              3  /* IM_FLL2_LOCK_EINT1 */
5395  #define ARIZONA_IM_FLL2_LOCK_EINT1_WIDTH              1  /* IM_FLL2_LOCK_EINT1 */
5396  #define ARIZONA_IM_FLL1_LOCK_EINT1               0x0004  /* IM_FLL1_LOCK_EINT1 */
5397  #define ARIZONA_IM_FLL1_LOCK_EINT1_MASK          0x0004  /* IM_FLL1_LOCK_EINT1 */
5398  #define ARIZONA_IM_FLL1_LOCK_EINT1_SHIFT              2  /* IM_FLL1_LOCK_EINT1 */
5399  #define ARIZONA_IM_FLL1_LOCK_EINT1_WIDTH              1  /* IM_FLL1_LOCK_EINT1 */
5400  #define ARIZONA_IM_CLKGEN_ERR_EINT1              0x0002  /* IM_CLKGEN_ERR_EINT1 */
5401  #define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK         0x0002  /* IM_CLKGEN_ERR_EINT1 */
5402  #define ARIZONA_IM_CLKGEN_ERR_EINT1_SHIFT             1  /* IM_CLKGEN_ERR_EINT1 */
5403  #define ARIZONA_IM_CLKGEN_ERR_EINT1_WIDTH             1  /* IM_CLKGEN_ERR_EINT1 */
5404  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1        0x0001  /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5405  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK   0x0001  /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5406  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT       0  /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5407  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_WIDTH       1  /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5408  
5409  /*
5410   * R3339 (0xD0B) - Interrupt Status 4 Mask
5411   */
5412  #define ARIZONA_IM_ASRC_CFG_ERR_EINT1            0x8000  /* IM_ASRC_CFG_ERR_EINT1 */
5413  #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK       0x8000  /* IM_ASRC_CFG_ERR_EINT1 */
5414  #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT          15  /* IM_ASRC_CFG_ERR_EINT1 */
5415  #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH           1  /* IM_ASRC_CFG_ERR_EINT1 */
5416  #define ARIZONA_IM_AIF3_ERR_EINT1                0x4000  /* IM_AIF3_ERR_EINT1 */
5417  #define ARIZONA_IM_AIF3_ERR_EINT1_MASK           0x4000  /* IM_AIF3_ERR_EINT1 */
5418  #define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT              14  /* IM_AIF3_ERR_EINT1 */
5419  #define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH               1  /* IM_AIF3_ERR_EINT1 */
5420  #define ARIZONA_IM_AIF2_ERR_EINT1                0x2000  /* IM_AIF2_ERR_EINT1 */
5421  #define ARIZONA_IM_AIF2_ERR_EINT1_MASK           0x2000  /* IM_AIF2_ERR_EINT1 */
5422  #define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT              13  /* IM_AIF2_ERR_EINT1 */
5423  #define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH               1  /* IM_AIF2_ERR_EINT1 */
5424  #define ARIZONA_IM_AIF1_ERR_EINT1                0x1000  /* IM_AIF1_ERR_EINT1 */
5425  #define ARIZONA_IM_AIF1_ERR_EINT1_MASK           0x1000  /* IM_AIF1_ERR_EINT1 */
5426  #define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT              12  /* IM_AIF1_ERR_EINT1 */
5427  #define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH               1  /* IM_AIF1_ERR_EINT1 */
5428  #define ARIZONA_IM_CTRLIF_ERR_EINT1              0x0800  /* IM_CTRLIF_ERR_EINT1 */
5429  #define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK         0x0800  /* IM_CTRLIF_ERR_EINT1 */
5430  #define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT            11  /* IM_CTRLIF_ERR_EINT1 */
5431  #define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH             1  /* IM_CTRLIF_ERR_EINT1 */
5432  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1    0x0400  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5433  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5434  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT     10  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5435  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH      1  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5436  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1       0x0200  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5437  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK  0x0200  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5438  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT      9  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5439  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH      1  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5440  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1          0x0100  /* IM_SYSCLK_ENA_LOW_EINT1 */
5441  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK     0x0100  /* IM_SYSCLK_ENA_LOW_EINT1 */
5442  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT         8  /* IM_SYSCLK_ENA_LOW_EINT1 */
5443  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH         1  /* IM_SYSCLK_ENA_LOW_EINT1 */
5444  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1           0x0080  /* IM_ISRC1_CFG_ERR_EINT1 */
5445  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK      0x0080  /* IM_ISRC1_CFG_ERR_EINT1 */
5446  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT          7  /* IM_ISRC1_CFG_ERR_EINT1 */
5447  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH          1  /* IM_ISRC1_CFG_ERR_EINT1 */
5448  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1           0x0040  /* IM_ISRC2_CFG_ERR_EINT1 */
5449  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK      0x0040  /* IM_ISRC2_CFG_ERR_EINT1 */
5450  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT          6  /* IM_ISRC2_CFG_ERR_EINT1 */
5451  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH          1  /* IM_ISRC2_CFG_ERR_EINT1 */
5452  #define ARIZONA_IM_HP3R_DONE_EINT1               0x0020  /* IM_HP3R_DONE_EINT1 */
5453  #define ARIZONA_IM_HP3R_DONE_EINT1_MASK          0x0020  /* IM_HP3R_DONE_EINT1 */
5454  #define ARIZONA_IM_HP3R_DONE_EINT1_SHIFT              5  /* IM_HP3R_DONE_EINT1 */
5455  #define ARIZONA_IM_HP3R_DONE_EINT1_WIDTH              1  /* IM_HP3R_DONE_EINT1 */
5456  #define ARIZONA_IM_HP3L_DONE_EINT1               0x0010  /* IM_HP3L_DONE_EINT1 */
5457  #define ARIZONA_IM_HP3L_DONE_EINT1_MASK          0x0010  /* IM_HP3L_DONE_EINT1 */
5458  #define ARIZONA_IM_HP3L_DONE_EINT1_SHIFT              4  /* IM_HP3L_DONE_EINT1 */
5459  #define ARIZONA_IM_HP3L_DONE_EINT1_WIDTH              1  /* IM_HP3L_DONE_EINT1 */
5460  #define ARIZONA_IM_HP2R_DONE_EINT1               0x0008  /* IM_HP2R_DONE_EINT1 */
5461  #define ARIZONA_IM_HP2R_DONE_EINT1_MASK          0x0008  /* IM_HP2R_DONE_EINT1 */
5462  #define ARIZONA_IM_HP2R_DONE_EINT1_SHIFT              3  /* IM_HP2R_DONE_EINT1 */
5463  #define ARIZONA_IM_HP2R_DONE_EINT1_WIDTH              1  /* IM_HP2R_DONE_EINT1 */
5464  #define ARIZONA_IM_HP2L_DONE_EINT1               0x0004  /* IM_HP2L_DONE_EINT1 */
5465  #define ARIZONA_IM_HP2L_DONE_EINT1_MASK          0x0004  /* IM_HP2L_DONE_EINT1 */
5466  #define ARIZONA_IM_HP2L_DONE_EINT1_SHIFT              2  /* IM_HP2L_DONE_EINT1 */
5467  #define ARIZONA_IM_HP2L_DONE_EINT1_WIDTH              1  /* IM_HP2L_DONE_EINT1 */
5468  #define ARIZONA_IM_HP1R_DONE_EINT1               0x0002  /* IM_HP1R_DONE_EINT1 */
5469  #define ARIZONA_IM_HP1R_DONE_EINT1_MASK          0x0002  /* IM_HP1R_DONE_EINT1 */
5470  #define ARIZONA_IM_HP1R_DONE_EINT1_SHIFT              1  /* IM_HP1R_DONE_EINT1 */
5471  #define ARIZONA_IM_HP1R_DONE_EINT1_WIDTH              1  /* IM_HP1R_DONE_EINT1 */
5472  #define ARIZONA_IM_HP1L_DONE_EINT1               0x0001  /* IM_HP1L_DONE_EINT1 */
5473  #define ARIZONA_IM_HP1L_DONE_EINT1_MASK          0x0001  /* IM_HP1L_DONE_EINT1 */
5474  #define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT              0  /* IM_HP1L_DONE_EINT1 */
5475  #define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH              1  /* IM_HP1L_DONE_EINT1 */
5476  
5477  /*
5478   * R3339 (0xD0B) - Interrupt Status 4 Mask (Alternate layout)
5479   *
5480   * Alternate layout used on later devices, note only fields that have moved
5481   * are specified
5482   */
5483  #define ARIZONA_V2_IM_AIF3_ERR_EINT1                  0x8000  /* IM_AIF3_ERR_EINT1 */
5484  #define ARIZONA_V2_IM_AIF3_ERR_EINT1_MASK             0x8000  /* IM_AIF3_ERR_EINT1 */
5485  #define ARIZONA_V2_IM_AIF3_ERR_EINT1_SHIFT                15  /* IM_AIF3_ERR_EINT1 */
5486  #define ARIZONA_V2_IM_AIF3_ERR_EINT1_WIDTH                 1  /* IM_AIF3_ERR_EINT1 */
5487  #define ARIZONA_V2_IM_AIF2_ERR_EINT1                  0x4000  /* IM_AIF2_ERR_EINT1 */
5488  #define ARIZONA_V2_IM_AIF2_ERR_EINT1_MASK             0x4000  /* IM_AIF2_ERR_EINT1 */
5489  #define ARIZONA_V2_IM_AIF2_ERR_EINT1_SHIFT                14  /* IM_AIF2_ERR_EINT1 */
5490  #define ARIZONA_V2_IM_AIF2_ERR_EINT1_WIDTH                 1  /* IM_AIF2_ERR_EINT1 */
5491  #define ARIZONA_V2_IM_AIF1_ERR_EINT1                  0x2000  /* IM_AIF1_ERR_EINT1 */
5492  #define ARIZONA_V2_IM_AIF1_ERR_EINT1_MASK             0x2000  /* IM_AIF1_ERR_EINT1 */
5493  #define ARIZONA_V2_IM_AIF1_ERR_EINT1_SHIFT                13  /* IM_AIF1_ERR_EINT1 */
5494  #define ARIZONA_V2_IM_AIF1_ERR_EINT1_WIDTH                 1  /* IM_AIF1_ERR_EINT1 */
5495  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1                0x1000  /* IM_CTRLIF_ERR_EINT1 */
5496  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_MASK           0x1000  /* IM_CTRLIF_ERR_EINT1 */
5497  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_SHIFT              12  /* IM_CTRLIF_ERR_EINT1 */
5498  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_WIDTH               1  /* IM_CTRLIF_ERR_EINT1 */
5499  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1      0x0800  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5500  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5501  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT    11  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5502  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH     1  /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5503  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1         0x0400  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5504  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK    0x0400  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5505  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT       10  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5506  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH        1  /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5507  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1            0x0200  /* IM_SYSCLK_ENA_LOW_EINT1 */
5508  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_MASK       0x0200  /* IM_SYSCLK_ENA_LOW_EINT1 */
5509  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_SHIFT           9  /* IM_SYSCLK_ENA_LOW_EINT1 */
5510  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_WIDTH           1  /* IM_SYSCLK_ENA_LOW_EINT1 */
5511  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1             0x0100  /* IM_ISRC1_CFG_ERR_EINT1 */
5512  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_MASK        0x0100  /* IM_ISRC1_CFG_ERR_EINT1 */
5513  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_SHIFT            8  /* IM_ISRC1_CFG_ERR_EINT1 */
5514  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_WIDTH            1  /* IM_ISRC1_CFG_ERR_EINT1 */
5515  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1             0x0080  /* IM_ISRC2_CFG_ERR_EINT1 */
5516  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_MASK        0x0080  /* IM_ISRC2_CFG_ERR_EINT1 */
5517  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_SHIFT            7  /* IM_ISRC2_CFG_ERR_EINT1 */
5518  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_WIDTH            1  /* IM_ISRC2_CFG_ERR_EINT1 */
5519  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1             0x0040  /* IM_ISRC3_CFG_ERR_EINT1 */
5520  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_MASK        0x0040  /* IM_ISRC3_CFG_ERR_EINT1 */
5521  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_SHIFT            6  /* IM_ISRC3_CFG_ERR_EINT1 */
5522  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_WIDTH            1  /* IM_ISRC3_CFG_ERR_EINT1 */
5523  
5524  /*
5525   * R3340 (0xD0C) - Interrupt Status 5 Mask
5526   */
5527  #define ARIZONA_IM_BOOT_DONE_EINT1               0x0100  /* IM_BOOT_DONE_EINT1 */
5528  #define ARIZONA_IM_BOOT_DONE_EINT1_MASK          0x0100  /* IM_BOOT_DONE_EINT1 */
5529  #define ARIZONA_IM_BOOT_DONE_EINT1_SHIFT              8  /* IM_BOOT_DONE_EINT1 */
5530  #define ARIZONA_IM_BOOT_DONE_EINT1_WIDTH              1  /* IM_BOOT_DONE_EINT1 */
5531  #define ARIZONA_IM_DCS_DAC_DONE_EINT1            0x0080  /* IM_DCS_DAC_DONE_EINT1 */
5532  #define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK       0x0080  /* IM_DCS_DAC_DONE_EINT1 */
5533  #define ARIZONA_IM_DCS_DAC_DONE_EINT1_SHIFT           7  /* IM_DCS_DAC_DONE_EINT1 */
5534  #define ARIZONA_IM_DCS_DAC_DONE_EINT1_WIDTH           1  /* IM_DCS_DAC_DONE_EINT1 */
5535  #define ARIZONA_IM_DCS_HP_DONE_EINT1             0x0040  /* IM_DCS_HP_DONE_EINT1 */
5536  #define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK        0x0040  /* IM_DCS_HP_DONE_EINT1 */
5537  #define ARIZONA_IM_DCS_HP_DONE_EINT1_SHIFT            6  /* IM_DCS_HP_DONE_EINT1 */
5538  #define ARIZONA_IM_DCS_HP_DONE_EINT1_WIDTH            1  /* IM_DCS_HP_DONE_EINT1 */
5539  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1           0x0002  /* IM_FLL2_CLOCK_OK_EINT1 */
5540  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK      0x0002  /* IM_FLL2_CLOCK_OK_EINT1 */
5541  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_SHIFT          1  /* IM_FLL2_CLOCK_OK_EINT1 */
5542  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_WIDTH          1  /* IM_FLL2_CLOCK_OK_EINT1 */
5543  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1           0x0001  /* IM_FLL1_CLOCK_OK_EINT1 */
5544  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK      0x0001  /* IM_FLL1_CLOCK_OK_EINT1 */
5545  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT          0  /* IM_FLL1_CLOCK_OK_EINT1 */
5546  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH          1  /* IM_FLL1_CLOCK_OK_EINT1 */
5547  
5548  /*
5549   * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
5550   *
5551   * Alternate layout used on later devices, note only fields that have moved
5552   * are specified
5553   */
5554  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1         0x0008  /* IM_ASRC_CFG_ERR_EINT1 */
5555  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_MASK    0x0008  /* IM_ASRC_CFG_ERR_EINT1 */
5556  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_SHIFT        3  /* IM_ASRC_CFG_ERR_EINT1 */
5557  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_WIDTH        1  /* IM_ASRC_CFG_ERR_EINT1 */
5558  
5559  /*
5560   * R3341 (0xD0D) - Interrupt Status 6 Mask
5561   */
5562  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1      0x8000  /* IM_DSP_SHARED_WR_COLL_EINT1 */
5563  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000  /* IM_DSP_SHARED_WR_COLL_EINT1 */
5564  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT    15  /* IM_DSP_SHARED_WR_COLL_EINT1 */
5565  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH     1  /* IM_DSP_SHARED_WR_COLL_EINT1 */
5566  #define ARIZONA_IM_SPK_SHUTDOWN_EINT1            0x4000  /* IM_SPK_SHUTDOWN_EINT1 */
5567  #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK       0x4000  /* IM_SPK_SHUTDOWN_EINT1 */
5568  #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT          14  /* IM_SPK_SHUTDOWN_EINT1 */
5569  #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH           1  /* IM_SPK_SHUTDOWN_EINT1 */
5570  #define ARIZONA_IM_SPK1R_SHORT_EINT1             0x2000  /* IM_SPK1R_SHORT_EINT1 */
5571  #define ARIZONA_IM_SPK1R_SHORT_EINT1_MASK        0x2000  /* IM_SPK1R_SHORT_EINT1 */
5572  #define ARIZONA_IM_SPK1R_SHORT_EINT1_SHIFT           13  /* IM_SPK1R_SHORT_EINT1 */
5573  #define ARIZONA_IM_SPK1R_SHORT_EINT1_WIDTH            1  /* IM_SPK1R_SHORT_EINT1 */
5574  #define ARIZONA_IM_SPK1L_SHORT_EINT1             0x1000  /* IM_SPK1L_SHORT_EINT1 */
5575  #define ARIZONA_IM_SPK1L_SHORT_EINT1_MASK        0x1000  /* IM_SPK1L_SHORT_EINT1 */
5576  #define ARIZONA_IM_SPK1L_SHORT_EINT1_SHIFT           12  /* IM_SPK1L_SHORT_EINT1 */
5577  #define ARIZONA_IM_SPK1L_SHORT_EINT1_WIDTH            1  /* IM_SPK1L_SHORT_EINT1 */
5578  #define ARIZONA_IM_HP3R_SC_NEG_EINT1             0x0800  /* IM_HP3R_SC_NEG_EINT1 */
5579  #define ARIZONA_IM_HP3R_SC_NEG_EINT1_MASK        0x0800  /* IM_HP3R_SC_NEG_EINT1 */
5580  #define ARIZONA_IM_HP3R_SC_NEG_EINT1_SHIFT           11  /* IM_HP3R_SC_NEG_EINT1 */
5581  #define ARIZONA_IM_HP3R_SC_NEG_EINT1_WIDTH            1  /* IM_HP3R_SC_NEG_EINT1 */
5582  #define ARIZONA_IM_HP3R_SC_POS_EINT1             0x0400  /* IM_HP3R_SC_POS_EINT1 */
5583  #define ARIZONA_IM_HP3R_SC_POS_EINT1_MASK        0x0400  /* IM_HP3R_SC_POS_EINT1 */
5584  #define ARIZONA_IM_HP3R_SC_POS_EINT1_SHIFT           10  /* IM_HP3R_SC_POS_EINT1 */
5585  #define ARIZONA_IM_HP3R_SC_POS_EINT1_WIDTH            1  /* IM_HP3R_SC_POS_EINT1 */
5586  #define ARIZONA_IM_HP3L_SC_NEG_EINT1             0x0200  /* IM_HP3L_SC_NEG_EINT1 */
5587  #define ARIZONA_IM_HP3L_SC_NEG_EINT1_MASK        0x0200  /* IM_HP3L_SC_NEG_EINT1 */
5588  #define ARIZONA_IM_HP3L_SC_NEG_EINT1_SHIFT            9  /* IM_HP3L_SC_NEG_EINT1 */
5589  #define ARIZONA_IM_HP3L_SC_NEG_EINT1_WIDTH            1  /* IM_HP3L_SC_NEG_EINT1 */
5590  #define ARIZONA_IM_HP3L_SC_POS_EINT1             0x0100  /* IM_HP3L_SC_POS_EINT1 */
5591  #define ARIZONA_IM_HP3L_SC_POS_EINT1_MASK        0x0100  /* IM_HP3L_SC_POS_EINT1 */
5592  #define ARIZONA_IM_HP3L_SC_POS_EINT1_SHIFT            8  /* IM_HP3L_SC_POS_EINT1 */
5593  #define ARIZONA_IM_HP3L_SC_POS_EINT1_WIDTH            1  /* IM_HP3L_SC_POS_EINT1 */
5594  #define ARIZONA_IM_HP2R_SC_NEG_EINT1             0x0080  /* IM_HP2R_SC_NEG_EINT1 */
5595  #define ARIZONA_IM_HP2R_SC_NEG_EINT1_MASK        0x0080  /* IM_HP2R_SC_NEG_EINT1 */
5596  #define ARIZONA_IM_HP2R_SC_NEG_EINT1_SHIFT            7  /* IM_HP2R_SC_NEG_EINT1 */
5597  #define ARIZONA_IM_HP2R_SC_NEG_EINT1_WIDTH            1  /* IM_HP2R_SC_NEG_EINT1 */
5598  #define ARIZONA_IM_HP2R_SC_POS_EINT1             0x0040  /* IM_HP2R_SC_POS_EINT1 */
5599  #define ARIZONA_IM_HP2R_SC_POS_EINT1_MASK        0x0040  /* IM_HP2R_SC_POS_EINT1 */
5600  #define ARIZONA_IM_HP2R_SC_POS_EINT1_SHIFT            6  /* IM_HP2R_SC_POS_EINT1 */
5601  #define ARIZONA_IM_HP2R_SC_POS_EINT1_WIDTH            1  /* IM_HP2R_SC_POS_EINT1 */
5602  #define ARIZONA_IM_HP2L_SC_NEG_EINT1             0x0020  /* IM_HP2L_SC_NEG_EINT1 */
5603  #define ARIZONA_IM_HP2L_SC_NEG_EINT1_MASK        0x0020  /* IM_HP2L_SC_NEG_EINT1 */
5604  #define ARIZONA_IM_HP2L_SC_NEG_EINT1_SHIFT            5  /* IM_HP2L_SC_NEG_EINT1 */
5605  #define ARIZONA_IM_HP2L_SC_NEG_EINT1_WIDTH            1  /* IM_HP2L_SC_NEG_EINT1 */
5606  #define ARIZONA_IM_HP2L_SC_POS_EINT1             0x0010  /* IM_HP2L_SC_POS_EINT1 */
5607  #define ARIZONA_IM_HP2L_SC_POS_EINT1_MASK        0x0010  /* IM_HP2L_SC_POS_EINT1 */
5608  #define ARIZONA_IM_HP2L_SC_POS_EINT1_SHIFT            4  /* IM_HP2L_SC_POS_EINT1 */
5609  #define ARIZONA_IM_HP2L_SC_POS_EINT1_WIDTH            1  /* IM_HP2L_SC_POS_EINT1 */
5610  #define ARIZONA_IM_HP1R_SC_NEG_EINT1             0x0008  /* IM_HP1R_SC_NEG_EINT1 */
5611  #define ARIZONA_IM_HP1R_SC_NEG_EINT1_MASK        0x0008  /* IM_HP1R_SC_NEG_EINT1 */
5612  #define ARIZONA_IM_HP1R_SC_NEG_EINT1_SHIFT            3  /* IM_HP1R_SC_NEG_EINT1 */
5613  #define ARIZONA_IM_HP1R_SC_NEG_EINT1_WIDTH            1  /* IM_HP1R_SC_NEG_EINT1 */
5614  #define ARIZONA_IM_HP1R_SC_POS_EINT1             0x0004  /* IM_HP1R_SC_POS_EINT1 */
5615  #define ARIZONA_IM_HP1R_SC_POS_EINT1_MASK        0x0004  /* IM_HP1R_SC_POS_EINT1 */
5616  #define ARIZONA_IM_HP1R_SC_POS_EINT1_SHIFT            2  /* IM_HP1R_SC_POS_EINT1 */
5617  #define ARIZONA_IM_HP1R_SC_POS_EINT1_WIDTH            1  /* IM_HP1R_SC_POS_EINT1 */
5618  #define ARIZONA_IM_HP1L_SC_NEG_EINT1             0x0002  /* IM_HP1L_SC_NEG_EINT1 */
5619  #define ARIZONA_IM_HP1L_SC_NEG_EINT1_MASK        0x0002  /* IM_HP1L_SC_NEG_EINT1 */
5620  #define ARIZONA_IM_HP1L_SC_NEG_EINT1_SHIFT            1  /* IM_HP1L_SC_NEG_EINT1 */
5621  #define ARIZONA_IM_HP1L_SC_NEG_EINT1_WIDTH            1  /* IM_HP1L_SC_NEG_EINT1 */
5622  #define ARIZONA_IM_HP1L_SC_POS_EINT1             0x0001  /* IM_HP1L_SC_POS_EINT1 */
5623  #define ARIZONA_IM_HP1L_SC_POS_EINT1_MASK        0x0001  /* IM_HP1L_SC_POS_EINT1 */
5624  #define ARIZONA_IM_HP1L_SC_POS_EINT1_SHIFT            0  /* IM_HP1L_SC_POS_EINT1 */
5625  #define ARIZONA_IM_HP1L_SC_POS_EINT1_WIDTH            1  /* IM_HP1L_SC_POS_EINT1 */
5626  
5627  /*
5628   * R3343 (0xD0F) - Interrupt Control
5629   */
5630  #define ARIZONA_IM_IRQ1                          0x0001  /* IM_IRQ1 */
5631  #define ARIZONA_IM_IRQ1_MASK                     0x0001  /* IM_IRQ1 */
5632  #define ARIZONA_IM_IRQ1_SHIFT                         0  /* IM_IRQ1 */
5633  #define ARIZONA_IM_IRQ1_WIDTH                         1  /* IM_IRQ1 */
5634  
5635  /*
5636   * R3344 (0xD10) - IRQ2 Status 1
5637   */
5638  #define ARIZONA_GP4_EINT2                        0x0008  /* GP4_EINT2 */
5639  #define ARIZONA_GP4_EINT2_MASK                   0x0008  /* GP4_EINT2 */
5640  #define ARIZONA_GP4_EINT2_SHIFT                       3  /* GP4_EINT2 */
5641  #define ARIZONA_GP4_EINT2_WIDTH                       1  /* GP4_EINT2 */
5642  #define ARIZONA_GP3_EINT2                        0x0004  /* GP3_EINT2 */
5643  #define ARIZONA_GP3_EINT2_MASK                   0x0004  /* GP3_EINT2 */
5644  #define ARIZONA_GP3_EINT2_SHIFT                       2  /* GP3_EINT2 */
5645  #define ARIZONA_GP3_EINT2_WIDTH                       1  /* GP3_EINT2 */
5646  #define ARIZONA_GP2_EINT2                        0x0002  /* GP2_EINT2 */
5647  #define ARIZONA_GP2_EINT2_MASK                   0x0002  /* GP2_EINT2 */
5648  #define ARIZONA_GP2_EINT2_SHIFT                       1  /* GP2_EINT2 */
5649  #define ARIZONA_GP2_EINT2_WIDTH                       1  /* GP2_EINT2 */
5650  #define ARIZONA_GP1_EINT2                        0x0001  /* GP1_EINT2 */
5651  #define ARIZONA_GP1_EINT2_MASK                   0x0001  /* GP1_EINT2 */
5652  #define ARIZONA_GP1_EINT2_SHIFT                       0  /* GP1_EINT2 */
5653  #define ARIZONA_GP1_EINT2_WIDTH                       1  /* GP1_EINT2 */
5654  
5655  /*
5656   * R3345 (0xD11) - IRQ2 Status 2
5657   */
5658  #define ARIZONA_DSP1_RAM_RDY_EINT2               0x0100  /* DSP1_RAM_RDY_EINT2 */
5659  #define ARIZONA_DSP1_RAM_RDY_EINT2_MASK          0x0100  /* DSP1_RAM_RDY_EINT2 */
5660  #define ARIZONA_DSP1_RAM_RDY_EINT2_SHIFT              8  /* DSP1_RAM_RDY_EINT2 */
5661  #define ARIZONA_DSP1_RAM_RDY_EINT2_WIDTH              1  /* DSP1_RAM_RDY_EINT2 */
5662  #define ARIZONA_DSP_IRQ2_EINT2                   0x0002  /* DSP_IRQ2_EINT2 */
5663  #define ARIZONA_DSP_IRQ2_EINT2_MASK              0x0002  /* DSP_IRQ2_EINT2 */
5664  #define ARIZONA_DSP_IRQ2_EINT2_SHIFT                  1  /* DSP_IRQ2_EINT2 */
5665  #define ARIZONA_DSP_IRQ2_EINT2_WIDTH                  1  /* DSP_IRQ2_EINT2 */
5666  #define ARIZONA_DSP_IRQ1_EINT2                   0x0001  /* DSP_IRQ1_EINT2 */
5667  #define ARIZONA_DSP_IRQ1_EINT2_MASK              0x0001  /* DSP_IRQ1_EINT2 */
5668  #define ARIZONA_DSP_IRQ1_EINT2_SHIFT                  0  /* DSP_IRQ1_EINT2 */
5669  #define ARIZONA_DSP_IRQ1_EINT2_WIDTH                  1  /* DSP_IRQ1_EINT2 */
5670  
5671  /*
5672   * R3346 (0xD12) - IRQ2 Status 3
5673   */
5674  #define ARIZONA_SPK_OVERHEAT_WARN_EINT2          0x8000  /* SPK_OVERHEAT_WARN_EINT2 */
5675  #define ARIZONA_SPK_OVERHEAT_WARN_EINT2_MASK     0x8000  /* SPK_OVERHEAT_WARN_EINT2 */
5676  #define ARIZONA_SPK_OVERHEAT_WARN_EINT2_SHIFT        15  /* SPK_OVERHEAT_WARN_EINT2 */
5677  #define ARIZONA_SPK_OVERHEAT_WARN_EINT2_WIDTH         1  /* SPK_OVERHEAT_WARN_EINT2 */
5678  #define ARIZONA_SPK_OVERHEAT_EINT2               0x4000  /* SPK_OVERHEAT_EINT2 */
5679  #define ARIZONA_SPK_OVERHEAT_EINT2_MASK          0x4000  /* SPK_OVERHEAT_EINT2 */
5680  #define ARIZONA_SPK_OVERHEAT_EINT2_SHIFT             14  /* SPK_OVERHEAT_EINT2 */
5681  #define ARIZONA_SPK_OVERHEAT_EINT2_WIDTH              1  /* SPK_OVERHEAT_EINT2 */
5682  #define ARIZONA_HPDET_EINT2                      0x2000  /* HPDET_EINT2 */
5683  #define ARIZONA_HPDET_EINT2_MASK                 0x2000  /* HPDET_EINT2 */
5684  #define ARIZONA_HPDET_EINT2_SHIFT                    13  /* HPDET_EINT2 */
5685  #define ARIZONA_HPDET_EINT2_WIDTH                     1  /* HPDET_EINT2 */
5686  #define ARIZONA_MICDET_EINT2                     0x1000  /* MICDET_EINT2 */
5687  #define ARIZONA_MICDET_EINT2_MASK                0x1000  /* MICDET_EINT2 */
5688  #define ARIZONA_MICDET_EINT2_SHIFT                   12  /* MICDET_EINT2 */
5689  #define ARIZONA_MICDET_EINT2_WIDTH                    1  /* MICDET_EINT2 */
5690  #define ARIZONA_WSEQ_DONE_EINT2                  0x0800  /* WSEQ_DONE_EINT2 */
5691  #define ARIZONA_WSEQ_DONE_EINT2_MASK             0x0800  /* WSEQ_DONE_EINT2 */
5692  #define ARIZONA_WSEQ_DONE_EINT2_SHIFT                11  /* WSEQ_DONE_EINT2 */
5693  #define ARIZONA_WSEQ_DONE_EINT2_WIDTH                 1  /* WSEQ_DONE_EINT2 */
5694  #define ARIZONA_DRC2_SIG_DET_EINT2               0x0400  /* DRC2_SIG_DET_EINT2 */
5695  #define ARIZONA_DRC2_SIG_DET_EINT2_MASK          0x0400  /* DRC2_SIG_DET_EINT2 */
5696  #define ARIZONA_DRC2_SIG_DET_EINT2_SHIFT             10  /* DRC2_SIG_DET_EINT2 */
5697  #define ARIZONA_DRC2_SIG_DET_EINT2_WIDTH              1  /* DRC2_SIG_DET_EINT2 */
5698  #define ARIZONA_DRC1_SIG_DET_EINT2               0x0200  /* DRC1_SIG_DET_EINT2 */
5699  #define ARIZONA_DRC1_SIG_DET_EINT2_MASK          0x0200  /* DRC1_SIG_DET_EINT2 */
5700  #define ARIZONA_DRC1_SIG_DET_EINT2_SHIFT              9  /* DRC1_SIG_DET_EINT2 */
5701  #define ARIZONA_DRC1_SIG_DET_EINT2_WIDTH              1  /* DRC1_SIG_DET_EINT2 */
5702  #define ARIZONA_ASRC2_LOCK_EINT2                 0x0100  /* ASRC2_LOCK_EINT2 */
5703  #define ARIZONA_ASRC2_LOCK_EINT2_MASK            0x0100  /* ASRC2_LOCK_EINT2 */
5704  #define ARIZONA_ASRC2_LOCK_EINT2_SHIFT                8  /* ASRC2_LOCK_EINT2 */
5705  #define ARIZONA_ASRC2_LOCK_EINT2_WIDTH                1  /* ASRC2_LOCK_EINT2 */
5706  #define ARIZONA_ASRC1_LOCK_EINT2                 0x0080  /* ASRC1_LOCK_EINT2 */
5707  #define ARIZONA_ASRC1_LOCK_EINT2_MASK            0x0080  /* ASRC1_LOCK_EINT2 */
5708  #define ARIZONA_ASRC1_LOCK_EINT2_SHIFT                7  /* ASRC1_LOCK_EINT2 */
5709  #define ARIZONA_ASRC1_LOCK_EINT2_WIDTH                1  /* ASRC1_LOCK_EINT2 */
5710  #define ARIZONA_UNDERCLOCKED_EINT2               0x0040  /* UNDERCLOCKED_EINT2 */
5711  #define ARIZONA_UNDERCLOCKED_EINT2_MASK          0x0040  /* UNDERCLOCKED_EINT2 */
5712  #define ARIZONA_UNDERCLOCKED_EINT2_SHIFT              6  /* UNDERCLOCKED_EINT2 */
5713  #define ARIZONA_UNDERCLOCKED_EINT2_WIDTH              1  /* UNDERCLOCKED_EINT2 */
5714  #define ARIZONA_OVERCLOCKED_EINT2                0x0020  /* OVERCLOCKED_EINT2 */
5715  #define ARIZONA_OVERCLOCKED_EINT2_MASK           0x0020  /* OVERCLOCKED_EINT2 */
5716  #define ARIZONA_OVERCLOCKED_EINT2_SHIFT               5  /* OVERCLOCKED_EINT2 */
5717  #define ARIZONA_OVERCLOCKED_EINT2_WIDTH               1  /* OVERCLOCKED_EINT2 */
5718  #define ARIZONA_FLL2_LOCK_EINT2                  0x0008  /* FLL2_LOCK_EINT2 */
5719  #define ARIZONA_FLL2_LOCK_EINT2_MASK             0x0008  /* FLL2_LOCK_EINT2 */
5720  #define ARIZONA_FLL2_LOCK_EINT2_SHIFT                 3  /* FLL2_LOCK_EINT2 */
5721  #define ARIZONA_FLL2_LOCK_EINT2_WIDTH                 1  /* FLL2_LOCK_EINT2 */
5722  #define ARIZONA_FLL1_LOCK_EINT2                  0x0004  /* FLL1_LOCK_EINT2 */
5723  #define ARIZONA_FLL1_LOCK_EINT2_MASK             0x0004  /* FLL1_LOCK_EINT2 */
5724  #define ARIZONA_FLL1_LOCK_EINT2_SHIFT                 2  /* FLL1_LOCK_EINT2 */
5725  #define ARIZONA_FLL1_LOCK_EINT2_WIDTH                 1  /* FLL1_LOCK_EINT2 */
5726  #define ARIZONA_CLKGEN_ERR_EINT2                 0x0002  /* CLKGEN_ERR_EINT2 */
5727  #define ARIZONA_CLKGEN_ERR_EINT2_MASK            0x0002  /* CLKGEN_ERR_EINT2 */
5728  #define ARIZONA_CLKGEN_ERR_EINT2_SHIFT                1  /* CLKGEN_ERR_EINT2 */
5729  #define ARIZONA_CLKGEN_ERR_EINT2_WIDTH                1  /* CLKGEN_ERR_EINT2 */
5730  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2           0x0001  /* CLKGEN_ERR_ASYNC_EINT2 */
5731  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK      0x0001  /* CLKGEN_ERR_ASYNC_EINT2 */
5732  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT          0  /* CLKGEN_ERR_ASYNC_EINT2 */
5733  #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_WIDTH          1  /* CLKGEN_ERR_ASYNC_EINT2 */
5734  
5735  /*
5736   * R3347 (0xD13) - IRQ2 Status 4
5737   */
5738  #define ARIZONA_ASRC_CFG_ERR_EINT2               0x8000  /* ASRC_CFG_ERR_EINT2 */
5739  #define ARIZONA_ASRC_CFG_ERR_EINT2_MASK          0x8000  /* ASRC_CFG_ERR_EINT2 */
5740  #define ARIZONA_ASRC_CFG_ERR_EINT2_SHIFT             15  /* ASRC_CFG_ERR_EINT2 */
5741  #define ARIZONA_ASRC_CFG_ERR_EINT2_WIDTH              1  /* ASRC_CFG_ERR_EINT2 */
5742  #define ARIZONA_AIF3_ERR_EINT2                   0x4000  /* AIF3_ERR_EINT2 */
5743  #define ARIZONA_AIF3_ERR_EINT2_MASK              0x4000  /* AIF3_ERR_EINT2 */
5744  #define ARIZONA_AIF3_ERR_EINT2_SHIFT                 14  /* AIF3_ERR_EINT2 */
5745  #define ARIZONA_AIF3_ERR_EINT2_WIDTH                  1  /* AIF3_ERR_EINT2 */
5746  #define ARIZONA_AIF2_ERR_EINT2                   0x2000  /* AIF2_ERR_EINT2 */
5747  #define ARIZONA_AIF2_ERR_EINT2_MASK              0x2000  /* AIF2_ERR_EINT2 */
5748  #define ARIZONA_AIF2_ERR_EINT2_SHIFT                 13  /* AIF2_ERR_EINT2 */
5749  #define ARIZONA_AIF2_ERR_EINT2_WIDTH                  1  /* AIF2_ERR_EINT2 */
5750  #define ARIZONA_AIF1_ERR_EINT2                   0x1000  /* AIF1_ERR_EINT2 */
5751  #define ARIZONA_AIF1_ERR_EINT2_MASK              0x1000  /* AIF1_ERR_EINT2 */
5752  #define ARIZONA_AIF1_ERR_EINT2_SHIFT                 12  /* AIF1_ERR_EINT2 */
5753  #define ARIZONA_AIF1_ERR_EINT2_WIDTH                  1  /* AIF1_ERR_EINT2 */
5754  #define ARIZONA_CTRLIF_ERR_EINT2                 0x0800  /* CTRLIF_ERR_EINT2 */
5755  #define ARIZONA_CTRLIF_ERR_EINT2_MASK            0x0800  /* CTRLIF_ERR_EINT2 */
5756  #define ARIZONA_CTRLIF_ERR_EINT2_SHIFT               11  /* CTRLIF_ERR_EINT2 */
5757  #define ARIZONA_CTRLIF_ERR_EINT2_WIDTH                1  /* CTRLIF_ERR_EINT2 */
5758  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2       0x0400  /* MIXER_DROPPED_SAMPLE_EINT2 */
5759  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK  0x0400  /* MIXER_DROPPED_SAMPLE_EINT2 */
5760  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_SHIFT     10  /* MIXER_DROPPED_SAMPLE_EINT2 */
5761  #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_WIDTH      1  /* MIXER_DROPPED_SAMPLE_EINT2 */
5762  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2          0x0200  /* ASYNC_CLK_ENA_LOW_EINT2 */
5763  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK     0x0200  /* ASYNC_CLK_ENA_LOW_EINT2 */
5764  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_SHIFT         9  /* ASYNC_CLK_ENA_LOW_EINT2 */
5765  #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_WIDTH         1  /* ASYNC_CLK_ENA_LOW_EINT2 */
5766  #define ARIZONA_SYSCLK_ENA_LOW_EINT2             0x0100  /* SYSCLK_ENA_LOW_EINT2 */
5767  #define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK        0x0100  /* SYSCLK_ENA_LOW_EINT2 */
5768  #define ARIZONA_SYSCLK_ENA_LOW_EINT2_SHIFT            8  /* SYSCLK_ENA_LOW_EINT2 */
5769  #define ARIZONA_SYSCLK_ENA_LOW_EINT2_WIDTH            1  /* SYSCLK_ENA_LOW_EINT2 */
5770  #define ARIZONA_ISRC1_CFG_ERR_EINT2              0x0080  /* ISRC1_CFG_ERR_EINT2 */
5771  #define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK         0x0080  /* ISRC1_CFG_ERR_EINT2 */
5772  #define ARIZONA_ISRC1_CFG_ERR_EINT2_SHIFT             7  /* ISRC1_CFG_ERR_EINT2 */
5773  #define ARIZONA_ISRC1_CFG_ERR_EINT2_WIDTH             1  /* ISRC1_CFG_ERR_EINT2 */
5774  #define ARIZONA_ISRC2_CFG_ERR_EINT2              0x0040  /* ISRC2_CFG_ERR_EINT2 */
5775  #define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK         0x0040  /* ISRC2_CFG_ERR_EINT2 */
5776  #define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT             6  /* ISRC2_CFG_ERR_EINT2 */
5777  #define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH             1  /* ISRC2_CFG_ERR_EINT2 */
5778  #define ARIZONA_HP3R_DONE_EINT2                  0x0020  /* HP3R_DONE_EINT2 */
5779  #define ARIZONA_HP3R_DONE_EINT2_MASK             0x0020  /* HP3R_DONE_EINT2 */
5780  #define ARIZONA_HP3R_DONE_EINT2_SHIFT                 5  /* HP3R_DONE_EINT2 */
5781  #define ARIZONA_HP3R_DONE_EINT2_WIDTH                 1  /* HP3R_DONE_EINT2 */
5782  #define ARIZONA_HP3L_DONE_EINT2                  0x0010  /* HP3L_DONE_EINT2 */
5783  #define ARIZONA_HP3L_DONE_EINT2_MASK             0x0010  /* HP3L_DONE_EINT2 */
5784  #define ARIZONA_HP3L_DONE_EINT2_SHIFT                 4  /* HP3L_DONE_EINT2 */
5785  #define ARIZONA_HP3L_DONE_EINT2_WIDTH                 1  /* HP3L_DONE_EINT2 */
5786  #define ARIZONA_HP2R_DONE_EINT2                  0x0008  /* HP2R_DONE_EINT2 */
5787  #define ARIZONA_HP2R_DONE_EINT2_MASK             0x0008  /* HP2R_DONE_EINT2 */
5788  #define ARIZONA_HP2R_DONE_EINT2_SHIFT                 3  /* HP2R_DONE_EINT2 */
5789  #define ARIZONA_HP2R_DONE_EINT2_WIDTH                 1  /* HP2R_DONE_EINT2 */
5790  #define ARIZONA_HP2L_DONE_EINT2                  0x0004  /* HP2L_DONE_EINT2 */
5791  #define ARIZONA_HP2L_DONE_EINT2_MASK             0x0004  /* HP2L_DONE_EINT2 */
5792  #define ARIZONA_HP2L_DONE_EINT2_SHIFT                 2  /* HP2L_DONE_EINT2 */
5793  #define ARIZONA_HP2L_DONE_EINT2_WIDTH                 1  /* HP2L_DONE_EINT2 */
5794  #define ARIZONA_HP1R_DONE_EINT2                  0x0002  /* HP1R_DONE_EINT2 */
5795  #define ARIZONA_HP1R_DONE_EINT2_MASK             0x0002  /* HP1R_DONE_EINT2 */
5796  #define ARIZONA_HP1R_DONE_EINT2_SHIFT                 1  /* HP1R_DONE_EINT2 */
5797  #define ARIZONA_HP1R_DONE_EINT2_WIDTH                 1  /* HP1R_DONE_EINT2 */
5798  #define ARIZONA_HP1L_DONE_EINT2                  0x0001  /* HP1L_DONE_EINT2 */
5799  #define ARIZONA_HP1L_DONE_EINT2_MASK             0x0001  /* HP1L_DONE_EINT2 */
5800  #define ARIZONA_HP1L_DONE_EINT2_SHIFT                 0  /* HP1L_DONE_EINT2 */
5801  #define ARIZONA_HP1L_DONE_EINT2_WIDTH                 1  /* HP1L_DONE_EINT2 */
5802  
5803  /*
5804   * R3347 (0xD13) - IRQ2 Status 4 (Alternate layout)
5805   *
5806   * Alternate layout used on later devices, note only fields that have moved
5807   * are specified
5808   */
5809  #define ARIZONA_V2_AIF3_ERR_EINT2                  0x8000  /* AIF3_ERR_EINT2 */
5810  #define ARIZONA_V2_AIF3_ERR_EINT2_MASK             0x8000  /* AIF3_ERR_EINT2 */
5811  #define ARIZONA_V2_AIF3_ERR_EINT2_SHIFT                15  /* AIF3_ERR_EINT2 */
5812  #define ARIZONA_V2_AIF3_ERR_EINT2_WIDTH                 1  /* AIF3_ERR_EINT2 */
5813  #define ARIZONA_V2_AIF2_ERR_EINT2                  0x4000  /* AIF2_ERR_EINT2 */
5814  #define ARIZONA_V2_AIF2_ERR_EINT2_MASK             0x4000  /* AIF2_ERR_EINT2 */
5815  #define ARIZONA_V2_AIF2_ERR_EINT2_SHIFT                14  /* AIF2_ERR_EINT2 */
5816  #define ARIZONA_V2_AIF2_ERR_EINT2_WIDTH                 1  /* AIF2_ERR_EINT2 */
5817  #define ARIZONA_V2_AIF1_ERR_EINT2                  0x2000  /* AIF1_ERR_EINT2 */
5818  #define ARIZONA_V2_AIF1_ERR_EINT2_MASK             0x2000  /* AIF1_ERR_EINT2 */
5819  #define ARIZONA_V2_AIF1_ERR_EINT2_SHIFT                13  /* AIF1_ERR_EINT2 */
5820  #define ARIZONA_V2_AIF1_ERR_EINT2_WIDTH                 1  /* AIF1_ERR_EINT2 */
5821  #define ARIZONA_V2_CTRLIF_ERR_EINT2                0x1000  /* CTRLIF_ERR_EINT2 */
5822  #define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK           0x1000  /* CTRLIF_ERR_EINT2 */
5823  #define ARIZONA_V2_CTRLIF_ERR_EINT2_SHIFT              12  /* CTRLIF_ERR_EINT2 */
5824  #define ARIZONA_V2_CTRLIF_ERR_EINT2_WIDTH               1  /* CTRLIF_ERR_EINT2 */
5825  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2      0x0800  /* MIXER_DROPPED_SAMPLE_EINT2 */
5826  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800  /* MIXER_DROPPED_SAMPLE_EINT2 */
5827  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_SHIFT    11  /* MIXER_DROPPED_SAMPLE_EINT2 */
5828  #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_WIDTH     1  /* MIXER_DROPPED_SAMPLE_EINT2 */
5829  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2         0x0400  /* ASYNC_CLK_ENA_LOW_EINT2 */
5830  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK    0x0400  /* ASYNC_CLK_ENA_LOW_EINT2 */
5831  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_SHIFT       10  /* ASYNC_CLK_ENA_LOW_EINT2 */
5832  #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_WIDTH        1  /* ASYNC_CLK_ENA_LOW_EINT2 */
5833  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2            0x0200  /* SYSCLK_ENA_LOW_EINT2 */
5834  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK       0x0200  /* SYSCLK_ENA_LOW_EINT2 */
5835  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_SHIFT           9  /* SYSCLK_ENA_LOW_EINT2 */
5836  #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_WIDTH           1  /* SYSCLK_ENA_LOW_EINT2 */
5837  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2             0x0100  /* ISRC1_CFG_ERR_EINT2 */
5838  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK        0x0100  /* ISRC1_CFG_ERR_EINT2 */
5839  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_SHIFT            8  /* ISRC1_CFG_ERR_EINT2 */
5840  #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_WIDTH            1  /* ISRC1_CFG_ERR_EINT2 */
5841  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2             0x0080  /* ISRC2_CFG_ERR_EINT2 */
5842  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK        0x0080  /* ISRC2_CFG_ERR_EINT2 */
5843  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_SHIFT            7  /* ISRC2_CFG_ERR_EINT2 */
5844  #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_WIDTH            1  /* ISRC2_CFG_ERR_EINT2 */
5845  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2             0x0040  /* ISRC3_CFG_ERR_EINT2 */
5846  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK        0x0040  /* ISRC3_CFG_ERR_EINT2 */
5847  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_SHIFT            6  /* ISRC3_CFG_ERR_EINT2 */
5848  #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_WIDTH            1  /* ISRC3_CFG_ERR_EINT2 */
5849  
5850  /*
5851   * R3348 (0xD14) - IRQ2 Status 5
5852   */
5853  #define ARIZONA_BOOT_DONE_EINT2                  0x0100  /* BOOT_DONE_EINT2 */
5854  #define ARIZONA_BOOT_DONE_EINT2_MASK             0x0100  /* BOOT_DONE_EINT2 */
5855  #define ARIZONA_BOOT_DONE_EINT2_SHIFT                 8  /* BOOT_DONE_EINT2 */
5856  #define ARIZONA_BOOT_DONE_EINT2_WIDTH                 1  /* BOOT_DONE_EINT2 */
5857  #define ARIZONA_DCS_DAC_DONE_EINT2               0x0080  /* DCS_DAC_DONE_EINT2 */
5858  #define ARIZONA_DCS_DAC_DONE_EINT2_MASK          0x0080  /* DCS_DAC_DONE_EINT2 */
5859  #define ARIZONA_DCS_DAC_DONE_EINT2_SHIFT              7  /* DCS_DAC_DONE_EINT2 */
5860  #define ARIZONA_DCS_DAC_DONE_EINT2_WIDTH              1  /* DCS_DAC_DONE_EINT2 */
5861  #define ARIZONA_DCS_HP_DONE_EINT2                0x0040  /* DCS_HP_DONE_EINT2 */
5862  #define ARIZONA_DCS_HP_DONE_EINT2_MASK           0x0040  /* DCS_HP_DONE_EINT2 */
5863  #define ARIZONA_DCS_HP_DONE_EINT2_SHIFT               6  /* DCS_HP_DONE_EINT2 */
5864  #define ARIZONA_DCS_HP_DONE_EINT2_WIDTH               1  /* DCS_HP_DONE_EINT2 */
5865  #define ARIZONA_FLL2_CLOCK_OK_EINT2              0x0002  /* FLL2_CLOCK_OK_EINT2 */
5866  #define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK         0x0002  /* FLL2_CLOCK_OK_EINT2 */
5867  #define ARIZONA_FLL2_CLOCK_OK_EINT2_SHIFT             1  /* FLL2_CLOCK_OK_EINT2 */
5868  #define ARIZONA_FLL2_CLOCK_OK_EINT2_WIDTH             1  /* FLL2_CLOCK_OK_EINT2 */
5869  #define ARIZONA_FLL1_CLOCK_OK_EINT2              0x0001  /* FLL1_CLOCK_OK_EINT2 */
5870  #define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK         0x0001  /* FLL1_CLOCK_OK_EINT2 */
5871  #define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT             0  /* FLL1_CLOCK_OK_EINT2 */
5872  #define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH             1  /* FLL1_CLOCK_OK_EINT2 */
5873  
5874  /*
5875   * R3348 (0xD14) - IRQ2 Status 5 (Alternate layout)
5876   *
5877   * Alternate layout used on later devices, note only fields that have moved
5878   * are specified
5879   */
5880  #define ARIZONA_V2_ASRC_CFG_ERR_EINT2            0x0008  /* ASRC_CFG_ERR_EINT2 */
5881  #define ARIZONA_V2_ASRC_CFG_ERR_EINT2_MASK       0x0008  /* ASRC_CFG_ERR_EINT2 */
5882  #define ARIZONA_V2_ASRC_CFG_ERR_EINT2_SHIFT           3  /* ASRC_CFG_ERR_EINT2 */
5883  #define ARIZONA_V2_ASRC_CFG_ERR_EINT2_WIDTH           1  /* ASRC_CFG_ERR_EINT2 */
5884  
5885  /*
5886   * R3349 (0xD15) - IRQ2 Status 6
5887   */
5888  #define ARIZONA_DSP_SHARED_WR_COLL_EINT2         0x8000  /* DSP_SHARED_WR_COLL_EINT2 */
5889  #define ARIZONA_DSP_SHARED_WR_COLL_EINT2_MASK    0x8000  /* DSP_SHARED_WR_COLL_EINT2 */
5890  #define ARIZONA_DSP_SHARED_WR_COLL_EINT2_SHIFT       15  /* DSP_SHARED_WR_COLL_EINT2 */
5891  #define ARIZONA_DSP_SHARED_WR_COLL_EINT2_WIDTH        1  /* DSP_SHARED_WR_COLL_EINT2 */
5892  #define ARIZONA_SPK_SHUTDOWN_EINT2               0x4000  /* SPK_SHUTDOWN_EINT2 */
5893  #define ARIZONA_SPK_SHUTDOWN_EINT2_MASK          0x4000  /* SPK_SHUTDOWN_EINT2 */
5894  #define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT             14  /* SPK_SHUTDOWN_EINT2 */
5895  #define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH              1  /* SPK_SHUTDOWN_EINT2 */
5896  #define ARIZONA_SPK1R_SHORT_EINT2                0x2000  /* SPK1R_SHORT_EINT2 */
5897  #define ARIZONA_SPK1R_SHORT_EINT2_MASK           0x2000  /* SPK1R_SHORT_EINT2 */
5898  #define ARIZONA_SPK1R_SHORT_EINT2_SHIFT              13  /* SPK1R_SHORT_EINT2 */
5899  #define ARIZONA_SPK1R_SHORT_EINT2_WIDTH               1  /* SPK1R_SHORT_EINT2 */
5900  #define ARIZONA_SPK1L_SHORT_EINT2                0x1000  /* SPK1L_SHORT_EINT2 */
5901  #define ARIZONA_SPK1L_SHORT_EINT2_MASK           0x1000  /* SPK1L_SHORT_EINT2 */
5902  #define ARIZONA_SPK1L_SHORT_EINT2_SHIFT              12  /* SPK1L_SHORT_EINT2 */
5903  #define ARIZONA_SPK1L_SHORT_EINT2_WIDTH               1  /* SPK1L_SHORT_EINT2 */
5904  #define ARIZONA_HP3R_SC_NEG_EINT2                0x0800  /* HP3R_SC_NEG_EINT2 */
5905  #define ARIZONA_HP3R_SC_NEG_EINT2_MASK           0x0800  /* HP3R_SC_NEG_EINT2 */
5906  #define ARIZONA_HP3R_SC_NEG_EINT2_SHIFT              11  /* HP3R_SC_NEG_EINT2 */
5907  #define ARIZONA_HP3R_SC_NEG_EINT2_WIDTH               1  /* HP3R_SC_NEG_EINT2 */
5908  #define ARIZONA_HP3R_SC_POS_EINT2                0x0400  /* HP3R_SC_POS_EINT2 */
5909  #define ARIZONA_HP3R_SC_POS_EINT2_MASK           0x0400  /* HP3R_SC_POS_EINT2 */
5910  #define ARIZONA_HP3R_SC_POS_EINT2_SHIFT              10  /* HP3R_SC_POS_EINT2 */
5911  #define ARIZONA_HP3R_SC_POS_EINT2_WIDTH               1  /* HP3R_SC_POS_EINT2 */
5912  #define ARIZONA_HP3L_SC_NEG_EINT2                0x0200  /* HP3L_SC_NEG_EINT2 */
5913  #define ARIZONA_HP3L_SC_NEG_EINT2_MASK           0x0200  /* HP3L_SC_NEG_EINT2 */
5914  #define ARIZONA_HP3L_SC_NEG_EINT2_SHIFT               9  /* HP3L_SC_NEG_EINT2 */
5915  #define ARIZONA_HP3L_SC_NEG_EINT2_WIDTH               1  /* HP3L_SC_NEG_EINT2 */
5916  #define ARIZONA_HP3L_SC_POS_EINT2                0x0100  /* HP3L_SC_POS_EINT2 */
5917  #define ARIZONA_HP3L_SC_POS_EINT2_MASK           0x0100  /* HP3L_SC_POS_EINT2 */
5918  #define ARIZONA_HP3L_SC_POS_EINT2_SHIFT               8  /* HP3L_SC_POS_EINT2 */
5919  #define ARIZONA_HP3L_SC_POS_EINT2_WIDTH               1  /* HP3L_SC_POS_EINT2 */
5920  #define ARIZONA_HP2R_SC_NEG_EINT2                0x0080  /* HP2R_SC_NEG_EINT2 */
5921  #define ARIZONA_HP2R_SC_NEG_EINT2_MASK           0x0080  /* HP2R_SC_NEG_EINT2 */
5922  #define ARIZONA_HP2R_SC_NEG_EINT2_SHIFT               7  /* HP2R_SC_NEG_EINT2 */
5923  #define ARIZONA_HP2R_SC_NEG_EINT2_WIDTH               1  /* HP2R_SC_NEG_EINT2 */
5924  #define ARIZONA_HP2R_SC_POS_EINT2                0x0040  /* HP2R_SC_POS_EINT2 */
5925  #define ARIZONA_HP2R_SC_POS_EINT2_MASK           0x0040  /* HP2R_SC_POS_EINT2 */
5926  #define ARIZONA_HP2R_SC_POS_EINT2_SHIFT               6  /* HP2R_SC_POS_EINT2 */
5927  #define ARIZONA_HP2R_SC_POS_EINT2_WIDTH               1  /* HP2R_SC_POS_EINT2 */
5928  #define ARIZONA_HP2L_SC_NEG_EINT2                0x0020  /* HP2L_SC_NEG_EINT2 */
5929  #define ARIZONA_HP2L_SC_NEG_EINT2_MASK           0x0020  /* HP2L_SC_NEG_EINT2 */
5930  #define ARIZONA_HP2L_SC_NEG_EINT2_SHIFT               5  /* HP2L_SC_NEG_EINT2 */
5931  #define ARIZONA_HP2L_SC_NEG_EINT2_WIDTH               1  /* HP2L_SC_NEG_EINT2 */
5932  #define ARIZONA_HP2L_SC_POS_EINT2                0x0010  /* HP2L_SC_POS_EINT2 */
5933  #define ARIZONA_HP2L_SC_POS_EINT2_MASK           0x0010  /* HP2L_SC_POS_EINT2 */
5934  #define ARIZONA_HP2L_SC_POS_EINT2_SHIFT               4  /* HP2L_SC_POS_EINT2 */
5935  #define ARIZONA_HP2L_SC_POS_EINT2_WIDTH               1  /* HP2L_SC_POS_EINT2 */
5936  #define ARIZONA_HP1R_SC_NEG_EINT2                0x0008  /* HP1R_SC_NEG_EINT2 */
5937  #define ARIZONA_HP1R_SC_NEG_EINT2_MASK           0x0008  /* HP1R_SC_NEG_EINT2 */
5938  #define ARIZONA_HP1R_SC_NEG_EINT2_SHIFT               3  /* HP1R_SC_NEG_EINT2 */
5939  #define ARIZONA_HP1R_SC_NEG_EINT2_WIDTH               1  /* HP1R_SC_NEG_EINT2 */
5940  #define ARIZONA_HP1R_SC_POS_EINT2                0x0004  /* HP1R_SC_POS_EINT2 */
5941  #define ARIZONA_HP1R_SC_POS_EINT2_MASK           0x0004  /* HP1R_SC_POS_EINT2 */
5942  #define ARIZONA_HP1R_SC_POS_EINT2_SHIFT               2  /* HP1R_SC_POS_EINT2 */
5943  #define ARIZONA_HP1R_SC_POS_EINT2_WIDTH               1  /* HP1R_SC_POS_EINT2 */
5944  #define ARIZONA_HP1L_SC_NEG_EINT2                0x0002  /* HP1L_SC_NEG_EINT2 */
5945  #define ARIZONA_HP1L_SC_NEG_EINT2_MASK           0x0002  /* HP1L_SC_NEG_EINT2 */
5946  #define ARIZONA_HP1L_SC_NEG_EINT2_SHIFT               1  /* HP1L_SC_NEG_EINT2 */
5947  #define ARIZONA_HP1L_SC_NEG_EINT2_WIDTH               1  /* HP1L_SC_NEG_EINT2 */
5948  #define ARIZONA_HP1L_SC_POS_EINT2                0x0001  /* HP1L_SC_POS_EINT2 */
5949  #define ARIZONA_HP1L_SC_POS_EINT2_MASK           0x0001  /* HP1L_SC_POS_EINT2 */
5950  #define ARIZONA_HP1L_SC_POS_EINT2_SHIFT               0  /* HP1L_SC_POS_EINT2 */
5951  #define ARIZONA_HP1L_SC_POS_EINT2_WIDTH               1  /* HP1L_SC_POS_EINT2 */
5952  
5953  /*
5954   * R3352 (0xD18) - IRQ2 Status 1 Mask
5955   */
5956  #define ARIZONA_IM_GP4_EINT2                     0x0008  /* IM_GP4_EINT2 */
5957  #define ARIZONA_IM_GP4_EINT2_MASK                0x0008  /* IM_GP4_EINT2 */
5958  #define ARIZONA_IM_GP4_EINT2_SHIFT                    3  /* IM_GP4_EINT2 */
5959  #define ARIZONA_IM_GP4_EINT2_WIDTH                    1  /* IM_GP4_EINT2 */
5960  #define ARIZONA_IM_GP3_EINT2                     0x0004  /* IM_GP3_EINT2 */
5961  #define ARIZONA_IM_GP3_EINT2_MASK                0x0004  /* IM_GP3_EINT2 */
5962  #define ARIZONA_IM_GP3_EINT2_SHIFT                    2  /* IM_GP3_EINT2 */
5963  #define ARIZONA_IM_GP3_EINT2_WIDTH                    1  /* IM_GP3_EINT2 */
5964  #define ARIZONA_IM_GP2_EINT2                     0x0002  /* IM_GP2_EINT2 */
5965  #define ARIZONA_IM_GP2_EINT2_MASK                0x0002  /* IM_GP2_EINT2 */
5966  #define ARIZONA_IM_GP2_EINT2_SHIFT                    1  /* IM_GP2_EINT2 */
5967  #define ARIZONA_IM_GP2_EINT2_WIDTH                    1  /* IM_GP2_EINT2 */
5968  #define ARIZONA_IM_GP1_EINT2                     0x0001  /* IM_GP1_EINT2 */
5969  #define ARIZONA_IM_GP1_EINT2_MASK                0x0001  /* IM_GP1_EINT2 */
5970  #define ARIZONA_IM_GP1_EINT2_SHIFT                    0  /* IM_GP1_EINT2 */
5971  #define ARIZONA_IM_GP1_EINT2_WIDTH                    1  /* IM_GP1_EINT2 */
5972  
5973  /*
5974   * R3353 (0xD19) - IRQ2 Status 2 Mask
5975   */
5976  #define ARIZONA_IM_DSP1_RAM_RDY_EINT2            0x0100  /* IM_DSP1_RAM_RDY_EINT2 */
5977  #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK       0x0100  /* IM_DSP1_RAM_RDY_EINT2 */
5978  #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_SHIFT           8  /* IM_DSP1_RAM_RDY_EINT2 */
5979  #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_WIDTH           1  /* IM_DSP1_RAM_RDY_EINT2 */
5980  #define ARIZONA_IM_DSP_IRQ2_EINT2                0x0002  /* IM_DSP_IRQ2_EINT2 */
5981  #define ARIZONA_IM_DSP_IRQ2_EINT2_MASK           0x0002  /* IM_DSP_IRQ2_EINT2 */
5982  #define ARIZONA_IM_DSP_IRQ2_EINT2_SHIFT               1  /* IM_DSP_IRQ2_EINT2 */
5983  #define ARIZONA_IM_DSP_IRQ2_EINT2_WIDTH               1  /* IM_DSP_IRQ2_EINT2 */
5984  #define ARIZONA_IM_DSP_IRQ1_EINT2                0x0001  /* IM_DSP_IRQ1_EINT2 */
5985  #define ARIZONA_IM_DSP_IRQ1_EINT2_MASK           0x0001  /* IM_DSP_IRQ1_EINT2 */
5986  #define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT               0  /* IM_DSP_IRQ1_EINT2 */
5987  #define ARIZONA_IM_DSP_IRQ1_EINT2_WIDTH               1  /* IM_DSP_IRQ1_EINT2 */
5988  
5989  /*
5990   * R3354 (0xD1A) - IRQ2 Status 3 Mask
5991   */
5992  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2       0x8000  /* IM_SPK_OVERHEAT_WARN_EINT2 */
5993  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_MASK  0x8000  /* IM_SPK_OVERHEAT_WARN_EINT2 */
5994  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT     15  /* IM_SPK_OVERHEAT_WARN_EINT2 */
5995  #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH      1  /* IM_SPK_OVERHEAT_WARN_EINT2 */
5996  #define ARIZONA_IM_SPK_OVERHEAT_EINT2            0x4000  /* IM_SPK_OVERHEAT_EINT2 */
5997  #define ARIZONA_IM_SPK_OVERHEAT_EINT2_MASK       0x4000  /* IM_SPK_OVERHEAT_EINT2 */
5998  #define ARIZONA_IM_SPK_OVERHEAT_EINT2_SHIFT          14  /* IM_SPK_OVERHEAT_EINT2 */
5999  #define ARIZONA_IM_SPK_OVERHEAT_EINT2_WIDTH           1  /* IM_SPK_OVERHEAT_EINT2 */
6000  #define ARIZONA_IM_HPDET_EINT2                   0x2000  /* IM_HPDET_EINT2 */
6001  #define ARIZONA_IM_HPDET_EINT2_MASK              0x2000  /* IM_HPDET_EINT2 */
6002  #define ARIZONA_IM_HPDET_EINT2_SHIFT                 13  /* IM_HPDET_EINT2 */
6003  #define ARIZONA_IM_HPDET_EINT2_WIDTH                  1  /* IM_HPDET_EINT2 */
6004  #define ARIZONA_IM_MICDET_EINT2                  0x1000  /* IM_MICDET_EINT2 */
6005  #define ARIZONA_IM_MICDET_EINT2_MASK             0x1000  /* IM_MICDET_EINT2 */
6006  #define ARIZONA_IM_MICDET_EINT2_SHIFT                12  /* IM_MICDET_EINT2 */
6007  #define ARIZONA_IM_MICDET_EINT2_WIDTH                 1  /* IM_MICDET_EINT2 */
6008  #define ARIZONA_IM_WSEQ_DONE_EINT2               0x0800  /* IM_WSEQ_DONE_EINT2 */
6009  #define ARIZONA_IM_WSEQ_DONE_EINT2_MASK          0x0800  /* IM_WSEQ_DONE_EINT2 */
6010  #define ARIZONA_IM_WSEQ_DONE_EINT2_SHIFT             11  /* IM_WSEQ_DONE_EINT2 */
6011  #define ARIZONA_IM_WSEQ_DONE_EINT2_WIDTH              1  /* IM_WSEQ_DONE_EINT2 */
6012  #define ARIZONA_IM_DRC2_SIG_DET_EINT2            0x0400  /* IM_DRC2_SIG_DET_EINT2 */
6013  #define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK       0x0400  /* IM_DRC2_SIG_DET_EINT2 */
6014  #define ARIZONA_IM_DRC2_SIG_DET_EINT2_SHIFT          10  /* IM_DRC2_SIG_DET_EINT2 */
6015  #define ARIZONA_IM_DRC2_SIG_DET_EINT2_WIDTH           1  /* IM_DRC2_SIG_DET_EINT2 */
6016  #define ARIZONA_IM_DRC1_SIG_DET_EINT2            0x0200  /* IM_DRC1_SIG_DET_EINT2 */
6017  #define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK       0x0200  /* IM_DRC1_SIG_DET_EINT2 */
6018  #define ARIZONA_IM_DRC1_SIG_DET_EINT2_SHIFT           9  /* IM_DRC1_SIG_DET_EINT2 */
6019  #define ARIZONA_IM_DRC1_SIG_DET_EINT2_WIDTH           1  /* IM_DRC1_SIG_DET_EINT2 */
6020  #define ARIZONA_IM_ASRC2_LOCK_EINT2              0x0100  /* IM_ASRC2_LOCK_EINT2 */
6021  #define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK         0x0100  /* IM_ASRC2_LOCK_EINT2 */
6022  #define ARIZONA_IM_ASRC2_LOCK_EINT2_SHIFT             8  /* IM_ASRC2_LOCK_EINT2 */
6023  #define ARIZONA_IM_ASRC2_LOCK_EINT2_WIDTH             1  /* IM_ASRC2_LOCK_EINT2 */
6024  #define ARIZONA_IM_ASRC1_LOCK_EINT2              0x0080  /* IM_ASRC1_LOCK_EINT2 */
6025  #define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK         0x0080  /* IM_ASRC1_LOCK_EINT2 */
6026  #define ARIZONA_IM_ASRC1_LOCK_EINT2_SHIFT             7  /* IM_ASRC1_LOCK_EINT2 */
6027  #define ARIZONA_IM_ASRC1_LOCK_EINT2_WIDTH             1  /* IM_ASRC1_LOCK_EINT2 */
6028  #define ARIZONA_IM_UNDERCLOCKED_EINT2            0x0040  /* IM_UNDERCLOCKED_EINT2 */
6029  #define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK       0x0040  /* IM_UNDERCLOCKED_EINT2 */
6030  #define ARIZONA_IM_UNDERCLOCKED_EINT2_SHIFT           6  /* IM_UNDERCLOCKED_EINT2 */
6031  #define ARIZONA_IM_UNDERCLOCKED_EINT2_WIDTH           1  /* IM_UNDERCLOCKED_EINT2 */
6032  #define ARIZONA_IM_OVERCLOCKED_EINT2             0x0020  /* IM_OVERCLOCKED_EINT2 */
6033  #define ARIZONA_IM_OVERCLOCKED_EINT2_MASK        0x0020  /* IM_OVERCLOCKED_EINT2 */
6034  #define ARIZONA_IM_OVERCLOCKED_EINT2_SHIFT            5  /* IM_OVERCLOCKED_EINT2 */
6035  #define ARIZONA_IM_OVERCLOCKED_EINT2_WIDTH            1  /* IM_OVERCLOCKED_EINT2 */
6036  #define ARIZONA_IM_FLL2_LOCK_EINT2               0x0008  /* IM_FLL2_LOCK_EINT2 */
6037  #define ARIZONA_IM_FLL2_LOCK_EINT2_MASK          0x0008  /* IM_FLL2_LOCK_EINT2 */
6038  #define ARIZONA_IM_FLL2_LOCK_EINT2_SHIFT              3  /* IM_FLL2_LOCK_EINT2 */
6039  #define ARIZONA_IM_FLL2_LOCK_EINT2_WIDTH              1  /* IM_FLL2_LOCK_EINT2 */
6040  #define ARIZONA_IM_FLL1_LOCK_EINT2               0x0004  /* IM_FLL1_LOCK_EINT2 */
6041  #define ARIZONA_IM_FLL1_LOCK_EINT2_MASK          0x0004  /* IM_FLL1_LOCK_EINT2 */
6042  #define ARIZONA_IM_FLL1_LOCK_EINT2_SHIFT              2  /* IM_FLL1_LOCK_EINT2 */
6043  #define ARIZONA_IM_FLL1_LOCK_EINT2_WIDTH              1  /* IM_FLL1_LOCK_EINT2 */
6044  #define ARIZONA_IM_CLKGEN_ERR_EINT2              0x0002  /* IM_CLKGEN_ERR_EINT2 */
6045  #define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK         0x0002  /* IM_CLKGEN_ERR_EINT2 */
6046  #define ARIZONA_IM_CLKGEN_ERR_EINT2_SHIFT             1  /* IM_CLKGEN_ERR_EINT2 */
6047  #define ARIZONA_IM_CLKGEN_ERR_EINT2_WIDTH             1  /* IM_CLKGEN_ERR_EINT2 */
6048  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2        0x0001  /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6049  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK   0x0001  /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6050  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT       0  /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6051  #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_WIDTH       1  /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6052  
6053  /*
6054   * R3355 (0xD1B) - IRQ2 Status 4 Mask
6055   */
6056  #define ARIZONA_IM_ASRC_CFG_ERR_EINT2            0x8000  /* IM_ASRC_CFG_ERR_EINT2 */
6057  #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK       0x8000  /* IM_ASRC_CFG_ERR_EINT2 */
6058  #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT          15  /* IM_ASRC_CFG_ERR_EINT2 */
6059  #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH           1  /* IM_ASRC_CFG_ERR_EINT2 */
6060  #define ARIZONA_IM_AIF3_ERR_EINT2                0x4000  /* IM_AIF3_ERR_EINT2 */
6061  #define ARIZONA_IM_AIF3_ERR_EINT2_MASK           0x4000  /* IM_AIF3_ERR_EINT2 */
6062  #define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT              14  /* IM_AIF3_ERR_EINT2 */
6063  #define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH               1  /* IM_AIF3_ERR_EINT2 */
6064  #define ARIZONA_IM_AIF2_ERR_EINT2                0x2000  /* IM_AIF2_ERR_EINT2 */
6065  #define ARIZONA_IM_AIF2_ERR_EINT2_MASK           0x2000  /* IM_AIF2_ERR_EINT2 */
6066  #define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT              13  /* IM_AIF2_ERR_EINT2 */
6067  #define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH               1  /* IM_AIF2_ERR_EINT2 */
6068  #define ARIZONA_IM_AIF1_ERR_EINT2                0x1000  /* IM_AIF1_ERR_EINT2 */
6069  #define ARIZONA_IM_AIF1_ERR_EINT2_MASK           0x1000  /* IM_AIF1_ERR_EINT2 */
6070  #define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT              12  /* IM_AIF1_ERR_EINT2 */
6071  #define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH               1  /* IM_AIF1_ERR_EINT2 */
6072  #define ARIZONA_IM_CTRLIF_ERR_EINT2              0x0800  /* IM_CTRLIF_ERR_EINT2 */
6073  #define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK         0x0800  /* IM_CTRLIF_ERR_EINT2 */
6074  #define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT            11  /* IM_CTRLIF_ERR_EINT2 */
6075  #define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH             1  /* IM_CTRLIF_ERR_EINT2 */
6076  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2    0x0400  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6077  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6078  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT     10  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6079  #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH      1  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6080  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2       0x0200  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6081  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK  0x0200  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6082  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT      9  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6083  #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH      1  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6084  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2          0x0100  /* IM_SYSCLK_ENA_LOW_EINT2 */
6085  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK     0x0100  /* IM_SYSCLK_ENA_LOW_EINT2 */
6086  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT         8  /* IM_SYSCLK_ENA_LOW_EINT2 */
6087  #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH         1  /* IM_SYSCLK_ENA_LOW_EINT2 */
6088  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2           0x0080  /* IM_ISRC1_CFG_ERR_EINT2 */
6089  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK      0x0080  /* IM_ISRC1_CFG_ERR_EINT2 */
6090  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT          7  /* IM_ISRC1_CFG_ERR_EINT2 */
6091  #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH          1  /* IM_ISRC1_CFG_ERR_EINT2 */
6092  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2           0x0040  /* IM_ISRC2_CFG_ERR_EINT2 */
6093  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK      0x0040  /* IM_ISRC2_CFG_ERR_EINT2 */
6094  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT          6  /* IM_ISRC2_CFG_ERR_EINT2 */
6095  #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH          1  /* IM_ISRC2_CFG_ERR_EINT2 */
6096  #define ARIZONA_IM_HP3R_DONE_EINT2               0x0020  /* IM_HP3R_DONE_EINT2 */
6097  #define ARIZONA_IM_HP3R_DONE_EINT2_MASK          0x0020  /* IM_HP3R_DONE_EINT2 */
6098  #define ARIZONA_IM_HP3R_DONE_EINT2_SHIFT              5  /* IM_HP3R_DONE_EINT2 */
6099  #define ARIZONA_IM_HP3R_DONE_EINT2_WIDTH              1  /* IM_HP3R_DONE_EINT2 */
6100  #define ARIZONA_IM_HP3L_DONE_EINT2               0x0010  /* IM_HP3L_DONE_EINT2 */
6101  #define ARIZONA_IM_HP3L_DONE_EINT2_MASK          0x0010  /* IM_HP3L_DONE_EINT2 */
6102  #define ARIZONA_IM_HP3L_DONE_EINT2_SHIFT              4  /* IM_HP3L_DONE_EINT2 */
6103  #define ARIZONA_IM_HP3L_DONE_EINT2_WIDTH              1  /* IM_HP3L_DONE_EINT2 */
6104  #define ARIZONA_IM_HP2R_DONE_EINT2               0x0008  /* IM_HP2R_DONE_EINT2 */
6105  #define ARIZONA_IM_HP2R_DONE_EINT2_MASK          0x0008  /* IM_HP2R_DONE_EINT2 */
6106  #define ARIZONA_IM_HP2R_DONE_EINT2_SHIFT              3  /* IM_HP2R_DONE_EINT2 */
6107  #define ARIZONA_IM_HP2R_DONE_EINT2_WIDTH              1  /* IM_HP2R_DONE_EINT2 */
6108  #define ARIZONA_IM_HP2L_DONE_EINT2               0x0004  /* IM_HP2L_DONE_EINT2 */
6109  #define ARIZONA_IM_HP2L_DONE_EINT2_MASK          0x0004  /* IM_HP2L_DONE_EINT2 */
6110  #define ARIZONA_IM_HP2L_DONE_EINT2_SHIFT              2  /* IM_HP2L_DONE_EINT2 */
6111  #define ARIZONA_IM_HP2L_DONE_EINT2_WIDTH              1  /* IM_HP2L_DONE_EINT2 */
6112  #define ARIZONA_IM_HP1R_DONE_EINT2               0x0002  /* IM_HP1R_DONE_EINT2 */
6113  #define ARIZONA_IM_HP1R_DONE_EINT2_MASK          0x0002  /* IM_HP1R_DONE_EINT2 */
6114  #define ARIZONA_IM_HP1R_DONE_EINT2_SHIFT              1  /* IM_HP1R_DONE_EINT2 */
6115  #define ARIZONA_IM_HP1R_DONE_EINT2_WIDTH              1  /* IM_HP1R_DONE_EINT2 */
6116  #define ARIZONA_IM_HP1L_DONE_EINT2               0x0001  /* IM_HP1L_DONE_EINT2 */
6117  #define ARIZONA_IM_HP1L_DONE_EINT2_MASK          0x0001  /* IM_HP1L_DONE_EINT2 */
6118  #define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT              0  /* IM_HP1L_DONE_EINT2 */
6119  #define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH              1  /* IM_HP1L_DONE_EINT2 */
6120  
6121  /*
6122   * R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout)
6123   *
6124   * Alternate layout used on later devices, note only fields that have moved
6125   * are specified
6126   */
6127  #define ARIZONA_V2_IM_AIF3_ERR_EINT2                  0x8000  /* IM_AIF3_ERR_EINT2 */
6128  #define ARIZONA_V2_IM_AIF3_ERR_EINT2_MASK             0x8000  /* IM_AIF3_ERR_EINT2 */
6129  #define ARIZONA_V2_IM_AIF3_ERR_EINT2_SHIFT                15  /* IM_AIF3_ERR_EINT2 */
6130  #define ARIZONA_V2_IM_AIF3_ERR_EINT2_WIDTH                 1  /* IM_AIF3_ERR_EINT2 */
6131  #define ARIZONA_V2_IM_AIF2_ERR_EINT2                  0x4000  /* IM_AIF2_ERR_EINT2 */
6132  #define ARIZONA_V2_IM_AIF2_ERR_EINT2_MASK             0x4000  /* IM_AIF2_ERR_EINT2 */
6133  #define ARIZONA_V2_IM_AIF2_ERR_EINT2_SHIFT                14  /* IM_AIF2_ERR_EINT2 */
6134  #define ARIZONA_V2_IM_AIF2_ERR_EINT2_WIDTH                 1  /* IM_AIF2_ERR_EINT2 */
6135  #define ARIZONA_V2_IM_AIF1_ERR_EINT2                  0x2000  /* IM_AIF1_ERR_EINT2 */
6136  #define ARIZONA_V2_IM_AIF1_ERR_EINT2_MASK             0x2000  /* IM_AIF1_ERR_EINT2 */
6137  #define ARIZONA_V2_IM_AIF1_ERR_EINT2_SHIFT                13  /* IM_AIF1_ERR_EINT2 */
6138  #define ARIZONA_V2_IM_AIF1_ERR_EINT2_WIDTH                 1  /* IM_AIF1_ERR_EINT2 */
6139  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2                0x1000  /* IM_CTRLIF_ERR_EINT2 */
6140  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_MASK           0x1000  /* IM_CTRLIF_ERR_EINT2 */
6141  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_SHIFT              12  /* IM_CTRLIF_ERR_EINT2 */
6142  #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_WIDTH               1  /* IM_CTRLIF_ERR_EINT2 */
6143  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2      0x0800  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6144  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6145  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT    11  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6146  #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH     1  /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6147  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2         0x0400  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6148  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK    0x0400  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6149  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT       10  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6150  #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH        1  /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6151  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2            0x0200  /* IM_SYSCLK_ENA_LOW_EINT2 */
6152  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_MASK       0x0200  /* IM_SYSCLK_ENA_LOW_EINT2 */
6153  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_SHIFT           9  /* IM_SYSCLK_ENA_LOW_EINT2 */
6154  #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_WIDTH           1  /* IM_SYSCLK_ENA_LOW_EINT2 */
6155  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2             0x0100  /* IM_ISRC1_CFG_ERR_EINT2 */
6156  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_MASK        0x0100  /* IM_ISRC1_CFG_ERR_EINT2 */
6157  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_SHIFT            8  /* IM_ISRC1_CFG_ERR_EINT2 */
6158  #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_WIDTH            1  /* IM_ISRC1_CFG_ERR_EINT2 */
6159  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2             0x0080  /* IM_ISRC2_CFG_ERR_EINT2 */
6160  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_MASK        0x0080  /* IM_ISRC2_CFG_ERR_EINT2 */
6161  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_SHIFT            7  /* IM_ISRC2_CFG_ERR_EINT2 */
6162  #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_WIDTH            1  /* IM_ISRC2_CFG_ERR_EINT2 */
6163  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2             0x0040  /* IM_ISRC3_CFG_ERR_EINT2 */
6164  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_MASK        0x0040  /* IM_ISRC3_CFG_ERR_EINT2 */
6165  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_SHIFT            6  /* IM_ISRC3_CFG_ERR_EINT2 */
6166  #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_WIDTH            1  /* IM_ISRC3_CFG_ERR_EINT2 */
6167  
6168  /*
6169   * R3356 (0xD1C) - IRQ2 Status 5 Mask
6170   */
6171  
6172  #define ARIZONA_IM_BOOT_DONE_EINT2               0x0100  /* IM_BOOT_DONE_EINT2 */
6173  #define ARIZONA_IM_BOOT_DONE_EINT2_MASK          0x0100  /* IM_BOOT_DONE_EINT2 */
6174  #define ARIZONA_IM_BOOT_DONE_EINT2_SHIFT              8  /* IM_BOOT_DONE_EINT2 */
6175  #define ARIZONA_IM_BOOT_DONE_EINT2_WIDTH              1  /* IM_BOOT_DONE_EINT2 */
6176  #define ARIZONA_IM_DCS_DAC_DONE_EINT2            0x0080  /* IM_DCS_DAC_DONE_EINT2 */
6177  #define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK       0x0080  /* IM_DCS_DAC_DONE_EINT2 */
6178  #define ARIZONA_IM_DCS_DAC_DONE_EINT2_SHIFT           7  /* IM_DCS_DAC_DONE_EINT2 */
6179  #define ARIZONA_IM_DCS_DAC_DONE_EINT2_WIDTH           1  /* IM_DCS_DAC_DONE_EINT2 */
6180  #define ARIZONA_IM_DCS_HP_DONE_EINT2             0x0040  /* IM_DCS_HP_DONE_EINT2 */
6181  #define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK        0x0040  /* IM_DCS_HP_DONE_EINT2 */
6182  #define ARIZONA_IM_DCS_HP_DONE_EINT2_SHIFT            6  /* IM_DCS_HP_DONE_EINT2 */
6183  #define ARIZONA_IM_DCS_HP_DONE_EINT2_WIDTH            1  /* IM_DCS_HP_DONE_EINT2 */
6184  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2           0x0002  /* IM_FLL2_CLOCK_OK_EINT2 */
6185  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK      0x0002  /* IM_FLL2_CLOCK_OK_EINT2 */
6186  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_SHIFT          1  /* IM_FLL2_CLOCK_OK_EINT2 */
6187  #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_WIDTH          1  /* IM_FLL2_CLOCK_OK_EINT2 */
6188  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2           0x0001  /* IM_FLL1_CLOCK_OK_EINT2 */
6189  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK      0x0001  /* IM_FLL1_CLOCK_OK_EINT2 */
6190  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT          0  /* IM_FLL1_CLOCK_OK_EINT2 */
6191  #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH          1  /* IM_FLL1_CLOCK_OK_EINT2 */
6192  
6193  /*
6194   * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
6195   *
6196   * Alternate layout used on later devices, note only fields that have moved
6197   * are specified
6198   */
6199  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2         0x0008  /* IM_ASRC_CFG_ERR_EINT2 */
6200  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_MASK    0x0008  /* IM_ASRC_CFG_ERR_EINT2 */
6201  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_SHIFT        3  /* IM_ASRC_CFG_ERR_EINT2 */
6202  #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_WIDTH        1  /* IM_ASRC_CFG_ERR_EINT2 */
6203  
6204  /*
6205   * R3357 (0xD1D) - IRQ2 Status 6 Mask
6206   */
6207  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2      0x8000  /* IM_DSP_SHARED_WR_COLL_EINT2 */
6208  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000  /* IM_DSP_SHARED_WR_COLL_EINT2 */
6209  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT    15  /* IM_DSP_SHARED_WR_COLL_EINT2 */
6210  #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH     1  /* IM_DSP_SHARED_WR_COLL_EINT2 */
6211  #define ARIZONA_IM_SPK_SHUTDOWN_EINT2            0x4000  /* IM_SPK_SHUTDOWN_EINT2 */
6212  #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK       0x4000  /* IM_SPK_SHUTDOWN_EINT2 */
6213  #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT          14  /* IM_SPK_SHUTDOWN_EINT2 */
6214  #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH           1  /* IM_SPK_SHUTDOWN_EINT2 */
6215  #define ARIZONA_IM_SPK1R_SHORT_EINT2             0x2000  /* IM_SPK1R_SHORT_EINT2 */
6216  #define ARIZONA_IM_SPK1R_SHORT_EINT2_MASK        0x2000  /* IM_SPK1R_SHORT_EINT2 */
6217  #define ARIZONA_IM_SPK1R_SHORT_EINT2_SHIFT           13  /* IM_SPK1R_SHORT_EINT2 */
6218  #define ARIZONA_IM_SPK1R_SHORT_EINT2_WIDTH            1  /* IM_SPK1R_SHORT_EINT2 */
6219  #define ARIZONA_IM_SPK1L_SHORT_EINT2             0x1000  /* IM_SPK1L_SHORT_EINT2 */
6220  #define ARIZONA_IM_SPK1L_SHORT_EINT2_MASK        0x1000  /* IM_SPK1L_SHORT_EINT2 */
6221  #define ARIZONA_IM_SPK1L_SHORT_EINT2_SHIFT           12  /* IM_SPK1L_SHORT_EINT2 */
6222  #define ARIZONA_IM_SPK1L_SHORT_EINT2_WIDTH            1  /* IM_SPK1L_SHORT_EINT2 */
6223  #define ARIZONA_IM_HP3R_SC_NEG_EINT2             0x0800  /* IM_HP3R_SC_NEG_EINT2 */
6224  #define ARIZONA_IM_HP3R_SC_NEG_EINT2_MASK        0x0800  /* IM_HP3R_SC_NEG_EINT2 */
6225  #define ARIZONA_IM_HP3R_SC_NEG_EINT2_SHIFT           11  /* IM_HP3R_SC_NEG_EINT2 */
6226  #define ARIZONA_IM_HP3R_SC_NEG_EINT2_WIDTH            1  /* IM_HP3R_SC_NEG_EINT2 */
6227  #define ARIZONA_IM_HP3R_SC_POS_EINT2             0x0400  /* IM_HP3R_SC_POS_EINT2 */
6228  #define ARIZONA_IM_HP3R_SC_POS_EINT2_MASK        0x0400  /* IM_HP3R_SC_POS_EINT2 */
6229  #define ARIZONA_IM_HP3R_SC_POS_EINT2_SHIFT           10  /* IM_HP3R_SC_POS_EINT2 */
6230  #define ARIZONA_IM_HP3R_SC_POS_EINT2_WIDTH            1  /* IM_HP3R_SC_POS_EINT2 */
6231  #define ARIZONA_IM_HP3L_SC_NEG_EINT2             0x0200  /* IM_HP3L_SC_NEG_EINT2 */
6232  #define ARIZONA_IM_HP3L_SC_NEG_EINT2_MASK        0x0200  /* IM_HP3L_SC_NEG_EINT2 */
6233  #define ARIZONA_IM_HP3L_SC_NEG_EINT2_SHIFT            9  /* IM_HP3L_SC_NEG_EINT2 */
6234  #define ARIZONA_IM_HP3L_SC_NEG_EINT2_WIDTH            1  /* IM_HP3L_SC_NEG_EINT2 */
6235  #define ARIZONA_IM_HP3L_SC_POS_EINT2             0x0100  /* IM_HP3L_SC_POS_EINT2 */
6236  #define ARIZONA_IM_HP3L_SC_POS_EINT2_MASK        0x0100  /* IM_HP3L_SC_POS_EINT2 */
6237  #define ARIZONA_IM_HP3L_SC_POS_EINT2_SHIFT            8  /* IM_HP3L_SC_POS_EINT2 */
6238  #define ARIZONA_IM_HP3L_SC_POS_EINT2_WIDTH            1  /* IM_HP3L_SC_POS_EINT2 */
6239  #define ARIZONA_IM_HP2R_SC_NEG_EINT2             0x0080  /* IM_HP2R_SC_NEG_EINT2 */
6240  #define ARIZONA_IM_HP2R_SC_NEG_EINT2_MASK        0x0080  /* IM_HP2R_SC_NEG_EINT2 */
6241  #define ARIZONA_IM_HP2R_SC_NEG_EINT2_SHIFT            7  /* IM_HP2R_SC_NEG_EINT2 */
6242  #define ARIZONA_IM_HP2R_SC_NEG_EINT2_WIDTH            1  /* IM_HP2R_SC_NEG_EINT2 */
6243  #define ARIZONA_IM_HP2R_SC_POS_EINT2             0x0040  /* IM_HP2R_SC_POS_EINT2 */
6244  #define ARIZONA_IM_HP2R_SC_POS_EINT2_MASK        0x0040  /* IM_HP2R_SC_POS_EINT2 */
6245  #define ARIZONA_IM_HP2R_SC_POS_EINT2_SHIFT            6  /* IM_HP2R_SC_POS_EINT2 */
6246  #define ARIZONA_IM_HP2R_SC_POS_EINT2_WIDTH            1  /* IM_HP2R_SC_POS_EINT2 */
6247  #define ARIZONA_IM_HP2L_SC_NEG_EINT2             0x0020  /* IM_HP2L_SC_NEG_EINT2 */
6248  #define ARIZONA_IM_HP2L_SC_NEG_EINT2_MASK        0x0020  /* IM_HP2L_SC_NEG_EINT2 */
6249  #define ARIZONA_IM_HP2L_SC_NEG_EINT2_SHIFT            5  /* IM_HP2L_SC_NEG_EINT2 */
6250  #define ARIZONA_IM_HP2L_SC_NEG_EINT2_WIDTH            1  /* IM_HP2L_SC_NEG_EINT2 */
6251  #define ARIZONA_IM_HP2L_SC_POS_EINT2             0x0010  /* IM_HP2L_SC_POS_EINT2 */
6252  #define ARIZONA_IM_HP2L_SC_POS_EINT2_MASK        0x0010  /* IM_HP2L_SC_POS_EINT2 */
6253  #define ARIZONA_IM_HP2L_SC_POS_EINT2_SHIFT            4  /* IM_HP2L_SC_POS_EINT2 */
6254  #define ARIZONA_IM_HP2L_SC_POS_EINT2_WIDTH            1  /* IM_HP2L_SC_POS_EINT2 */
6255  #define ARIZONA_IM_HP1R_SC_NEG_EINT2             0x0008  /* IM_HP1R_SC_NEG_EINT2 */
6256  #define ARIZONA_IM_HP1R_SC_NEG_EINT2_MASK        0x0008  /* IM_HP1R_SC_NEG_EINT2 */
6257  #define ARIZONA_IM_HP1R_SC_NEG_EINT2_SHIFT            3  /* IM_HP1R_SC_NEG_EINT2 */
6258  #define ARIZONA_IM_HP1R_SC_NEG_EINT2_WIDTH            1  /* IM_HP1R_SC_NEG_EINT2 */
6259  #define ARIZONA_IM_HP1R_SC_POS_EINT2             0x0004  /* IM_HP1R_SC_POS_EINT2 */
6260  #define ARIZONA_IM_HP1R_SC_POS_EINT2_MASK        0x0004  /* IM_HP1R_SC_POS_EINT2 */
6261  #define ARIZONA_IM_HP1R_SC_POS_EINT2_SHIFT            2  /* IM_HP1R_SC_POS_EINT2 */
6262  #define ARIZONA_IM_HP1R_SC_POS_EINT2_WIDTH            1  /* IM_HP1R_SC_POS_EINT2 */
6263  #define ARIZONA_IM_HP1L_SC_NEG_EINT2             0x0002  /* IM_HP1L_SC_NEG_EINT2 */
6264  #define ARIZONA_IM_HP1L_SC_NEG_EINT2_MASK        0x0002  /* IM_HP1L_SC_NEG_EINT2 */
6265  #define ARIZONA_IM_HP1L_SC_NEG_EINT2_SHIFT            1  /* IM_HP1L_SC_NEG_EINT2 */
6266  #define ARIZONA_IM_HP1L_SC_NEG_EINT2_WIDTH            1  /* IM_HP1L_SC_NEG_EINT2 */
6267  #define ARIZONA_IM_HP1L_SC_POS_EINT2             0x0001  /* IM_HP1L_SC_POS_EINT2 */
6268  #define ARIZONA_IM_HP1L_SC_POS_EINT2_MASK        0x0001  /* IM_HP1L_SC_POS_EINT2 */
6269  #define ARIZONA_IM_HP1L_SC_POS_EINT2_SHIFT            0  /* IM_HP1L_SC_POS_EINT2 */
6270  #define ARIZONA_IM_HP1L_SC_POS_EINT2_WIDTH            1  /* IM_HP1L_SC_POS_EINT2 */
6271  
6272  /*
6273   * R3359 (0xD1F) - IRQ2 Control
6274   */
6275  #define ARIZONA_IM_IRQ2                          0x0001  /* IM_IRQ2 */
6276  #define ARIZONA_IM_IRQ2_MASK                     0x0001  /* IM_IRQ2 */
6277  #define ARIZONA_IM_IRQ2_SHIFT                         0  /* IM_IRQ2 */
6278  #define ARIZONA_IM_IRQ2_WIDTH                         1  /* IM_IRQ2 */
6279  
6280  /*
6281   * R3360 (0xD20) - Interrupt Raw Status 2
6282   */
6283  #define ARIZONA_DSP1_RAM_RDY_STS                 0x0100  /* DSP1_RAM_RDY_STS */
6284  #define ARIZONA_DSP1_RAM_RDY_STS_MASK            0x0100  /* DSP1_RAM_RDY_STS */
6285  #define ARIZONA_DSP1_RAM_RDY_STS_SHIFT                8  /* DSP1_RAM_RDY_STS */
6286  #define ARIZONA_DSP1_RAM_RDY_STS_WIDTH                1  /* DSP1_RAM_RDY_STS */
6287  #define ARIZONA_DSP_IRQ2_STS                     0x0002  /* DSP_IRQ2_STS */
6288  #define ARIZONA_DSP_IRQ2_STS_MASK                0x0002  /* DSP_IRQ2_STS */
6289  #define ARIZONA_DSP_IRQ2_STS_SHIFT                    1  /* DSP_IRQ2_STS */
6290  #define ARIZONA_DSP_IRQ2_STS_WIDTH                    1  /* DSP_IRQ2_STS */
6291  #define ARIZONA_DSP_IRQ1_STS                     0x0001  /* DSP_IRQ1_STS */
6292  #define ARIZONA_DSP_IRQ1_STS_MASK                0x0001  /* DSP_IRQ1_STS */
6293  #define ARIZONA_DSP_IRQ1_STS_SHIFT                    0  /* DSP_IRQ1_STS */
6294  #define ARIZONA_DSP_IRQ1_STS_WIDTH                    1  /* DSP_IRQ1_STS */
6295  
6296  /*
6297   * R3361 (0xD21) - Interrupt Raw Status 3
6298   */
6299  #define ARIZONA_SPK_OVERHEAT_WARN_STS            0x8000  /* SPK_OVERHEAT_WARN_STS */
6300  #define ARIZONA_SPK_OVERHEAT_WARN_STS_MASK       0x8000  /* SPK_OVERHEAT_WARN_STS */
6301  #define ARIZONA_SPK_OVERHEAT_WARN_STS_SHIFT          15  /* SPK_OVERHEAT_WARN_STS */
6302  #define ARIZONA_SPK_OVERHEAT_WARN_STS_WIDTH           1  /* SPK_OVERHEAT_WARN_STS */
6303  #define ARIZONA_SPK_OVERHEAT_STS                 0x4000  /* SPK_OVERHEAT_STS */
6304  #define ARIZONA_SPK_OVERHEAT_STS_MASK            0x4000  /* SPK_OVERHEAT_STS */
6305  #define ARIZONA_SPK_OVERHEAT_STS_SHIFT               14  /* SPK_OVERHEAT_STS */
6306  #define ARIZONA_SPK_OVERHEAT_STS_WIDTH                1  /* SPK_OVERHEAT_STS */
6307  #define ARIZONA_HPDET_STS                        0x2000  /* HPDET_STS */
6308  #define ARIZONA_HPDET_STS_MASK                   0x2000  /* HPDET_STS */
6309  #define ARIZONA_HPDET_STS_SHIFT                      13  /* HPDET_STS */
6310  #define ARIZONA_HPDET_STS_WIDTH                       1  /* HPDET_STS */
6311  #define ARIZONA_MICDET_STS                       0x1000  /* MICDET_STS */
6312  #define ARIZONA_MICDET_STS_MASK                  0x1000  /* MICDET_STS */
6313  #define ARIZONA_MICDET_STS_SHIFT                     12  /* MICDET_STS */
6314  #define ARIZONA_MICDET_STS_WIDTH                      1  /* MICDET_STS */
6315  #define ARIZONA_WSEQ_DONE_STS                    0x0800  /* WSEQ_DONE_STS */
6316  #define ARIZONA_WSEQ_DONE_STS_MASK               0x0800  /* WSEQ_DONE_STS */
6317  #define ARIZONA_WSEQ_DONE_STS_SHIFT                  11  /* WSEQ_DONE_STS */
6318  #define ARIZONA_WSEQ_DONE_STS_WIDTH                   1  /* WSEQ_DONE_STS */
6319  #define ARIZONA_DRC2_SIG_DET_STS                 0x0400  /* DRC2_SIG_DET_STS */
6320  #define ARIZONA_DRC2_SIG_DET_STS_MASK            0x0400  /* DRC2_SIG_DET_STS */
6321  #define ARIZONA_DRC2_SIG_DET_STS_SHIFT               10  /* DRC2_SIG_DET_STS */
6322  #define ARIZONA_DRC2_SIG_DET_STS_WIDTH                1  /* DRC2_SIG_DET_STS */
6323  #define ARIZONA_DRC1_SIG_DET_STS                 0x0200  /* DRC1_SIG_DET_STS */
6324  #define ARIZONA_DRC1_SIG_DET_STS_MASK            0x0200  /* DRC1_SIG_DET_STS */
6325  #define ARIZONA_DRC1_SIG_DET_STS_SHIFT                9  /* DRC1_SIG_DET_STS */
6326  #define ARIZONA_DRC1_SIG_DET_STS_WIDTH                1  /* DRC1_SIG_DET_STS */
6327  #define ARIZONA_ASRC2_LOCK_STS                   0x0100  /* ASRC2_LOCK_STS */
6328  #define ARIZONA_ASRC2_LOCK_STS_MASK              0x0100  /* ASRC2_LOCK_STS */
6329  #define ARIZONA_ASRC2_LOCK_STS_SHIFT                  8  /* ASRC2_LOCK_STS */
6330  #define ARIZONA_ASRC2_LOCK_STS_WIDTH                  1  /* ASRC2_LOCK_STS */
6331  #define ARIZONA_ASRC1_LOCK_STS                   0x0080  /* ASRC1_LOCK_STS */
6332  #define ARIZONA_ASRC1_LOCK_STS_MASK              0x0080  /* ASRC1_LOCK_STS */
6333  #define ARIZONA_ASRC1_LOCK_STS_SHIFT                  7  /* ASRC1_LOCK_STS */
6334  #define ARIZONA_ASRC1_LOCK_STS_WIDTH                  1  /* ASRC1_LOCK_STS */
6335  #define ARIZONA_UNDERCLOCKED_STS                 0x0040  /* UNDERCLOCKED_STS */
6336  #define ARIZONA_UNDERCLOCKED_STS_MASK            0x0040  /* UNDERCLOCKED_STS */
6337  #define ARIZONA_UNDERCLOCKED_STS_SHIFT                6  /* UNDERCLOCKED_STS */
6338  #define ARIZONA_UNDERCLOCKED_STS_WIDTH                1  /* UNDERCLOCKED_STS */
6339  #define ARIZONA_OVERCLOCKED_STS                  0x0020  /* OVERCLOCKED_STS */
6340  #define ARIZONA_OVERCLOCKED_STS_MASK             0x0020  /* OVERCLOCKED_STS */
6341  #define ARIZONA_OVERCLOCKED_STS_SHIFT                 5  /* OVERCLOCKED_STS */
6342  #define ARIZONA_OVERCLOCKED_STS_WIDTH                 1  /* OVERCLOCKED_STS */
6343  #define ARIZONA_FLL2_LOCK_STS                    0x0008  /* FLL2_LOCK_STS */
6344  #define ARIZONA_FLL2_LOCK_STS_MASK               0x0008  /* FLL2_LOCK_STS */
6345  #define ARIZONA_FLL2_LOCK_STS_SHIFT                   3  /* FLL2_LOCK_STS */
6346  #define ARIZONA_FLL2_LOCK_STS_WIDTH                   1  /* FLL2_LOCK_STS */
6347  #define ARIZONA_FLL1_LOCK_STS                    0x0004  /* FLL1_LOCK_STS */
6348  #define ARIZONA_FLL1_LOCK_STS_MASK               0x0004  /* FLL1_LOCK_STS */
6349  #define ARIZONA_FLL1_LOCK_STS_SHIFT                   2  /* FLL1_LOCK_STS */
6350  #define ARIZONA_FLL1_LOCK_STS_WIDTH                   1  /* FLL1_LOCK_STS */
6351  #define ARIZONA_CLKGEN_ERR_STS                   0x0002  /* CLKGEN_ERR_STS */
6352  #define ARIZONA_CLKGEN_ERR_STS_MASK              0x0002  /* CLKGEN_ERR_STS */
6353  #define ARIZONA_CLKGEN_ERR_STS_SHIFT                  1  /* CLKGEN_ERR_STS */
6354  #define ARIZONA_CLKGEN_ERR_STS_WIDTH                  1  /* CLKGEN_ERR_STS */
6355  #define ARIZONA_CLKGEN_ERR_ASYNC_STS             0x0001  /* CLKGEN_ERR_ASYNC_STS */
6356  #define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK        0x0001  /* CLKGEN_ERR_ASYNC_STS */
6357  #define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT            0  /* CLKGEN_ERR_ASYNC_STS */
6358  #define ARIZONA_CLKGEN_ERR_ASYNC_STS_WIDTH            1  /* CLKGEN_ERR_ASYNC_STS */
6359  
6360  /*
6361   * R3362 (0xD22) - Interrupt Raw Status 4
6362   */
6363  #define ARIZONA_ASRC_CFG_ERR_STS                 0x8000  /* ASRC_CFG_ERR_STS */
6364  #define ARIZONA_ASRC_CFG_ERR_STS_MASK            0x8000  /* ASRC_CFG_ERR_STS */
6365  #define ARIZONA_ASRC_CFG_ERR_STS_SHIFT               15  /* ASRC_CFG_ERR_STS */
6366  #define ARIZONA_ASRC_CFG_ERR_STS_WIDTH                1  /* ASRC_CFG_ERR_STS */
6367  #define ARIZONA_AIF3_ERR_STS                     0x4000  /* AIF3_ERR_STS */
6368  #define ARIZONA_AIF3_ERR_STS_MASK                0x4000  /* AIF3_ERR_STS */
6369  #define ARIZONA_AIF3_ERR_STS_SHIFT                   14  /* AIF3_ERR_STS */
6370  #define ARIZONA_AIF3_ERR_STS_WIDTH                    1  /* AIF3_ERR_STS */
6371  #define ARIZONA_AIF2_ERR_STS                     0x2000  /* AIF2_ERR_STS */
6372  #define ARIZONA_AIF2_ERR_STS_MASK                0x2000  /* AIF2_ERR_STS */
6373  #define ARIZONA_AIF2_ERR_STS_SHIFT                   13  /* AIF2_ERR_STS */
6374  #define ARIZONA_AIF2_ERR_STS_WIDTH                    1  /* AIF2_ERR_STS */
6375  #define ARIZONA_AIF1_ERR_STS                     0x1000  /* AIF1_ERR_STS */
6376  #define ARIZONA_AIF1_ERR_STS_MASK                0x1000  /* AIF1_ERR_STS */
6377  #define ARIZONA_AIF1_ERR_STS_SHIFT                   12  /* AIF1_ERR_STS */
6378  #define ARIZONA_AIF1_ERR_STS_WIDTH                    1  /* AIF1_ERR_STS */
6379  #define ARIZONA_CTRLIF_ERR_STS                   0x0800  /* CTRLIF_ERR_STS */
6380  #define ARIZONA_CTRLIF_ERR_STS_MASK              0x0800  /* CTRLIF_ERR_STS */
6381  #define ARIZONA_CTRLIF_ERR_STS_SHIFT                 11  /* CTRLIF_ERR_STS */
6382  #define ARIZONA_CTRLIF_ERR_STS_WIDTH                  1  /* CTRLIF_ERR_STS */
6383  #define ARIZONA_MIXER_DROPPED_SAMPLE_STS         0x0400  /* MIXER_DROPPED_SAMPLE_STS */
6384  #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK    0x0400  /* MIXER_DROPPED_SAMPLE_STS */
6385  #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_SHIFT       10  /* MIXER_DROPPED_SAMPLE_STS */
6386  #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_WIDTH        1  /* MIXER_DROPPED_SAMPLE_STS */
6387  #define ARIZONA_ASYNC_CLK_ENA_LOW_STS            0x0200  /* ASYNC_CLK_ENA_LOW_STS */
6388  #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK       0x0200  /* ASYNC_CLK_ENA_LOW_STS */
6389  #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_SHIFT           9  /* ASYNC_CLK_ENA_LOW_STS */
6390  #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_WIDTH           1  /* ASYNC_CLK_ENA_LOW_STS */
6391  #define ARIZONA_SYSCLK_ENA_LOW_STS               0x0100  /* SYSCLK_ENA_LOW_STS */
6392  #define ARIZONA_SYSCLK_ENA_LOW_STS_MASK          0x0100  /* SYSCLK_ENA_LOW_STS */
6393  #define ARIZONA_SYSCLK_ENA_LOW_STS_SHIFT              8  /* SYSCLK_ENA_LOW_STS */
6394  #define ARIZONA_SYSCLK_ENA_LOW_STS_WIDTH              1  /* SYSCLK_ENA_LOW_STS */
6395  #define ARIZONA_ISRC1_CFG_ERR_STS                0x0080  /* ISRC1_CFG_ERR_STS */
6396  #define ARIZONA_ISRC1_CFG_ERR_STS_MASK           0x0080  /* ISRC1_CFG_ERR_STS */
6397  #define ARIZONA_ISRC1_CFG_ERR_STS_SHIFT               7  /* ISRC1_CFG_ERR_STS */
6398  #define ARIZONA_ISRC1_CFG_ERR_STS_WIDTH               1  /* ISRC1_CFG_ERR_STS */
6399  #define ARIZONA_ISRC2_CFG_ERR_STS                0x0040  /* ISRC2_CFG_ERR_STS */
6400  #define ARIZONA_ISRC2_CFG_ERR_STS_MASK           0x0040  /* ISRC2_CFG_ERR_STS */
6401  #define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT               6  /* ISRC2_CFG_ERR_STS */
6402  #define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH               1  /* ISRC2_CFG_ERR_STS */
6403  #define ARIZONA_HP3R_DONE_STS                    0x0020  /* HP3R_DONE_STS */
6404  #define ARIZONA_HP3R_DONE_STS_MASK               0x0020  /* HP3R_DONE_STS */
6405  #define ARIZONA_HP3R_DONE_STS_SHIFT                   5  /* HP3R_DONE_STS */
6406  #define ARIZONA_HP3R_DONE_STS_WIDTH                   1  /* HP3R_DONE_STS */
6407  #define ARIZONA_HP3L_DONE_STS                    0x0010  /* HP3L_DONE_STS */
6408  #define ARIZONA_HP3L_DONE_STS_MASK               0x0010  /* HP3L_DONE_STS */
6409  #define ARIZONA_HP3L_DONE_STS_SHIFT                   4  /* HP3L_DONE_STS */
6410  #define ARIZONA_HP3L_DONE_STS_WIDTH                   1  /* HP3L_DONE_STS */
6411  #define ARIZONA_HP2R_DONE_STS                    0x0008  /* HP2R_DONE_STS */
6412  #define ARIZONA_HP2R_DONE_STS_MASK               0x0008  /* HP2R_DONE_STS */
6413  #define ARIZONA_HP2R_DONE_STS_SHIFT                   3  /* HP2R_DONE_STS */
6414  #define ARIZONA_HP2R_DONE_STS_WIDTH                   1  /* HP2R_DONE_STS */
6415  #define ARIZONA_HP2L_DONE_STS                    0x0004  /* HP2L_DONE_STS */
6416  #define ARIZONA_HP2L_DONE_STS_MASK               0x0004  /* HP2L_DONE_STS */
6417  #define ARIZONA_HP2L_DONE_STS_SHIFT                   2  /* HP2L_DONE_STS */
6418  #define ARIZONA_HP2L_DONE_STS_WIDTH                   1  /* HP2L_DONE_STS */
6419  #define ARIZONA_HP1R_DONE_STS                    0x0002  /* HP1R_DONE_STS */
6420  #define ARIZONA_HP1R_DONE_STS_MASK               0x0002  /* HP1R_DONE_STS */
6421  #define ARIZONA_HP1R_DONE_STS_SHIFT                   1  /* HP1R_DONE_STS */
6422  #define ARIZONA_HP1R_DONE_STS_WIDTH                   1  /* HP1R_DONE_STS */
6423  #define ARIZONA_HP1L_DONE_STS                    0x0001  /* HP1L_DONE_STS */
6424  #define ARIZONA_HP1L_DONE_STS_MASK               0x0001  /* HP1L_DONE_STS */
6425  #define ARIZONA_HP1L_DONE_STS_SHIFT                   0  /* HP1L_DONE_STS */
6426  #define ARIZONA_HP1L_DONE_STS_WIDTH                   1  /* HP1L_DONE_STS */
6427  
6428  /*
6429   * R3363 (0xD23) - Interrupt Raw Status 5
6430   */
6431  #define ARIZONA_BOOT_DONE_STS                    0x0100  /* BOOT_DONE_STS */
6432  #define ARIZONA_BOOT_DONE_STS_MASK               0x0100  /* BOOT_DONE_STS */
6433  #define ARIZONA_BOOT_DONE_STS_SHIFT                   8  /* BOOT_DONE_STS */
6434  #define ARIZONA_BOOT_DONE_STS_WIDTH                   1  /* BOOT_DONE_STS */
6435  #define ARIZONA_DCS_DAC_DONE_STS                 0x0080  /* DCS_DAC_DONE_STS */
6436  #define ARIZONA_DCS_DAC_DONE_STS_MASK            0x0080  /* DCS_DAC_DONE_STS */
6437  #define ARIZONA_DCS_DAC_DONE_STS_SHIFT                7  /* DCS_DAC_DONE_STS */
6438  #define ARIZONA_DCS_DAC_DONE_STS_WIDTH                1  /* DCS_DAC_DONE_STS */
6439  #define ARIZONA_DCS_HP_DONE_STS                  0x0040  /* DCS_HP_DONE_STS */
6440  #define ARIZONA_DCS_HP_DONE_STS_MASK             0x0040  /* DCS_HP_DONE_STS */
6441  #define ARIZONA_DCS_HP_DONE_STS_SHIFT                 6  /* DCS_HP_DONE_STS */
6442  #define ARIZONA_DCS_HP_DONE_STS_WIDTH                 1  /* DCS_HP_DONE_STS */
6443  #define ARIZONA_FLL2_CLOCK_OK_STS                0x0002  /* FLL2_CLOCK_OK_STS */
6444  #define ARIZONA_FLL2_CLOCK_OK_STS_MASK           0x0002  /* FLL2_CLOCK_OK_STS */
6445  #define ARIZONA_FLL2_CLOCK_OK_STS_SHIFT               1  /* FLL2_CLOCK_OK_STS */
6446  #define ARIZONA_FLL2_CLOCK_OK_STS_WIDTH               1  /* FLL2_CLOCK_OK_STS */
6447  #define ARIZONA_FLL1_CLOCK_OK_STS                0x0001  /* FLL1_CLOCK_OK_STS */
6448  #define ARIZONA_FLL1_CLOCK_OK_STS_MASK           0x0001  /* FLL1_CLOCK_OK_STS */
6449  #define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT               0  /* FLL1_CLOCK_OK_STS */
6450  #define ARIZONA_FLL1_CLOCK_OK_STS_WIDTH               1  /* FLL1_CLOCK_OK_STS */
6451  
6452  /*
6453   * R3364 (0xD24) - Interrupt Raw Status 6
6454   */
6455  #define ARIZONA_PWM_OVERCLOCKED_STS              0x2000  /* PWM_OVERCLOCKED_STS */
6456  #define ARIZONA_PWM_OVERCLOCKED_STS_MASK         0x2000  /* PWM_OVERCLOCKED_STS */
6457  #define ARIZONA_PWM_OVERCLOCKED_STS_SHIFT            13  /* PWM_OVERCLOCKED_STS */
6458  #define ARIZONA_PWM_OVERCLOCKED_STS_WIDTH             1  /* PWM_OVERCLOCKED_STS */
6459  #define ARIZONA_FX_CORE_OVERCLOCKED_STS          0x1000  /* FX_CORE_OVERCLOCKED_STS */
6460  #define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK     0x1000  /* FX_CORE_OVERCLOCKED_STS */
6461  #define ARIZONA_FX_CORE_OVERCLOCKED_STS_SHIFT        12  /* FX_CORE_OVERCLOCKED_STS */
6462  #define ARIZONA_FX_CORE_OVERCLOCKED_STS_WIDTH         1  /* FX_CORE_OVERCLOCKED_STS */
6463  #define ARIZONA_DAC_SYS_OVERCLOCKED_STS          0x0400  /* DAC_SYS_OVERCLOCKED_STS */
6464  #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK     0x0400  /* DAC_SYS_OVERCLOCKED_STS */
6465  #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_SHIFT        10  /* DAC_SYS_OVERCLOCKED_STS */
6466  #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_WIDTH         1  /* DAC_SYS_OVERCLOCKED_STS */
6467  #define ARIZONA_DAC_WARP_OVERCLOCKED_STS         0x0200  /* DAC_WARP_OVERCLOCKED_STS */
6468  #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK    0x0200  /* DAC_WARP_OVERCLOCKED_STS */
6469  #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_SHIFT        9  /* DAC_WARP_OVERCLOCKED_STS */
6470  #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_WIDTH        1  /* DAC_WARP_OVERCLOCKED_STS */
6471  #define ARIZONA_ADC_OVERCLOCKED_STS              0x0100  /* ADC_OVERCLOCKED_STS */
6472  #define ARIZONA_ADC_OVERCLOCKED_STS_MASK         0x0100  /* ADC_OVERCLOCKED_STS */
6473  #define ARIZONA_ADC_OVERCLOCKED_STS_SHIFT             8  /* ADC_OVERCLOCKED_STS */
6474  #define ARIZONA_ADC_OVERCLOCKED_STS_WIDTH             1  /* ADC_OVERCLOCKED_STS */
6475  #define ARIZONA_MIXER_OVERCLOCKED_STS            0x0080  /* MIXER_OVERCLOCKED_STS */
6476  #define ARIZONA_MIXER_OVERCLOCKED_STS_MASK       0x0080  /* MIXER_OVERCLOCKED_STS */
6477  #define ARIZONA_MIXER_OVERCLOCKED_STS_SHIFT           7  /* MIXER_OVERCLOCKED_STS */
6478  #define ARIZONA_MIXER_OVERCLOCKED_STS_WIDTH           1  /* MIXER_OVERCLOCKED_STS */
6479  #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS       0x0040  /* AIF3_ASYNC_OVERCLOCKED_STS */
6480  #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK  0x0040  /* AIF3_ASYNC_OVERCLOCKED_STS */
6481  #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_SHIFT      6  /* AIF3_ASYNC_OVERCLOCKED_STS */
6482  #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_WIDTH      1  /* AIF3_ASYNC_OVERCLOCKED_STS */
6483  #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS       0x0020  /* AIF2_ASYNC_OVERCLOCKED_STS */
6484  #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK  0x0020  /* AIF2_ASYNC_OVERCLOCKED_STS */
6485  #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_SHIFT      5  /* AIF2_ASYNC_OVERCLOCKED_STS */
6486  #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_WIDTH      1  /* AIF2_ASYNC_OVERCLOCKED_STS */
6487  #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS       0x0010  /* AIF1_ASYNC_OVERCLOCKED_STS */
6488  #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK  0x0010  /* AIF1_ASYNC_OVERCLOCKED_STS */
6489  #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_SHIFT      4  /* AIF1_ASYNC_OVERCLOCKED_STS */
6490  #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_WIDTH      1  /* AIF1_ASYNC_OVERCLOCKED_STS */
6491  #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS        0x0008  /* AIF3_SYNC_OVERCLOCKED_STS */
6492  #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK   0x0008  /* AIF3_SYNC_OVERCLOCKED_STS */
6493  #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_SHIFT       3  /* AIF3_SYNC_OVERCLOCKED_STS */
6494  #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_WIDTH       1  /* AIF3_SYNC_OVERCLOCKED_STS */
6495  #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS        0x0004  /* AIF2_SYNC_OVERCLOCKED_STS */
6496  #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK   0x0004  /* AIF2_SYNC_OVERCLOCKED_STS */
6497  #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_SHIFT       2  /* AIF2_SYNC_OVERCLOCKED_STS */
6498  #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_WIDTH       1  /* AIF2_SYNC_OVERCLOCKED_STS */
6499  #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS        0x0002  /* AIF1_SYNC_OVERCLOCKED_STS */
6500  #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK   0x0002  /* AIF1_SYNC_OVERCLOCKED_STS */
6501  #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_SHIFT       1  /* AIF1_SYNC_OVERCLOCKED_STS */
6502  #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_WIDTH       1  /* AIF1_SYNC_OVERCLOCKED_STS */
6503  #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS         0x0001  /* PAD_CTRL_OVERCLOCKED_STS */
6504  #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK    0x0001  /* PAD_CTRL_OVERCLOCKED_STS */
6505  #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT        0  /* PAD_CTRL_OVERCLOCKED_STS */
6506  #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_WIDTH        1  /* PAD_CTRL_OVERCLOCKED_STS */
6507  
6508  /*
6509   * R3365 (0xD25) - Interrupt Raw Status 7
6510   */
6511  #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS   0x8000  /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6512  #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000  /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6513  #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT     15  /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6514  #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH      1  /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6515  #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS    0x4000  /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6516  #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000  /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6517  #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT     14  /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6518  #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH      1  /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6519  #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS     0x2000  /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6520  #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000  /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6521  #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT     13  /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6522  #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH      1  /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6523  #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS   0x1000  /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6524  #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000  /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6525  #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT     12  /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6526  #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH      1  /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6527  #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS  0x0800  /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6528  #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK 0x0800  /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6529  #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT     11  /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6530  #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH      1  /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6531  #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS    0x0400  /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6532  #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400  /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6533  #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT     10  /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6534  #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH      1  /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6535  #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS   0x0200  /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6536  #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200  /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6537  #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT      9  /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6538  #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH      1  /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6539  #define ARIZONA_ADSP2_1_OVERCLOCKED_STS          0x0008  /* ADSP2_1_OVERCLOCKED_STS */
6540  #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK     0x0008  /* ADSP2_1_OVERCLOCKED_STS */
6541  #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT         3  /* ADSP2_1_OVERCLOCKED_STS */
6542  #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH         1  /* ADSP2_1_OVERCLOCKED_STS */
6543  #define ARIZONA_ISRC3_OVERCLOCKED_STS            0x0004  /* ISRC3_OVERCLOCKED_STS */
6544  #define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK       0x0004  /* ISRC3_OVERCLOCKED_STS */
6545  #define ARIZONA_ISRC3_OVERCLOCKED_STS_SHIFT           2  /* ISRC3_OVERCLOCKED_STS */
6546  #define ARIZONA_ISRC3_OVERCLOCKED_STS_WIDTH           1  /* ISRC3_OVERCLOCKED_STS */
6547  #define ARIZONA_ISRC2_OVERCLOCKED_STS            0x0002  /* ISRC2_OVERCLOCKED_STS */
6548  #define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK       0x0002  /* ISRC2_OVERCLOCKED_STS */
6549  #define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT           1  /* ISRC2_OVERCLOCKED_STS */
6550  #define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH           1  /* ISRC2_OVERCLOCKED_STS */
6551  #define ARIZONA_ISRC1_OVERCLOCKED_STS            0x0001  /* ISRC1_OVERCLOCKED_STS */
6552  #define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK       0x0001  /* ISRC1_OVERCLOCKED_STS */
6553  #define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT           0  /* ISRC1_OVERCLOCKED_STS */
6554  #define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH           1  /* ISRC1_OVERCLOCKED_STS */
6555  
6556  /*
6557   * R3366 (0xD26) - Interrupt Raw Status 8
6558   */
6559  #define ARIZONA_SPDIF_OVERCLOCKED_STS            0x8000  /* SPDIF_OVERCLOCKED_STS */
6560  #define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK       0x8000  /* SPDIF_OVERCLOCKED_STS */
6561  #define ARIZONA_SPDIF_OVERCLOCKED_STS_SHIFT          15  /* SPDIF_OVERCLOCKED_STS */
6562  #define ARIZONA_SPDIF_OVERCLOCKED_STS_WIDTH           1  /* SPDIF_OVERCLOCKED_STS */
6563  #define ARIZONA_AIF3_UNDERCLOCKED_STS            0x0400  /* AIF3_UNDERCLOCKED_STS */
6564  #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK       0x0400  /* AIF3_UNDERCLOCKED_STS */
6565  #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT          10  /* AIF3_UNDERCLOCKED_STS */
6566  #define ARIZONA_AIF3_UNDERCLOCKED_STS_WIDTH           1  /* AIF3_UNDERCLOCKED_STS */
6567  #define ARIZONA_AIF2_UNDERCLOCKED_STS            0x0200  /* AIF2_UNDERCLOCKED_STS */
6568  #define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK       0x0200  /* AIF2_UNDERCLOCKED_STS */
6569  #define ARIZONA_AIF2_UNDERCLOCKED_STS_SHIFT           9  /* AIF2_UNDERCLOCKED_STS */
6570  #define ARIZONA_AIF2_UNDERCLOCKED_STS_WIDTH           1  /* AIF2_UNDERCLOCKED_STS */
6571  #define ARIZONA_AIF1_UNDERCLOCKED_STS            0x0100  /* AIF1_UNDERCLOCKED_STS */
6572  #define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK       0x0100  /* AIF1_UNDERCLOCKED_STS */
6573  #define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT           8  /* AIF1_UNDERCLOCKED_STS */
6574  #define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH           1  /* AIF1_UNDERCLOCKED_STS */
6575  #define ARIZONA_ISRC3_UNDERCLOCKED_STS           0x0080  /* ISRC3_UNDERCLOCKED_STS */
6576  #define ARIZONA_ISRC3_UNDERCLOCKED_STS_MASK      0x0080  /* ISRC3_UNDERCLOCKED_STS */
6577  #define ARIZONA_ISRC3_UNDERCLOCKED_STS_SHIFT          7  /* ISRC3_UNDERCLOCKED_STS */
6578  #define ARIZONA_ISRC3_UNDERCLOCKED_STS_WIDTH          1  /* ISRC3_UNDERCLOCKED_STS */
6579  #define ARIZONA_ISRC2_UNDERCLOCKED_STS           0x0040  /* ISRC2_UNDERCLOCKED_STS */
6580  #define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK      0x0040  /* ISRC2_UNDERCLOCKED_STS */
6581  #define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT          6  /* ISRC2_UNDERCLOCKED_STS */
6582  #define ARIZONA_ISRC2_UNDERCLOCKED_STS_WIDTH          1  /* ISRC2_UNDERCLOCKED_STS */
6583  #define ARIZONA_ISRC1_UNDERCLOCKED_STS           0x0020  /* ISRC1_UNDERCLOCKED_STS */
6584  #define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK      0x0020  /* ISRC1_UNDERCLOCKED_STS */
6585  #define ARIZONA_ISRC1_UNDERCLOCKED_STS_SHIFT          5  /* ISRC1_UNDERCLOCKED_STS */
6586  #define ARIZONA_ISRC1_UNDERCLOCKED_STS_WIDTH          1  /* ISRC1_UNDERCLOCKED_STS */
6587  #define ARIZONA_FX_UNDERCLOCKED_STS              0x0010  /* FX_UNDERCLOCKED_STS */
6588  #define ARIZONA_FX_UNDERCLOCKED_STS_MASK         0x0010  /* FX_UNDERCLOCKED_STS */
6589  #define ARIZONA_FX_UNDERCLOCKED_STS_SHIFT             4  /* FX_UNDERCLOCKED_STS */
6590  #define ARIZONA_FX_UNDERCLOCKED_STS_WIDTH             1  /* FX_UNDERCLOCKED_STS */
6591  #define ARIZONA_ASRC_UNDERCLOCKED_STS            0x0008  /* ASRC_UNDERCLOCKED_STS */
6592  #define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK       0x0008  /* ASRC_UNDERCLOCKED_STS */
6593  #define ARIZONA_ASRC_UNDERCLOCKED_STS_SHIFT           3  /* ASRC_UNDERCLOCKED_STS */
6594  #define ARIZONA_ASRC_UNDERCLOCKED_STS_WIDTH           1  /* ASRC_UNDERCLOCKED_STS */
6595  #define ARIZONA_DAC_UNDERCLOCKED_STS             0x0004  /* DAC_UNDERCLOCKED_STS */
6596  #define ARIZONA_DAC_UNDERCLOCKED_STS_MASK        0x0004  /* DAC_UNDERCLOCKED_STS */
6597  #define ARIZONA_DAC_UNDERCLOCKED_STS_SHIFT            2  /* DAC_UNDERCLOCKED_STS */
6598  #define ARIZONA_DAC_UNDERCLOCKED_STS_WIDTH            1  /* DAC_UNDERCLOCKED_STS */
6599  #define ARIZONA_ADC_UNDERCLOCKED_STS             0x0002  /* ADC_UNDERCLOCKED_STS */
6600  #define ARIZONA_ADC_UNDERCLOCKED_STS_MASK        0x0002  /* ADC_UNDERCLOCKED_STS */
6601  #define ARIZONA_ADC_UNDERCLOCKED_STS_SHIFT            1  /* ADC_UNDERCLOCKED_STS */
6602  #define ARIZONA_ADC_UNDERCLOCKED_STS_WIDTH            1  /* ADC_UNDERCLOCKED_STS */
6603  #define ARIZONA_MIXER_UNDERCLOCKED_STS           0x0001  /* MIXER_UNDERCLOCKED_STS */
6604  #define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK      0x0001  /* MIXER_UNDERCLOCKED_STS */
6605  #define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT          0  /* MIXER_UNDERCLOCKED_STS */
6606  #define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH          1  /* MIXER_UNDERCLOCKED_STS */
6607  
6608  /*
6609   * R3368 (0xD28) - Interrupt Raw Status 9
6610   */
6611  #define ARIZONA_DSP_SHARED_WR_COLL_STS           0x8000  /* DSP_SHARED_WR_COLL_STS */
6612  #define ARIZONA_DSP_SHARED_WR_COLL_STS_MASK      0x8000  /* DSP_SHARED_WR_COLL_STS */
6613  #define ARIZONA_DSP_SHARED_WR_COLL_STS_SHIFT         15  /* DSP_SHARED_WR_COLL_STS */
6614  #define ARIZONA_DSP_SHARED_WR_COLL_STS_WIDTH          1  /* DSP_SHARED_WR_COLL_STS */
6615  #define ARIZONA_SPK_SHUTDOWN_STS                 0x4000  /* SPK_SHUTDOWN_STS */
6616  #define ARIZONA_SPK_SHUTDOWN_STS_MASK            0x4000  /* SPK_SHUTDOWN_STS */
6617  #define ARIZONA_SPK_SHUTDOWN_STS_SHIFT               14  /* SPK_SHUTDOWN_STS */
6618  #define ARIZONA_SPK_SHUTDOWN_STS_WIDTH                1  /* SPK_SHUTDOWN_STS */
6619  #define ARIZONA_SPK1R_SHORT_STS                  0x2000  /* SPK1R_SHORT_STS */
6620  #define ARIZONA_SPK1R_SHORT_STS_MASK             0x2000  /* SPK1R_SHORT_STS */
6621  #define ARIZONA_SPK1R_SHORT_STS_SHIFT                13  /* SPK1R_SHORT_STS */
6622  #define ARIZONA_SPK1R_SHORT_STS_WIDTH                 1  /* SPK1R_SHORT_STS */
6623  #define ARIZONA_SPK1L_SHORT_STS                  0x1000  /* SPK1L_SHORT_STS */
6624  #define ARIZONA_SPK1L_SHORT_STS_MASK             0x1000  /* SPK1L_SHORT_STS */
6625  #define ARIZONA_SPK1L_SHORT_STS_SHIFT                12  /* SPK1L_SHORT_STS */
6626  #define ARIZONA_SPK1L_SHORT_STS_WIDTH                 1  /* SPK1L_SHORT_STS */
6627  #define ARIZONA_HP3R_SC_NEG_STS                  0x0800  /* HP3R_SC_NEG_STS */
6628  #define ARIZONA_HP3R_SC_NEG_STS_MASK             0x0800  /* HP3R_SC_NEG_STS */
6629  #define ARIZONA_HP3R_SC_NEG_STS_SHIFT                11  /* HP3R_SC_NEG_STS */
6630  #define ARIZONA_HP3R_SC_NEG_STS_WIDTH                 1  /* HP3R_SC_NEG_STS */
6631  #define ARIZONA_HP3R_SC_POS_STS                  0x0400  /* HP3R_SC_POS_STS */
6632  #define ARIZONA_HP3R_SC_POS_STS_MASK             0x0400  /* HP3R_SC_POS_STS */
6633  #define ARIZONA_HP3R_SC_POS_STS_SHIFT                10  /* HP3R_SC_POS_STS */
6634  #define ARIZONA_HP3R_SC_POS_STS_WIDTH                 1  /* HP3R_SC_POS_STS */
6635  #define ARIZONA_HP3L_SC_NEG_STS                  0x0200  /* HP3L_SC_NEG_STS */
6636  #define ARIZONA_HP3L_SC_NEG_STS_MASK             0x0200  /* HP3L_SC_NEG_STS */
6637  #define ARIZONA_HP3L_SC_NEG_STS_SHIFT                 9  /* HP3L_SC_NEG_STS */
6638  #define ARIZONA_HP3L_SC_NEG_STS_WIDTH                 1  /* HP3L_SC_NEG_STS */
6639  #define ARIZONA_HP3L_SC_POS_STS                  0x0100  /* HP3L_SC_POS_STS */
6640  #define ARIZONA_HP3L_SC_POS_STS_MASK             0x0100  /* HP3L_SC_POS_STS */
6641  #define ARIZONA_HP3L_SC_POS_STS_SHIFT                 8  /* HP3L_SC_POS_STS */
6642  #define ARIZONA_HP3L_SC_POS_STS_WIDTH                 1  /* HP3L_SC_POS_STS */
6643  #define ARIZONA_HP2R_SC_NEG_STS                  0x0080  /* HP2R_SC_NEG_STS */
6644  #define ARIZONA_HP2R_SC_NEG_STS_MASK             0x0080  /* HP2R_SC_NEG_STS */
6645  #define ARIZONA_HP2R_SC_NEG_STS_SHIFT                 7  /* HP2R_SC_NEG_STS */
6646  #define ARIZONA_HP2R_SC_NEG_STS_WIDTH                 1  /* HP2R_SC_NEG_STS */
6647  #define ARIZONA_HP2R_SC_POS_STS                  0x0040  /* HP2R_SC_POS_STS */
6648  #define ARIZONA_HP2R_SC_POS_STS_MASK             0x0040  /* HP2R_SC_POS_STS */
6649  #define ARIZONA_HP2R_SC_POS_STS_SHIFT                 6  /* HP2R_SC_POS_STS */
6650  #define ARIZONA_HP2R_SC_POS_STS_WIDTH                 1  /* HP2R_SC_POS_STS */
6651  #define ARIZONA_HP2L_SC_NEG_STS                  0x0020  /* HP2L_SC_NEG_STS */
6652  #define ARIZONA_HP2L_SC_NEG_STS_MASK             0x0020  /* HP2L_SC_NEG_STS */
6653  #define ARIZONA_HP2L_SC_NEG_STS_SHIFT                 5  /* HP2L_SC_NEG_STS */
6654  #define ARIZONA_HP2L_SC_NEG_STS_WIDTH                 1  /* HP2L_SC_NEG_STS */
6655  #define ARIZONA_HP2L_SC_POS_STS                  0x0010  /* HP2L_SC_POS_STS */
6656  #define ARIZONA_HP2L_SC_POS_STS_MASK             0x0010  /* HP2L_SC_POS_STS */
6657  #define ARIZONA_HP2L_SC_POS_STS_SHIFT                 4  /* HP2L_SC_POS_STS */
6658  #define ARIZONA_HP2L_SC_POS_STS_WIDTH                 1  /* HP2L_SC_POS_STS */
6659  #define ARIZONA_HP1R_SC_NEG_STS                  0x0008  /* HP1R_SC_NEG_STS */
6660  #define ARIZONA_HP1R_SC_NEG_STS_MASK             0x0008  /* HP1R_SC_NEG_STS */
6661  #define ARIZONA_HP1R_SC_NEG_STS_SHIFT                 3  /* HP1R_SC_NEG_STS */
6662  #define ARIZONA_HP1R_SC_NEG_STS_WIDTH                 1  /* HP1R_SC_NEG_STS */
6663  #define ARIZONA_HP1R_SC_POS_STS                  0x0004  /* HP1R_SC_POS_STS */
6664  #define ARIZONA_HP1R_SC_POS_STS_MASK             0x0004  /* HP1R_SC_POS_STS */
6665  #define ARIZONA_HP1R_SC_POS_STS_SHIFT                 2  /* HP1R_SC_POS_STS */
6666  #define ARIZONA_HP1R_SC_POS_STS_WIDTH                 1  /* HP1R_SC_POS_STS */
6667  #define ARIZONA_HP1L_SC_NEG_STS                  0x0002  /* HP1L_SC_NEG_STS */
6668  #define ARIZONA_HP1L_SC_NEG_STS_MASK             0x0002  /* HP1L_SC_NEG_STS */
6669  #define ARIZONA_HP1L_SC_NEG_STS_SHIFT                 1  /* HP1L_SC_NEG_STS */
6670  #define ARIZONA_HP1L_SC_NEG_STS_WIDTH                 1  /* HP1L_SC_NEG_STS */
6671  #define ARIZONA_HP1L_SC_POS_STS                  0x0001  /* HP1L_SC_POS_STS */
6672  #define ARIZONA_HP1L_SC_POS_STS_MASK             0x0001  /* HP1L_SC_POS_STS */
6673  #define ARIZONA_HP1L_SC_POS_STS_SHIFT                 0  /* HP1L_SC_POS_STS */
6674  #define ARIZONA_HP1L_SC_POS_STS_WIDTH                 1  /* HP1L_SC_POS_STS */
6675  
6676  /*
6677   * R3392 (0xD40) - IRQ Pin Status
6678   */
6679  #define ARIZONA_IRQ2_STS                         0x0002  /* IRQ2_STS */
6680  #define ARIZONA_IRQ2_STS_MASK                    0x0002  /* IRQ2_STS */
6681  #define ARIZONA_IRQ2_STS_SHIFT                        1  /* IRQ2_STS */
6682  #define ARIZONA_IRQ2_STS_WIDTH                        1  /* IRQ2_STS */
6683  #define ARIZONA_IRQ1_STS                         0x0001  /* IRQ1_STS */
6684  #define ARIZONA_IRQ1_STS_MASK                    0x0001  /* IRQ1_STS */
6685  #define ARIZONA_IRQ1_STS_SHIFT                        0  /* IRQ1_STS */
6686  #define ARIZONA_IRQ1_STS_WIDTH                        1  /* IRQ1_STS */
6687  
6688  /*
6689   * R3393 (0xD41) - ADSP2 IRQ0
6690   */
6691  #define ARIZONA_DSP_IRQ2                         0x0002  /* DSP_IRQ2 */
6692  #define ARIZONA_DSP_IRQ2_MASK                    0x0002  /* DSP_IRQ2 */
6693  #define ARIZONA_DSP_IRQ2_SHIFT                        1  /* DSP_IRQ2 */
6694  #define ARIZONA_DSP_IRQ2_WIDTH                        1  /* DSP_IRQ2 */
6695  #define ARIZONA_DSP_IRQ1                         0x0001  /* DSP_IRQ1 */
6696  #define ARIZONA_DSP_IRQ1_MASK                    0x0001  /* DSP_IRQ1 */
6697  #define ARIZONA_DSP_IRQ1_SHIFT                        0  /* DSP_IRQ1 */
6698  #define ARIZONA_DSP_IRQ1_WIDTH                        1  /* DSP_IRQ1 */
6699  
6700  /*
6701   * R3408 (0xD50) - AOD wkup and trig
6702   */
6703  #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS         0x0080  /* MICD_CLAMP_FALL_TRIG_STS */
6704  #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_MASK    0x0080  /* MICD_CLAMP_FALL_TRIG_STS */
6705  #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_SHIFT        7  /* MICD_CLAMP_FALL_TRIG_STS */
6706  #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_WIDTH        1  /* MICD_CLAMP_FALL_TRIG_STS */
6707  #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS         0x0040  /* MICD_CLAMP_RISE_TRIG_STS */
6708  #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_MASK    0x0040  /* MICD_CLAMP_RISE_TRIG_STS */
6709  #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_SHIFT        6  /* MICD_CLAMP_RISE_TRIG_STS */
6710  #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_WIDTH        1  /* MICD_CLAMP_RISE_TRIG_STS */
6711  #define ARIZONA_GP5_FALL_TRIG_STS                0x0020  /* GP5_FALL_TRIG_STS */
6712  #define ARIZONA_GP5_FALL_TRIG_STS_MASK           0x0020  /* GP5_FALL_TRIG_STS */
6713  #define ARIZONA_GP5_FALL_TRIG_STS_SHIFT               5  /* GP5_FALL_TRIG_STS */
6714  #define ARIZONA_GP5_FALL_TRIG_STS_WIDTH               1  /* GP5_FALL_TRIG_STS */
6715  #define ARIZONA_GP5_RISE_TRIG_STS                0x0010  /* GP5_RISE_TRIG_STS */
6716  #define ARIZONA_GP5_RISE_TRIG_STS_MASK           0x0010  /* GP5_RISE_TRIG_STS */
6717  #define ARIZONA_GP5_RISE_TRIG_STS_SHIFT               4  /* GP5_RISE_TRIG_STS */
6718  #define ARIZONA_GP5_RISE_TRIG_STS_WIDTH               1  /* GP5_RISE_TRIG_STS */
6719  #define ARIZONA_JD1_FALL_TRIG_STS                0x0008  /* JD1_FALL_TRIG_STS */
6720  #define ARIZONA_JD1_FALL_TRIG_STS_MASK           0x0008  /* JD1_FALL_TRIG_STS */
6721  #define ARIZONA_JD1_FALL_TRIG_STS_SHIFT               3  /* JD1_FALL_TRIG_STS */
6722  #define ARIZONA_JD1_FALL_TRIG_STS_WIDTH               1  /* JD1_FALL_TRIG_STS */
6723  #define ARIZONA_JD1_RISE_TRIG_STS                0x0004  /* JD1_RISE_TRIG_STS */
6724  #define ARIZONA_JD1_RISE_TRIG_STS_MASK           0x0004  /* JD1_RISE_TRIG_STS */
6725  #define ARIZONA_JD1_RISE_TRIG_STS_SHIFT               2  /* JD1_RISE_TRIG_STS */
6726  #define ARIZONA_JD1_RISE_TRIG_STS_WIDTH               1  /* JD1_RISE_TRIG_STS */
6727  #define ARIZONA_JD2_FALL_TRIG_STS                0x0002  /* JD2_FALL_TRIG_STS */
6728  #define ARIZONA_JD2_FALL_TRIG_STS_MASK           0x0002  /* JD2_FALL_TRIG_STS */
6729  #define ARIZONA_JD2_FALL_TRIG_STS_SHIFT               1  /* JD2_FALL_TRIG_STS */
6730  #define ARIZONA_JD2_FALL_TRIG_STS_WIDTH               1  /* JD2_FALL_TRIG_STS */
6731  #define ARIZONA_JD2_RISE_TRIG_STS                0x0001  /* JD2_RISE_TRIG_STS */
6732  #define ARIZONA_JD2_RISE_TRIG_STS_MASK           0x0001  /* JD2_RISE_TRIG_STS */
6733  #define ARIZONA_JD2_RISE_TRIG_STS_SHIFT               0  /* JD2_RISE_TRIG_STS */
6734  #define ARIZONA_JD2_RISE_TRIG_STS_WIDTH               1  /* JD2_RISE_TRIG_STS */
6735  
6736  /*
6737   * R3409 (0xD51) - AOD IRQ1
6738   */
6739  #define ARIZONA_MICD_CLAMP_FALL_EINT1            0x0080  /* MICD_CLAMP_FALL_EINT1 */
6740  #define ARIZONA_MICD_CLAMP_FALL_EINT1_MASK       0x0080  /* MICD_CLAMP_FALL_EINT1 */
6741  #define ARIZONA_MICD_CLAMP_FALL_EINT1_SHIFT           7  /* MICD_CLAMP_FALL_EINT1 */
6742  #define ARIZONA_MICD_CLAMP_RISE_EINT1            0x0040  /* MICD_CLAMP_RISE_EINT1 */
6743  #define ARIZONA_MICD_CLAMP_RISE_EINT1_MASK       0x0040  /* MICD_CLAMP_RISE_EINT1 */
6744  #define ARIZONA_MICD_CLAMP_RISE_EINT1_SHIFT           6  /* MICD_CLAMP_RISE_EINT1 */
6745  #define ARIZONA_GP5_FALL_EINT1                   0x0020  /* GP5_FALL_EINT1 */
6746  #define ARIZONA_GP5_FALL_EINT1_MASK              0x0020  /* GP5_FALL_EINT1 */
6747  #define ARIZONA_GP5_FALL_EINT1_SHIFT                  5  /* GP5_FALL_EINT1 */
6748  #define ARIZONA_GP5_FALL_EINT1_WIDTH                  1  /* GP5_FALL_EINT1 */
6749  #define ARIZONA_GP5_RISE_EINT1                   0x0010  /* GP5_RISE_EINT1 */
6750  #define ARIZONA_GP5_RISE_EINT1_MASK              0x0010  /* GP5_RISE_EINT1 */
6751  #define ARIZONA_GP5_RISE_EINT1_SHIFT                  4  /* GP5_RISE_EINT1 */
6752  #define ARIZONA_GP5_RISE_EINT1_WIDTH                  1  /* GP5_RISE_EINT1 */
6753  #define ARIZONA_JD1_FALL_EINT1                   0x0008  /* JD1_FALL_EINT1 */
6754  #define ARIZONA_JD1_FALL_EINT1_MASK              0x0008  /* JD1_FALL_EINT1 */
6755  #define ARIZONA_JD1_FALL_EINT1_SHIFT                  3  /* JD1_FALL_EINT1 */
6756  #define ARIZONA_JD1_FALL_EINT1_WIDTH                  1  /* JD1_FALL_EINT1 */
6757  #define ARIZONA_JD1_RISE_EINT1                   0x0004  /* JD1_RISE_EINT1 */
6758  #define ARIZONA_JD1_RISE_EINT1_MASK              0x0004  /* JD1_RISE_EINT1 */
6759  #define ARIZONA_JD1_RISE_EINT1_SHIFT                  2  /* JD1_RISE_EINT1 */
6760  #define ARIZONA_JD1_RISE_EINT1_WIDTH                  1  /* JD1_RISE_EINT1 */
6761  #define ARIZONA_JD2_FALL_EINT1                   0x0002  /* JD2_FALL_EINT1 */
6762  #define ARIZONA_JD2_FALL_EINT1_MASK              0x0002  /* JD2_FALL_EINT1 */
6763  #define ARIZONA_JD2_FALL_EINT1_SHIFT                  1  /* JD2_FALL_EINT1 */
6764  #define ARIZONA_JD2_FALL_EINT1_WIDTH                  1  /* JD2_FALL_EINT1 */
6765  #define ARIZONA_JD2_RISE_EINT1                   0x0001  /* JD2_RISE_EINT1 */
6766  #define ARIZONA_JD2_RISE_EINT1_MASK              0x0001  /* JD2_RISE_EINT1 */
6767  #define ARIZONA_JD2_RISE_EINT1_SHIFT                  0  /* JD2_RISE_EINT1 */
6768  #define ARIZONA_JD2_RISE_EINT1_WIDTH                  1  /* JD2_RISE_EINT1 */
6769  
6770  /*
6771   * R3410 (0xD52) - AOD IRQ2
6772   */
6773  #define ARIZONA_MICD_CLAMP_FALL_EINT2            0x0080  /* MICD_CLAMP_FALL_EINT2 */
6774  #define ARIZONA_MICD_CLAMP_FALL_EINT2_MASK       0x0080  /* MICD_CLAMP_FALL_EINT2 */
6775  #define ARIZONA_MICD_CLAMP_FALL_EINT2_SHIFT           7  /* MICD_CLAMP_FALL_EINT2 */
6776  #define ARIZONA_MICD_CLAMP_RISE_EINT2            0x0040  /* MICD_CLAMP_RISE_EINT2 */
6777  #define ARIZONA_MICD_CLAMP_RISE_EINT2_MASK       0x0040  /* MICD_CLAMP_RISE_EINT2 */
6778  #define ARIZONA_MICD_CLAMP_RISE_EINT2_SHIFT           6  /* MICD_CLAMP_RISE_EINT2 */
6779  #define ARIZONA_GP5_FALL_EINT2                   0x0020  /* GP5_FALL_EINT2 */
6780  #define ARIZONA_GP5_FALL_EINT2_MASK              0x0020  /* GP5_FALL_EINT2 */
6781  #define ARIZONA_GP5_FALL_EINT2_SHIFT                  5  /* GP5_FALL_EINT2 */
6782  #define ARIZONA_GP5_FALL_EINT2_WIDTH                  1  /* GP5_FALL_EINT2 */
6783  #define ARIZONA_GP5_RISE_EINT2                   0x0010  /* GP5_RISE_EINT2 */
6784  #define ARIZONA_GP5_RISE_EINT2_MASK              0x0010  /* GP5_RISE_EINT2 */
6785  #define ARIZONA_GP5_RISE_EINT2_SHIFT                  4  /* GP5_RISE_EINT2 */
6786  #define ARIZONA_GP5_RISE_EINT2_WIDTH                  1  /* GP5_RISE_EINT2 */
6787  #define ARIZONA_JD1_FALL_EINT2                   0x0008  /* JD1_FALL_EINT2 */
6788  #define ARIZONA_JD1_FALL_EINT2_MASK              0x0008  /* JD1_FALL_EINT2 */
6789  #define ARIZONA_JD1_FALL_EINT2_SHIFT                  3  /* JD1_FALL_EINT2 */
6790  #define ARIZONA_JD1_FALL_EINT2_WIDTH                  1  /* JD1_FALL_EINT2 */
6791  #define ARIZONA_JD1_RISE_EINT2                   0x0004  /* JD1_RISE_EINT2 */
6792  #define ARIZONA_JD1_RISE_EINT2_MASK              0x0004  /* JD1_RISE_EINT2 */
6793  #define ARIZONA_JD1_RISE_EINT2_SHIFT                  2  /* JD1_RISE_EINT2 */
6794  #define ARIZONA_JD1_RISE_EINT2_WIDTH                  1  /* JD1_RISE_EINT2 */
6795  #define ARIZONA_JD2_FALL_EINT2                   0x0002  /* JD2_FALL_EINT2 */
6796  #define ARIZONA_JD2_FALL_EINT2_MASK              0x0002  /* JD2_FALL_EINT2 */
6797  #define ARIZONA_JD2_FALL_EINT2_SHIFT                  1  /* JD2_FALL_EINT2 */
6798  #define ARIZONA_JD2_FALL_EINT2_WIDTH                  1  /* JD2_FALL_EINT2 */
6799  #define ARIZONA_JD2_RISE_EINT2                   0x0001  /* JD2_RISE_EINT2 */
6800  #define ARIZONA_JD2_RISE_EINT2_MASK              0x0001  /* JD2_RISE_EINT2 */
6801  #define ARIZONA_JD2_RISE_EINT2_SHIFT                  0  /* JD2_RISE_EINT2 */
6802  #define ARIZONA_JD2_RISE_EINT2_WIDTH                  1  /* JD2_RISE_EINT2 */
6803  
6804  /*
6805   * R3411 (0xD53) - AOD IRQ Mask IRQ1
6806   */
6807  #define ARIZONA_IM_GP5_FALL_EINT1                0x0020  /* IM_GP5_FALL_EINT1 */
6808  #define ARIZONA_IM_GP5_FALL_EINT1_MASK           0x0020  /* IM_GP5_FALL_EINT1 */
6809  #define ARIZONA_IM_GP5_FALL_EINT1_SHIFT               5  /* IM_GP5_FALL_EINT1 */
6810  #define ARIZONA_IM_GP5_FALL_EINT1_WIDTH               1  /* IM_GP5_FALL_EINT1 */
6811  #define ARIZONA_IM_GP5_RISE_EINT1                0x0010  /* IM_GP5_RISE_EINT1 */
6812  #define ARIZONA_IM_GP5_RISE_EINT1_MASK           0x0010  /* IM_GP5_RISE_EINT1 */
6813  #define ARIZONA_IM_GP5_RISE_EINT1_SHIFT               4  /* IM_GP5_RISE_EINT1 */
6814  #define ARIZONA_IM_GP5_RISE_EINT1_WIDTH               1  /* IM_GP5_RISE_EINT1 */
6815  #define ARIZONA_IM_JD1_FALL_EINT1                0x0008  /* IM_JD1_FALL_EINT1 */
6816  #define ARIZONA_IM_JD1_FALL_EINT1_MASK           0x0008  /* IM_JD1_FALL_EINT1 */
6817  #define ARIZONA_IM_JD1_FALL_EINT1_SHIFT               3  /* IM_JD1_FALL_EINT1 */
6818  #define ARIZONA_IM_JD1_FALL_EINT1_WIDTH               1  /* IM_JD1_FALL_EINT1 */
6819  #define ARIZONA_IM_JD1_RISE_EINT1                0x0004  /* IM_JD1_RISE_EINT1 */
6820  #define ARIZONA_IM_JD1_RISE_EINT1_MASK           0x0004  /* IM_JD1_RISE_EINT1 */
6821  #define ARIZONA_IM_JD1_RISE_EINT1_SHIFT               2  /* IM_JD1_RISE_EINT1 */
6822  #define ARIZONA_IM_JD1_RISE_EINT1_WIDTH               1  /* IM_JD1_RISE_EINT1 */
6823  #define ARIZONA_IM_JD2_FALL_EINT1                0x0002  /* IM_JD2_FALL_EINT1 */
6824  #define ARIZONA_IM_JD2_FALL_EINT1_MASK           0x0002  /* IM_JD2_FALL_EINT1 */
6825  #define ARIZONA_IM_JD2_FALL_EINT1_SHIFT               1  /* IM_JD2_FALL_EINT1 */
6826  #define ARIZONA_IM_JD2_FALL_EINT1_WIDTH               1  /* IM_JD2_FALL_EINT1 */
6827  #define ARIZONA_IM_JD2_RISE_EINT1                0x0001  /* IM_JD2_RISE_EINT1 */
6828  #define ARIZONA_IM_JD2_RISE_EINT1_MASK           0x0001  /* IM_JD2_RISE_EINT1 */
6829  #define ARIZONA_IM_JD2_RISE_EINT1_SHIFT               0  /* IM_JD2_RISE_EINT1 */
6830  #define ARIZONA_IM_JD2_RISE_EINT1_WIDTH               1  /* IM_JD2_RISE_EINT1 */
6831  
6832  /*
6833   * R3412 (0xD54) - AOD IRQ Mask IRQ2
6834   */
6835  #define ARIZONA_IM_GP5_FALL_EINT2                0x0020  /* IM_GP5_FALL_EINT2 */
6836  #define ARIZONA_IM_GP5_FALL_EINT2_MASK           0x0020  /* IM_GP5_FALL_EINT2 */
6837  #define ARIZONA_IM_GP5_FALL_EINT2_SHIFT               5  /* IM_GP5_FALL_EINT2 */
6838  #define ARIZONA_IM_GP5_FALL_EINT2_WIDTH               1  /* IM_GP5_FALL_EINT2 */
6839  #define ARIZONA_IM_GP5_RISE_EINT2                0x0010  /* IM_GP5_RISE_EINT2 */
6840  #define ARIZONA_IM_GP5_RISE_EINT2_MASK           0x0010  /* IM_GP5_RISE_EINT2 */
6841  #define ARIZONA_IM_GP5_RISE_EINT2_SHIFT               4  /* IM_GP5_RISE_EINT2 */
6842  #define ARIZONA_IM_GP5_RISE_EINT2_WIDTH               1  /* IM_GP5_RISE_EINT2 */
6843  #define ARIZONA_IM_JD1_FALL_EINT2                0x0008  /* IM_JD1_FALL_EINT2 */
6844  #define ARIZONA_IM_JD1_FALL_EINT2_MASK           0x0008  /* IM_JD1_FALL_EINT2 */
6845  #define ARIZONA_IM_JD1_FALL_EINT2_SHIFT               3  /* IM_JD1_FALL_EINT2 */
6846  #define ARIZONA_IM_JD1_FALL_EINT2_WIDTH               1  /* IM_JD1_FALL_EINT2 */
6847  #define ARIZONA_IM_JD1_RISE_EINT2                0x0004  /* IM_JD1_RISE_EINT2 */
6848  #define ARIZONA_IM_JD1_RISE_EINT2_MASK           0x0004  /* IM_JD1_RISE_EINT2 */
6849  #define ARIZONA_IM_JD1_RISE_EINT2_SHIFT               2  /* IM_JD1_RISE_EINT2 */
6850  #define ARIZONA_IM_JD1_RISE_EINT2_WIDTH               1  /* IM_JD1_RISE_EINT2 */
6851  #define ARIZONA_IM_JD2_FALL_EINT2                0x0002  /* IM_JD2_FALL_EINT2 */
6852  #define ARIZONA_IM_JD2_FALL_EINT2_MASK           0x0002  /* IM_JD2_FALL_EINT2 */
6853  #define ARIZONA_IM_JD2_FALL_EINT2_SHIFT               1  /* IM_JD2_FALL_EINT2 */
6854  #define ARIZONA_IM_JD2_FALL_EINT2_WIDTH               1  /* IM_JD2_FALL_EINT2 */
6855  #define ARIZONA_IM_JD2_RISE_EINT2                0x0001  /* IM_JD2_RISE_EINT2 */
6856  #define ARIZONA_IM_JD2_RISE_EINT2_MASK           0x0001  /* IM_JD2_RISE_EINT2 */
6857  #define ARIZONA_IM_JD2_RISE_EINT2_SHIFT               0  /* IM_JD2_RISE_EINT2 */
6858  #define ARIZONA_IM_JD2_RISE_EINT2_WIDTH               1  /* IM_JD2_RISE_EINT2 */
6859  
6860  /*
6861   * R3413 (0xD55) - AOD IRQ Raw Status
6862   */
6863  #define ARIZONA_MICD_CLAMP_STS                   0x0008  /* MICD_CLAMP_STS */
6864  #define ARIZONA_MICD_CLAMP_STS_MASK              0x0008  /* MICD_CLAMP_STS */
6865  #define ARIZONA_MICD_CLAMP_STS_SHIFT                  3  /* MICD_CLAMP_STS */
6866  #define ARIZONA_MICD_CLAMP_STS_WIDTH                  1  /* MICD_CLAMP_STS */
6867  #define ARIZONA_GP5_STS                          0x0004  /* GP5_STS */
6868  #define ARIZONA_GP5_STS_MASK                     0x0004  /* GP5_STS */
6869  #define ARIZONA_GP5_STS_SHIFT                         2  /* GP5_STS */
6870  #define ARIZONA_GP5_STS_WIDTH                         1  /* GP5_STS */
6871  #define ARIZONA_JD2_STS                          0x0002  /* JD2_STS */
6872  #define ARIZONA_JD2_STS_MASK                     0x0002  /* JD2_STS */
6873  #define ARIZONA_JD2_STS_SHIFT                         1  /* JD2_STS */
6874  #define ARIZONA_JD2_STS_WIDTH                         1  /* JD2_STS */
6875  #define ARIZONA_JD1_STS                          0x0001  /* JD1_STS */
6876  #define ARIZONA_JD1_STS_MASK                     0x0001  /* JD1_STS */
6877  #define ARIZONA_JD1_STS_SHIFT                         0  /* JD1_STS */
6878  #define ARIZONA_JD1_STS_WIDTH                         1  /* JD1_STS */
6879  
6880  /*
6881   * R3414 (0xD56) - Jack detect debounce
6882   */
6883  #define ARIZONA_MICD_CLAMP_DB                    0x0008  /* MICD_CLAMP_DB */
6884  #define ARIZONA_MICD_CLAMP_DB_MASK               0x0008  /* MICD_CLAMP_DB */
6885  #define ARIZONA_MICD_CLAMP_DB_SHIFT                   3  /* MICD_CLAMP_DB */
6886  #define ARIZONA_MICD_CLAMP_DB_WIDTH                   1  /* MICD_CLAMP_DB */
6887  #define ARIZONA_JD2_DB                           0x0002  /* JD2_DB */
6888  #define ARIZONA_JD2_DB_MASK                      0x0002  /* JD2_DB */
6889  #define ARIZONA_JD2_DB_SHIFT                          1  /* JD2_DB */
6890  #define ARIZONA_JD2_DB_WIDTH                          1  /* JD2_DB */
6891  #define ARIZONA_JD1_DB                           0x0001  /* JD1_DB */
6892  #define ARIZONA_JD1_DB_MASK                      0x0001  /* JD1_DB */
6893  #define ARIZONA_JD1_DB_SHIFT                          0  /* JD1_DB */
6894  #define ARIZONA_JD1_DB_WIDTH                          1  /* JD1_DB */
6895  
6896  /*
6897   * R3584 (0xE00) - FX_Ctrl1
6898   */
6899  #define ARIZONA_FX_RATE_MASK                     0x7800  /* FX_RATE - [14:11] */
6900  #define ARIZONA_FX_RATE_SHIFT                        11  /* FX_RATE - [14:11] */
6901  #define ARIZONA_FX_RATE_WIDTH                         4  /* FX_RATE - [14:11] */
6902  
6903  /*
6904   * R3585 (0xE01) - FX_Ctrl2
6905   */
6906  #define ARIZONA_FX_STS_MASK                      0xFFF0  /* FX_STS - [15:4] */
6907  #define ARIZONA_FX_STS_SHIFT                          4  /* FX_STS - [15:4] */
6908  #define ARIZONA_FX_STS_WIDTH                         12  /* FX_STS - [15:4] */
6909  
6910  /*
6911   * R3600 (0xE10) - EQ1_1
6912   */
6913  #define ARIZONA_EQ1_B1_GAIN_MASK                 0xF800  /* EQ1_B1_GAIN - [15:11] */
6914  #define ARIZONA_EQ1_B1_GAIN_SHIFT                    11  /* EQ1_B1_GAIN - [15:11] */
6915  #define ARIZONA_EQ1_B1_GAIN_WIDTH                     5  /* EQ1_B1_GAIN - [15:11] */
6916  #define ARIZONA_EQ1_B2_GAIN_MASK                 0x07C0  /* EQ1_B2_GAIN - [10:6] */
6917  #define ARIZONA_EQ1_B2_GAIN_SHIFT                     6  /* EQ1_B2_GAIN - [10:6] */
6918  #define ARIZONA_EQ1_B2_GAIN_WIDTH                     5  /* EQ1_B2_GAIN - [10:6] */
6919  #define ARIZONA_EQ1_B3_GAIN_MASK                 0x003E  /* EQ1_B3_GAIN - [5:1] */
6920  #define ARIZONA_EQ1_B3_GAIN_SHIFT                     1  /* EQ1_B3_GAIN - [5:1] */
6921  #define ARIZONA_EQ1_B3_GAIN_WIDTH                     5  /* EQ1_B3_GAIN - [5:1] */
6922  #define ARIZONA_EQ1_ENA                          0x0001  /* EQ1_ENA */
6923  #define ARIZONA_EQ1_ENA_MASK                     0x0001  /* EQ1_ENA */
6924  #define ARIZONA_EQ1_ENA_SHIFT                         0  /* EQ1_ENA */
6925  #define ARIZONA_EQ1_ENA_WIDTH                         1  /* EQ1_ENA */
6926  
6927  /*
6928   * R3601 (0xE11) - EQ1_2
6929   */
6930  #define ARIZONA_EQ1_B4_GAIN_MASK                 0xF800  /* EQ1_B4_GAIN - [15:11] */
6931  #define ARIZONA_EQ1_B4_GAIN_SHIFT                    11  /* EQ1_B4_GAIN - [15:11] */
6932  #define ARIZONA_EQ1_B4_GAIN_WIDTH                     5  /* EQ1_B4_GAIN - [15:11] */
6933  #define ARIZONA_EQ1_B5_GAIN_MASK                 0x07C0  /* EQ1_B5_GAIN - [10:6] */
6934  #define ARIZONA_EQ1_B5_GAIN_SHIFT                     6  /* EQ1_B5_GAIN - [10:6] */
6935  #define ARIZONA_EQ1_B5_GAIN_WIDTH                     5  /* EQ1_B5_GAIN - [10:6] */
6936  #define ARIZONA_EQ1_B1_MODE                      0x0001  /* EQ1_B1_MODE */
6937  #define ARIZONA_EQ1_B1_MODE_MASK                 0x0001  /* EQ1_B1_MODE */
6938  #define ARIZONA_EQ1_B1_MODE_SHIFT                     0  /* EQ1_B1_MODE */
6939  #define ARIZONA_EQ1_B1_MODE_WIDTH                     1  /* EQ1_B1_MODE */
6940  
6941  /*
6942   * R3602 (0xE12) - EQ1_3
6943   */
6944  #define ARIZONA_EQ1_B1_A_MASK                    0xFFFF  /* EQ1_B1_A - [15:0] */
6945  #define ARIZONA_EQ1_B1_A_SHIFT                        0  /* EQ1_B1_A - [15:0] */
6946  #define ARIZONA_EQ1_B1_A_WIDTH                       16  /* EQ1_B1_A - [15:0] */
6947  
6948  /*
6949   * R3603 (0xE13) - EQ1_4
6950   */
6951  #define ARIZONA_EQ1_B1_B_MASK                    0xFFFF  /* EQ1_B1_B - [15:0] */
6952  #define ARIZONA_EQ1_B1_B_SHIFT                        0  /* EQ1_B1_B - [15:0] */
6953  #define ARIZONA_EQ1_B1_B_WIDTH                       16  /* EQ1_B1_B - [15:0] */
6954  
6955  /*
6956   * R3604 (0xE14) - EQ1_5
6957   */
6958  #define ARIZONA_EQ1_B1_PG_MASK                   0xFFFF  /* EQ1_B1_PG - [15:0] */
6959  #define ARIZONA_EQ1_B1_PG_SHIFT                       0  /* EQ1_B1_PG - [15:0] */
6960  #define ARIZONA_EQ1_B1_PG_WIDTH                      16  /* EQ1_B1_PG - [15:0] */
6961  
6962  /*
6963   * R3605 (0xE15) - EQ1_6
6964   */
6965  #define ARIZONA_EQ1_B2_A_MASK                    0xFFFF  /* EQ1_B2_A - [15:0] */
6966  #define ARIZONA_EQ1_B2_A_SHIFT                        0  /* EQ1_B2_A - [15:0] */
6967  #define ARIZONA_EQ1_B2_A_WIDTH                       16  /* EQ1_B2_A - [15:0] */
6968  
6969  /*
6970   * R3606 (0xE16) - EQ1_7
6971   */
6972  #define ARIZONA_EQ1_B2_B_MASK                    0xFFFF  /* EQ1_B2_B - [15:0] */
6973  #define ARIZONA_EQ1_B2_B_SHIFT                        0  /* EQ1_B2_B - [15:0] */
6974  #define ARIZONA_EQ1_B2_B_WIDTH                       16  /* EQ1_B2_B - [15:0] */
6975  
6976  /*
6977   * R3607 (0xE17) - EQ1_8
6978   */
6979  #define ARIZONA_EQ1_B2_C_MASK                    0xFFFF  /* EQ1_B2_C - [15:0] */
6980  #define ARIZONA_EQ1_B2_C_SHIFT                        0  /* EQ1_B2_C - [15:0] */
6981  #define ARIZONA_EQ1_B2_C_WIDTH                       16  /* EQ1_B2_C - [15:0] */
6982  
6983  /*
6984   * R3608 (0xE18) - EQ1_9
6985   */
6986  #define ARIZONA_EQ1_B2_PG_MASK                   0xFFFF  /* EQ1_B2_PG - [15:0] */
6987  #define ARIZONA_EQ1_B2_PG_SHIFT                       0  /* EQ1_B2_PG - [15:0] */
6988  #define ARIZONA_EQ1_B2_PG_WIDTH                      16  /* EQ1_B2_PG - [15:0] */
6989  
6990  /*
6991   * R3609 (0xE19) - EQ1_10
6992   */
6993  #define ARIZONA_EQ1_B3_A_MASK                    0xFFFF  /* EQ1_B3_A - [15:0] */
6994  #define ARIZONA_EQ1_B3_A_SHIFT                        0  /* EQ1_B3_A - [15:0] */
6995  #define ARIZONA_EQ1_B3_A_WIDTH                       16  /* EQ1_B3_A - [15:0] */
6996  
6997  /*
6998   * R3610 (0xE1A) - EQ1_11
6999   */
7000  #define ARIZONA_EQ1_B3_B_MASK                    0xFFFF  /* EQ1_B3_B - [15:0] */
7001  #define ARIZONA_EQ1_B3_B_SHIFT                        0  /* EQ1_B3_B - [15:0] */
7002  #define ARIZONA_EQ1_B3_B_WIDTH                       16  /* EQ1_B3_B - [15:0] */
7003  
7004  /*
7005   * R3611 (0xE1B) - EQ1_12
7006   */
7007  #define ARIZONA_EQ1_B3_C_MASK                    0xFFFF  /* EQ1_B3_C - [15:0] */
7008  #define ARIZONA_EQ1_B3_C_SHIFT                        0  /* EQ1_B3_C - [15:0] */
7009  #define ARIZONA_EQ1_B3_C_WIDTH                       16  /* EQ1_B3_C - [15:0] */
7010  
7011  /*
7012   * R3612 (0xE1C) - EQ1_13
7013   */
7014  #define ARIZONA_EQ1_B3_PG_MASK                   0xFFFF  /* EQ1_B3_PG - [15:0] */
7015  #define ARIZONA_EQ1_B3_PG_SHIFT                       0  /* EQ1_B3_PG - [15:0] */
7016  #define ARIZONA_EQ1_B3_PG_WIDTH                      16  /* EQ1_B3_PG - [15:0] */
7017  
7018  /*
7019   * R3613 (0xE1D) - EQ1_14
7020   */
7021  #define ARIZONA_EQ1_B4_A_MASK                    0xFFFF  /* EQ1_B4_A - [15:0] */
7022  #define ARIZONA_EQ1_B4_A_SHIFT                        0  /* EQ1_B4_A - [15:0] */
7023  #define ARIZONA_EQ1_B4_A_WIDTH                       16  /* EQ1_B4_A - [15:0] */
7024  
7025  /*
7026   * R3614 (0xE1E) - EQ1_15
7027   */
7028  #define ARIZONA_EQ1_B4_B_MASK                    0xFFFF  /* EQ1_B4_B - [15:0] */
7029  #define ARIZONA_EQ1_B4_B_SHIFT                        0  /* EQ1_B4_B - [15:0] */
7030  #define ARIZONA_EQ1_B4_B_WIDTH                       16  /* EQ1_B4_B - [15:0] */
7031  
7032  /*
7033   * R3615 (0xE1F) - EQ1_16
7034   */
7035  #define ARIZONA_EQ1_B4_C_MASK                    0xFFFF  /* EQ1_B4_C - [15:0] */
7036  #define ARIZONA_EQ1_B4_C_SHIFT                        0  /* EQ1_B4_C - [15:0] */
7037  #define ARIZONA_EQ1_B4_C_WIDTH                       16  /* EQ1_B4_C - [15:0] */
7038  
7039  /*
7040   * R3616 (0xE20) - EQ1_17
7041   */
7042  #define ARIZONA_EQ1_B4_PG_MASK                   0xFFFF  /* EQ1_B4_PG - [15:0] */
7043  #define ARIZONA_EQ1_B4_PG_SHIFT                       0  /* EQ1_B4_PG - [15:0] */
7044  #define ARIZONA_EQ1_B4_PG_WIDTH                      16  /* EQ1_B4_PG - [15:0] */
7045  
7046  /*
7047   * R3617 (0xE21) - EQ1_18
7048   */
7049  #define ARIZONA_EQ1_B5_A_MASK                    0xFFFF  /* EQ1_B5_A - [15:0] */
7050  #define ARIZONA_EQ1_B5_A_SHIFT                        0  /* EQ1_B5_A - [15:0] */
7051  #define ARIZONA_EQ1_B5_A_WIDTH                       16  /* EQ1_B5_A - [15:0] */
7052  
7053  /*
7054   * R3618 (0xE22) - EQ1_19
7055   */
7056  #define ARIZONA_EQ1_B5_B_MASK                    0xFFFF  /* EQ1_B5_B - [15:0] */
7057  #define ARIZONA_EQ1_B5_B_SHIFT                        0  /* EQ1_B5_B - [15:0] */
7058  #define ARIZONA_EQ1_B5_B_WIDTH                       16  /* EQ1_B5_B - [15:0] */
7059  
7060  /*
7061   * R3619 (0xE23) - EQ1_20
7062   */
7063  #define ARIZONA_EQ1_B5_PG_MASK                   0xFFFF  /* EQ1_B5_PG - [15:0] */
7064  #define ARIZONA_EQ1_B5_PG_SHIFT                       0  /* EQ1_B5_PG - [15:0] */
7065  #define ARIZONA_EQ1_B5_PG_WIDTH                      16  /* EQ1_B5_PG - [15:0] */
7066  
7067  /*
7068   * R3620 (0xE24) - EQ1_21
7069   */
7070  #define ARIZONA_EQ1_B1_C_MASK                    0xFFFF  /* EQ1_B1_C - [15:0] */
7071  #define ARIZONA_EQ1_B1_C_SHIFT                        0  /* EQ1_B1_C - [15:0] */
7072  #define ARIZONA_EQ1_B1_C_WIDTH                       16  /* EQ1_B1_C - [15:0] */
7073  
7074  /*
7075   * R3622 (0xE26) - EQ2_1
7076   */
7077  #define ARIZONA_EQ2_B1_GAIN_MASK                 0xF800  /* EQ2_B1_GAIN - [15:11] */
7078  #define ARIZONA_EQ2_B1_GAIN_SHIFT                    11  /* EQ2_B1_GAIN - [15:11] */
7079  #define ARIZONA_EQ2_B1_GAIN_WIDTH                     5  /* EQ2_B1_GAIN - [15:11] */
7080  #define ARIZONA_EQ2_B2_GAIN_MASK                 0x07C0  /* EQ2_B2_GAIN - [10:6] */
7081  #define ARIZONA_EQ2_B2_GAIN_SHIFT                     6  /* EQ2_B2_GAIN - [10:6] */
7082  #define ARIZONA_EQ2_B2_GAIN_WIDTH                     5  /* EQ2_B2_GAIN - [10:6] */
7083  #define ARIZONA_EQ2_B3_GAIN_MASK                 0x003E  /* EQ2_B3_GAIN - [5:1] */
7084  #define ARIZONA_EQ2_B3_GAIN_SHIFT                     1  /* EQ2_B3_GAIN - [5:1] */
7085  #define ARIZONA_EQ2_B3_GAIN_WIDTH                     5  /* EQ2_B3_GAIN - [5:1] */
7086  #define ARIZONA_EQ2_ENA                          0x0001  /* EQ2_ENA */
7087  #define ARIZONA_EQ2_ENA_MASK                     0x0001  /* EQ2_ENA */
7088  #define ARIZONA_EQ2_ENA_SHIFT                         0  /* EQ2_ENA */
7089  #define ARIZONA_EQ2_ENA_WIDTH                         1  /* EQ2_ENA */
7090  
7091  /*
7092   * R3623 (0xE27) - EQ2_2
7093   */
7094  #define ARIZONA_EQ2_B4_GAIN_MASK                 0xF800  /* EQ2_B4_GAIN - [15:11] */
7095  #define ARIZONA_EQ2_B4_GAIN_SHIFT                    11  /* EQ2_B4_GAIN - [15:11] */
7096  #define ARIZONA_EQ2_B4_GAIN_WIDTH                     5  /* EQ2_B4_GAIN - [15:11] */
7097  #define ARIZONA_EQ2_B5_GAIN_MASK                 0x07C0  /* EQ2_B5_GAIN - [10:6] */
7098  #define ARIZONA_EQ2_B5_GAIN_SHIFT                     6  /* EQ2_B5_GAIN - [10:6] */
7099  #define ARIZONA_EQ2_B5_GAIN_WIDTH                     5  /* EQ2_B5_GAIN - [10:6] */
7100  #define ARIZONA_EQ2_B1_MODE                      0x0001  /* EQ2_B1_MODE */
7101  #define ARIZONA_EQ2_B1_MODE_MASK                 0x0001  /* EQ2_B1_MODE */
7102  #define ARIZONA_EQ2_B1_MODE_SHIFT                     0  /* EQ2_B1_MODE */
7103  #define ARIZONA_EQ2_B1_MODE_WIDTH                     1  /* EQ2_B1_MODE */
7104  
7105  /*
7106   * R3624 (0xE28) - EQ2_3
7107   */
7108  #define ARIZONA_EQ2_B1_A_MASK                    0xFFFF  /* EQ2_B1_A - [15:0] */
7109  #define ARIZONA_EQ2_B1_A_SHIFT                        0  /* EQ2_B1_A - [15:0] */
7110  #define ARIZONA_EQ2_B1_A_WIDTH                       16  /* EQ2_B1_A - [15:0] */
7111  
7112  /*
7113   * R3625 (0xE29) - EQ2_4
7114   */
7115  #define ARIZONA_EQ2_B1_B_MASK                    0xFFFF  /* EQ2_B1_B - [15:0] */
7116  #define ARIZONA_EQ2_B1_B_SHIFT                        0  /* EQ2_B1_B - [15:0] */
7117  #define ARIZONA_EQ2_B1_B_WIDTH                       16  /* EQ2_B1_B - [15:0] */
7118  
7119  /*
7120   * R3626 (0xE2A) - EQ2_5
7121   */
7122  #define ARIZONA_EQ2_B1_PG_MASK                   0xFFFF  /* EQ2_B1_PG - [15:0] */
7123  #define ARIZONA_EQ2_B1_PG_SHIFT                       0  /* EQ2_B1_PG - [15:0] */
7124  #define ARIZONA_EQ2_B1_PG_WIDTH                      16  /* EQ2_B1_PG - [15:0] */
7125  
7126  /*
7127   * R3627 (0xE2B) - EQ2_6
7128   */
7129  #define ARIZONA_EQ2_B2_A_MASK                    0xFFFF  /* EQ2_B2_A - [15:0] */
7130  #define ARIZONA_EQ2_B2_A_SHIFT                        0  /* EQ2_B2_A - [15:0] */
7131  #define ARIZONA_EQ2_B2_A_WIDTH                       16  /* EQ2_B2_A - [15:0] */
7132  
7133  /*
7134   * R3628 (0xE2C) - EQ2_7
7135   */
7136  #define ARIZONA_EQ2_B2_B_MASK                    0xFFFF  /* EQ2_B2_B - [15:0] */
7137  #define ARIZONA_EQ2_B2_B_SHIFT                        0  /* EQ2_B2_B - [15:0] */
7138  #define ARIZONA_EQ2_B2_B_WIDTH                       16  /* EQ2_B2_B - [15:0] */
7139  
7140  /*
7141   * R3629 (0xE2D) - EQ2_8
7142   */
7143  #define ARIZONA_EQ2_B2_C_MASK                    0xFFFF  /* EQ2_B2_C - [15:0] */
7144  #define ARIZONA_EQ2_B2_C_SHIFT                        0  /* EQ2_B2_C - [15:0] */
7145  #define ARIZONA_EQ2_B2_C_WIDTH                       16  /* EQ2_B2_C - [15:0] */
7146  
7147  /*
7148   * R3630 (0xE2E) - EQ2_9
7149   */
7150  #define ARIZONA_EQ2_B2_PG_MASK                   0xFFFF  /* EQ2_B2_PG - [15:0] */
7151  #define ARIZONA_EQ2_B2_PG_SHIFT                       0  /* EQ2_B2_PG - [15:0] */
7152  #define ARIZONA_EQ2_B2_PG_WIDTH                      16  /* EQ2_B2_PG - [15:0] */
7153  
7154  /*
7155   * R3631 (0xE2F) - EQ2_10
7156   */
7157  #define ARIZONA_EQ2_B3_A_MASK                    0xFFFF  /* EQ2_B3_A - [15:0] */
7158  #define ARIZONA_EQ2_B3_A_SHIFT                        0  /* EQ2_B3_A - [15:0] */
7159  #define ARIZONA_EQ2_B3_A_WIDTH                       16  /* EQ2_B3_A - [15:0] */
7160  
7161  /*
7162   * R3632 (0xE30) - EQ2_11
7163   */
7164  #define ARIZONA_EQ2_B3_B_MASK                    0xFFFF  /* EQ2_B3_B - [15:0] */
7165  #define ARIZONA_EQ2_B3_B_SHIFT                        0  /* EQ2_B3_B - [15:0] */
7166  #define ARIZONA_EQ2_B3_B_WIDTH                       16  /* EQ2_B3_B - [15:0] */
7167  
7168  /*
7169   * R3633 (0xE31) - EQ2_12
7170   */
7171  #define ARIZONA_EQ2_B3_C_MASK                    0xFFFF  /* EQ2_B3_C - [15:0] */
7172  #define ARIZONA_EQ2_B3_C_SHIFT                        0  /* EQ2_B3_C - [15:0] */
7173  #define ARIZONA_EQ2_B3_C_WIDTH                       16  /* EQ2_B3_C - [15:0] */
7174  
7175  /*
7176   * R3634 (0xE32) - EQ2_13
7177   */
7178  #define ARIZONA_EQ2_B3_PG_MASK                   0xFFFF  /* EQ2_B3_PG - [15:0] */
7179  #define ARIZONA_EQ2_B3_PG_SHIFT                       0  /* EQ2_B3_PG - [15:0] */
7180  #define ARIZONA_EQ2_B3_PG_WIDTH                      16  /* EQ2_B3_PG - [15:0] */
7181  
7182  /*
7183   * R3635 (0xE33) - EQ2_14
7184   */
7185  #define ARIZONA_EQ2_B4_A_MASK                    0xFFFF  /* EQ2_B4_A - [15:0] */
7186  #define ARIZONA_EQ2_B4_A_SHIFT                        0  /* EQ2_B4_A - [15:0] */
7187  #define ARIZONA_EQ2_B4_A_WIDTH                       16  /* EQ2_B4_A - [15:0] */
7188  
7189  /*
7190   * R3636 (0xE34) - EQ2_15
7191   */
7192  #define ARIZONA_EQ2_B4_B_MASK                    0xFFFF  /* EQ2_B4_B - [15:0] */
7193  #define ARIZONA_EQ2_B4_B_SHIFT                        0  /* EQ2_B4_B - [15:0] */
7194  #define ARIZONA_EQ2_B4_B_WIDTH                       16  /* EQ2_B4_B - [15:0] */
7195  
7196  /*
7197   * R3637 (0xE35) - EQ2_16
7198   */
7199  #define ARIZONA_EQ2_B4_C_MASK                    0xFFFF  /* EQ2_B4_C - [15:0] */
7200  #define ARIZONA_EQ2_B4_C_SHIFT                        0  /* EQ2_B4_C - [15:0] */
7201  #define ARIZONA_EQ2_B4_C_WIDTH                       16  /* EQ2_B4_C - [15:0] */
7202  
7203  /*
7204   * R3638 (0xE36) - EQ2_17
7205   */
7206  #define ARIZONA_EQ2_B4_PG_MASK                   0xFFFF  /* EQ2_B4_PG - [15:0] */
7207  #define ARIZONA_EQ2_B4_PG_SHIFT                       0  /* EQ2_B4_PG - [15:0] */
7208  #define ARIZONA_EQ2_B4_PG_WIDTH                      16  /* EQ2_B4_PG - [15:0] */
7209  
7210  /*
7211   * R3639 (0xE37) - EQ2_18
7212   */
7213  #define ARIZONA_EQ2_B5_A_MASK                    0xFFFF  /* EQ2_B5_A - [15:0] */
7214  #define ARIZONA_EQ2_B5_A_SHIFT                        0  /* EQ2_B5_A - [15:0] */
7215  #define ARIZONA_EQ2_B5_A_WIDTH                       16  /* EQ2_B5_A - [15:0] */
7216  
7217  /*
7218   * R3640 (0xE38) - EQ2_19
7219   */
7220  #define ARIZONA_EQ2_B5_B_MASK                    0xFFFF  /* EQ2_B5_B - [15:0] */
7221  #define ARIZONA_EQ2_B5_B_SHIFT                        0  /* EQ2_B5_B - [15:0] */
7222  #define ARIZONA_EQ2_B5_B_WIDTH                       16  /* EQ2_B5_B - [15:0] */
7223  
7224  /*
7225   * R3641 (0xE39) - EQ2_20
7226   */
7227  #define ARIZONA_EQ2_B5_PG_MASK                   0xFFFF  /* EQ2_B5_PG - [15:0] */
7228  #define ARIZONA_EQ2_B5_PG_SHIFT                       0  /* EQ2_B5_PG - [15:0] */
7229  #define ARIZONA_EQ2_B5_PG_WIDTH                      16  /* EQ2_B5_PG - [15:0] */
7230  
7231  /*
7232   * R3642 (0xE3A) - EQ2_21
7233   */
7234  #define ARIZONA_EQ2_B1_C_MASK                    0xFFFF  /* EQ2_B1_C - [15:0] */
7235  #define ARIZONA_EQ2_B1_C_SHIFT                        0  /* EQ2_B1_C - [15:0] */
7236  #define ARIZONA_EQ2_B1_C_WIDTH                       16  /* EQ2_B1_C - [15:0] */
7237  
7238  /*
7239   * R3644 (0xE3C) - EQ3_1
7240   */
7241  #define ARIZONA_EQ3_B1_GAIN_MASK                 0xF800  /* EQ3_B1_GAIN - [15:11] */
7242  #define ARIZONA_EQ3_B1_GAIN_SHIFT                    11  /* EQ3_B1_GAIN - [15:11] */
7243  #define ARIZONA_EQ3_B1_GAIN_WIDTH                     5  /* EQ3_B1_GAIN - [15:11] */
7244  #define ARIZONA_EQ3_B2_GAIN_MASK                 0x07C0  /* EQ3_B2_GAIN - [10:6] */
7245  #define ARIZONA_EQ3_B2_GAIN_SHIFT                     6  /* EQ3_B2_GAIN - [10:6] */
7246  #define ARIZONA_EQ3_B2_GAIN_WIDTH                     5  /* EQ3_B2_GAIN - [10:6] */
7247  #define ARIZONA_EQ3_B3_GAIN_MASK                 0x003E  /* EQ3_B3_GAIN - [5:1] */
7248  #define ARIZONA_EQ3_B3_GAIN_SHIFT                     1  /* EQ3_B3_GAIN - [5:1] */
7249  #define ARIZONA_EQ3_B3_GAIN_WIDTH                     5  /* EQ3_B3_GAIN - [5:1] */
7250  #define ARIZONA_EQ3_ENA                          0x0001  /* EQ3_ENA */
7251  #define ARIZONA_EQ3_ENA_MASK                     0x0001  /* EQ3_ENA */
7252  #define ARIZONA_EQ3_ENA_SHIFT                         0  /* EQ3_ENA */
7253  #define ARIZONA_EQ3_ENA_WIDTH                         1  /* EQ3_ENA */
7254  
7255  /*
7256   * R3645 (0xE3D) - EQ3_2
7257   */
7258  #define ARIZONA_EQ3_B4_GAIN_MASK                 0xF800  /* EQ3_B4_GAIN - [15:11] */
7259  #define ARIZONA_EQ3_B4_GAIN_SHIFT                    11  /* EQ3_B4_GAIN - [15:11] */
7260  #define ARIZONA_EQ3_B4_GAIN_WIDTH                     5  /* EQ3_B4_GAIN - [15:11] */
7261  #define ARIZONA_EQ3_B5_GAIN_MASK                 0x07C0  /* EQ3_B5_GAIN - [10:6] */
7262  #define ARIZONA_EQ3_B5_GAIN_SHIFT                     6  /* EQ3_B5_GAIN - [10:6] */
7263  #define ARIZONA_EQ3_B5_GAIN_WIDTH                     5  /* EQ3_B5_GAIN - [10:6] */
7264  #define ARIZONA_EQ3_B1_MODE                      0x0001  /* EQ3_B1_MODE */
7265  #define ARIZONA_EQ3_B1_MODE_MASK                 0x0001  /* EQ3_B1_MODE */
7266  #define ARIZONA_EQ3_B1_MODE_SHIFT                     0  /* EQ3_B1_MODE */
7267  #define ARIZONA_EQ3_B1_MODE_WIDTH                     1  /* EQ3_B1_MODE */
7268  
7269  /*
7270   * R3646 (0xE3E) - EQ3_3
7271   */
7272  #define ARIZONA_EQ3_B1_A_MASK                    0xFFFF  /* EQ3_B1_A - [15:0] */
7273  #define ARIZONA_EQ3_B1_A_SHIFT                        0  /* EQ3_B1_A - [15:0] */
7274  #define ARIZONA_EQ3_B1_A_WIDTH                       16  /* EQ3_B1_A - [15:0] */
7275  
7276  /*
7277   * R3647 (0xE3F) - EQ3_4
7278   */
7279  #define ARIZONA_EQ3_B1_B_MASK                    0xFFFF  /* EQ3_B1_B - [15:0] */
7280  #define ARIZONA_EQ3_B1_B_SHIFT                        0  /* EQ3_B1_B - [15:0] */
7281  #define ARIZONA_EQ3_B1_B_WIDTH                       16  /* EQ3_B1_B - [15:0] */
7282  
7283  /*
7284   * R3648 (0xE40) - EQ3_5
7285   */
7286  #define ARIZONA_EQ3_B1_PG_MASK                   0xFFFF  /* EQ3_B1_PG - [15:0] */
7287  #define ARIZONA_EQ3_B1_PG_SHIFT                       0  /* EQ3_B1_PG - [15:0] */
7288  #define ARIZONA_EQ3_B1_PG_WIDTH                      16  /* EQ3_B1_PG - [15:0] */
7289  
7290  /*
7291   * R3649 (0xE41) - EQ3_6
7292   */
7293  #define ARIZONA_EQ3_B2_A_MASK                    0xFFFF  /* EQ3_B2_A - [15:0] */
7294  #define ARIZONA_EQ3_B2_A_SHIFT                        0  /* EQ3_B2_A - [15:0] */
7295  #define ARIZONA_EQ3_B2_A_WIDTH                       16  /* EQ3_B2_A - [15:0] */
7296  
7297  /*
7298   * R3650 (0xE42) - EQ3_7
7299   */
7300  #define ARIZONA_EQ3_B2_B_MASK                    0xFFFF  /* EQ3_B2_B - [15:0] */
7301  #define ARIZONA_EQ3_B2_B_SHIFT                        0  /* EQ3_B2_B - [15:0] */
7302  #define ARIZONA_EQ3_B2_B_WIDTH                       16  /* EQ3_B2_B - [15:0] */
7303  
7304  /*
7305   * R3651 (0xE43) - EQ3_8
7306   */
7307  #define ARIZONA_EQ3_B2_C_MASK                    0xFFFF  /* EQ3_B2_C - [15:0] */
7308  #define ARIZONA_EQ3_B2_C_SHIFT                        0  /* EQ3_B2_C - [15:0] */
7309  #define ARIZONA_EQ3_B2_C_WIDTH                       16  /* EQ3_B2_C - [15:0] */
7310  
7311  /*
7312   * R3652 (0xE44) - EQ3_9
7313   */
7314  #define ARIZONA_EQ3_B2_PG_MASK                   0xFFFF  /* EQ3_B2_PG - [15:0] */
7315  #define ARIZONA_EQ3_B2_PG_SHIFT                       0  /* EQ3_B2_PG - [15:0] */
7316  #define ARIZONA_EQ3_B2_PG_WIDTH                      16  /* EQ3_B2_PG - [15:0] */
7317  
7318  /*
7319   * R3653 (0xE45) - EQ3_10
7320   */
7321  #define ARIZONA_EQ3_B3_A_MASK                    0xFFFF  /* EQ3_B3_A - [15:0] */
7322  #define ARIZONA_EQ3_B3_A_SHIFT                        0  /* EQ3_B3_A - [15:0] */
7323  #define ARIZONA_EQ3_B3_A_WIDTH                       16  /* EQ3_B3_A - [15:0] */
7324  
7325  /*
7326   * R3654 (0xE46) - EQ3_11
7327   */
7328  #define ARIZONA_EQ3_B3_B_MASK                    0xFFFF  /* EQ3_B3_B - [15:0] */
7329  #define ARIZONA_EQ3_B3_B_SHIFT                        0  /* EQ3_B3_B - [15:0] */
7330  #define ARIZONA_EQ3_B3_B_WIDTH                       16  /* EQ3_B3_B - [15:0] */
7331  
7332  /*
7333   * R3655 (0xE47) - EQ3_12
7334   */
7335  #define ARIZONA_EQ3_B3_C_MASK                    0xFFFF  /* EQ3_B3_C - [15:0] */
7336  #define ARIZONA_EQ3_B3_C_SHIFT                        0  /* EQ3_B3_C - [15:0] */
7337  #define ARIZONA_EQ3_B3_C_WIDTH                       16  /* EQ3_B3_C - [15:0] */
7338  
7339  /*
7340   * R3656 (0xE48) - EQ3_13
7341   */
7342  #define ARIZONA_EQ3_B3_PG_MASK                   0xFFFF  /* EQ3_B3_PG - [15:0] */
7343  #define ARIZONA_EQ3_B3_PG_SHIFT                       0  /* EQ3_B3_PG - [15:0] */
7344  #define ARIZONA_EQ3_B3_PG_WIDTH                      16  /* EQ3_B3_PG - [15:0] */
7345  
7346  /*
7347   * R3657 (0xE49) - EQ3_14
7348   */
7349  #define ARIZONA_EQ3_B4_A_MASK                    0xFFFF  /* EQ3_B4_A - [15:0] */
7350  #define ARIZONA_EQ3_B4_A_SHIFT                        0  /* EQ3_B4_A - [15:0] */
7351  #define ARIZONA_EQ3_B4_A_WIDTH                       16  /* EQ3_B4_A - [15:0] */
7352  
7353  /*
7354   * R3658 (0xE4A) - EQ3_15
7355   */
7356  #define ARIZONA_EQ3_B4_B_MASK                    0xFFFF  /* EQ3_B4_B - [15:0] */
7357  #define ARIZONA_EQ3_B4_B_SHIFT                        0  /* EQ3_B4_B - [15:0] */
7358  #define ARIZONA_EQ3_B4_B_WIDTH                       16  /* EQ3_B4_B - [15:0] */
7359  
7360  /*
7361   * R3659 (0xE4B) - EQ3_16
7362   */
7363  #define ARIZONA_EQ3_B4_C_MASK                    0xFFFF  /* EQ3_B4_C - [15:0] */
7364  #define ARIZONA_EQ3_B4_C_SHIFT                        0  /* EQ3_B4_C - [15:0] */
7365  #define ARIZONA_EQ3_B4_C_WIDTH                       16  /* EQ3_B4_C - [15:0] */
7366  
7367  /*
7368   * R3660 (0xE4C) - EQ3_17
7369   */
7370  #define ARIZONA_EQ3_B4_PG_MASK                   0xFFFF  /* EQ3_B4_PG - [15:0] */
7371  #define ARIZONA_EQ3_B4_PG_SHIFT                       0  /* EQ3_B4_PG - [15:0] */
7372  #define ARIZONA_EQ3_B4_PG_WIDTH                      16  /* EQ3_B4_PG - [15:0] */
7373  
7374  /*
7375   * R3661 (0xE4D) - EQ3_18
7376   */
7377  #define ARIZONA_EQ3_B5_A_MASK                    0xFFFF  /* EQ3_B5_A - [15:0] */
7378  #define ARIZONA_EQ3_B5_A_SHIFT                        0  /* EQ3_B5_A - [15:0] */
7379  #define ARIZONA_EQ3_B5_A_WIDTH                       16  /* EQ3_B5_A - [15:0] */
7380  
7381  /*
7382   * R3662 (0xE4E) - EQ3_19
7383   */
7384  #define ARIZONA_EQ3_B5_B_MASK                    0xFFFF  /* EQ3_B5_B - [15:0] */
7385  #define ARIZONA_EQ3_B5_B_SHIFT                        0  /* EQ3_B5_B - [15:0] */
7386  #define ARIZONA_EQ3_B5_B_WIDTH                       16  /* EQ3_B5_B - [15:0] */
7387  
7388  /*
7389   * R3663 (0xE4F) - EQ3_20
7390   */
7391  #define ARIZONA_EQ3_B5_PG_MASK                   0xFFFF  /* EQ3_B5_PG - [15:0] */
7392  #define ARIZONA_EQ3_B5_PG_SHIFT                       0  /* EQ3_B5_PG - [15:0] */
7393  #define ARIZONA_EQ3_B5_PG_WIDTH                      16  /* EQ3_B5_PG - [15:0] */
7394  
7395  /*
7396   * R3664 (0xE50) - EQ3_21
7397   */
7398  #define ARIZONA_EQ3_B1_C_MASK                    0xFFFF  /* EQ3_B1_C - [15:0] */
7399  #define ARIZONA_EQ3_B1_C_SHIFT                        0  /* EQ3_B1_C - [15:0] */
7400  #define ARIZONA_EQ3_B1_C_WIDTH                       16  /* EQ3_B1_C - [15:0] */
7401  
7402  /*
7403   * R3666 (0xE52) - EQ4_1
7404   */
7405  #define ARIZONA_EQ4_B1_GAIN_MASK                 0xF800  /* EQ4_B1_GAIN - [15:11] */
7406  #define ARIZONA_EQ4_B1_GAIN_SHIFT                    11  /* EQ4_B1_GAIN - [15:11] */
7407  #define ARIZONA_EQ4_B1_GAIN_WIDTH                     5  /* EQ4_B1_GAIN - [15:11] */
7408  #define ARIZONA_EQ4_B2_GAIN_MASK                 0x07C0  /* EQ4_B2_GAIN - [10:6] */
7409  #define ARIZONA_EQ4_B2_GAIN_SHIFT                     6  /* EQ4_B2_GAIN - [10:6] */
7410  #define ARIZONA_EQ4_B2_GAIN_WIDTH                     5  /* EQ4_B2_GAIN - [10:6] */
7411  #define ARIZONA_EQ4_B3_GAIN_MASK                 0x003E  /* EQ4_B3_GAIN - [5:1] */
7412  #define ARIZONA_EQ4_B3_GAIN_SHIFT                     1  /* EQ4_B3_GAIN - [5:1] */
7413  #define ARIZONA_EQ4_B3_GAIN_WIDTH                     5  /* EQ4_B3_GAIN - [5:1] */
7414  #define ARIZONA_EQ4_ENA                          0x0001  /* EQ4_ENA */
7415  #define ARIZONA_EQ4_ENA_MASK                     0x0001  /* EQ4_ENA */
7416  #define ARIZONA_EQ4_ENA_SHIFT                         0  /* EQ4_ENA */
7417  #define ARIZONA_EQ4_ENA_WIDTH                         1  /* EQ4_ENA */
7418  
7419  /*
7420   * R3667 (0xE53) - EQ4_2
7421   */
7422  #define ARIZONA_EQ4_B4_GAIN_MASK                 0xF800  /* EQ4_B4_GAIN - [15:11] */
7423  #define ARIZONA_EQ4_B4_GAIN_SHIFT                    11  /* EQ4_B4_GAIN - [15:11] */
7424  #define ARIZONA_EQ4_B4_GAIN_WIDTH                     5  /* EQ4_B4_GAIN - [15:11] */
7425  #define ARIZONA_EQ4_B5_GAIN_MASK                 0x07C0  /* EQ4_B5_GAIN - [10:6] */
7426  #define ARIZONA_EQ4_B5_GAIN_SHIFT                     6  /* EQ4_B5_GAIN - [10:6] */
7427  #define ARIZONA_EQ4_B5_GAIN_WIDTH                     5  /* EQ4_B5_GAIN - [10:6] */
7428  #define ARIZONA_EQ4_B1_MODE                      0x0001  /* EQ4_B1_MODE */
7429  #define ARIZONA_EQ4_B1_MODE_MASK                 0x0001  /* EQ4_B1_MODE */
7430  #define ARIZONA_EQ4_B1_MODE_SHIFT                     0  /* EQ4_B1_MODE */
7431  #define ARIZONA_EQ4_B1_MODE_WIDTH                     1  /* EQ4_B1_MODE */
7432  
7433  /*
7434   * R3668 (0xE54) - EQ4_3
7435   */
7436  #define ARIZONA_EQ4_B1_A_MASK                    0xFFFF  /* EQ4_B1_A - [15:0] */
7437  #define ARIZONA_EQ4_B1_A_SHIFT                        0  /* EQ4_B1_A - [15:0] */
7438  #define ARIZONA_EQ4_B1_A_WIDTH                       16  /* EQ4_B1_A - [15:0] */
7439  
7440  /*
7441   * R3669 (0xE55) - EQ4_4
7442   */
7443  #define ARIZONA_EQ4_B1_B_MASK                    0xFFFF  /* EQ4_B1_B - [15:0] */
7444  #define ARIZONA_EQ4_B1_B_SHIFT                        0  /* EQ4_B1_B - [15:0] */
7445  #define ARIZONA_EQ4_B1_B_WIDTH                       16  /* EQ4_B1_B - [15:0] */
7446  
7447  /*
7448   * R3670 (0xE56) - EQ4_5
7449   */
7450  #define ARIZONA_EQ4_B1_PG_MASK                   0xFFFF  /* EQ4_B1_PG - [15:0] */
7451  #define ARIZONA_EQ4_B1_PG_SHIFT                       0  /* EQ4_B1_PG - [15:0] */
7452  #define ARIZONA_EQ4_B1_PG_WIDTH                      16  /* EQ4_B1_PG - [15:0] */
7453  
7454  /*
7455   * R3671 (0xE57) - EQ4_6
7456   */
7457  #define ARIZONA_EQ4_B2_A_MASK                    0xFFFF  /* EQ4_B2_A - [15:0] */
7458  #define ARIZONA_EQ4_B2_A_SHIFT                        0  /* EQ4_B2_A - [15:0] */
7459  #define ARIZONA_EQ4_B2_A_WIDTH                       16  /* EQ4_B2_A - [15:0] */
7460  
7461  /*
7462   * R3672 (0xE58) - EQ4_7
7463   */
7464  #define ARIZONA_EQ4_B2_B_MASK                    0xFFFF  /* EQ4_B2_B - [15:0] */
7465  #define ARIZONA_EQ4_B2_B_SHIFT                        0  /* EQ4_B2_B - [15:0] */
7466  #define ARIZONA_EQ4_B2_B_WIDTH                       16  /* EQ4_B2_B - [15:0] */
7467  
7468  /*
7469   * R3673 (0xE59) - EQ4_8
7470   */
7471  #define ARIZONA_EQ4_B2_C_MASK                    0xFFFF  /* EQ4_B2_C - [15:0] */
7472  #define ARIZONA_EQ4_B2_C_SHIFT                        0  /* EQ4_B2_C - [15:0] */
7473  #define ARIZONA_EQ4_B2_C_WIDTH                       16  /* EQ4_B2_C - [15:0] */
7474  
7475  /*
7476   * R3674 (0xE5A) - EQ4_9
7477   */
7478  #define ARIZONA_EQ4_B2_PG_MASK                   0xFFFF  /* EQ4_B2_PG - [15:0] */
7479  #define ARIZONA_EQ4_B2_PG_SHIFT                       0  /* EQ4_B2_PG - [15:0] */
7480  #define ARIZONA_EQ4_B2_PG_WIDTH                      16  /* EQ4_B2_PG - [15:0] */
7481  
7482  /*
7483   * R3675 (0xE5B) - EQ4_10
7484   */
7485  #define ARIZONA_EQ4_B3_A_MASK                    0xFFFF  /* EQ4_B3_A - [15:0] */
7486  #define ARIZONA_EQ4_B3_A_SHIFT                        0  /* EQ4_B3_A - [15:0] */
7487  #define ARIZONA_EQ4_B3_A_WIDTH                       16  /* EQ4_B3_A - [15:0] */
7488  
7489  /*
7490   * R3676 (0xE5C) - EQ4_11
7491   */
7492  #define ARIZONA_EQ4_B3_B_MASK                    0xFFFF  /* EQ4_B3_B - [15:0] */
7493  #define ARIZONA_EQ4_B3_B_SHIFT                        0  /* EQ4_B3_B - [15:0] */
7494  #define ARIZONA_EQ4_B3_B_WIDTH                       16  /* EQ4_B3_B - [15:0] */
7495  
7496  /*
7497   * R3677 (0xE5D) - EQ4_12
7498   */
7499  #define ARIZONA_EQ4_B3_C_MASK                    0xFFFF  /* EQ4_B3_C - [15:0] */
7500  #define ARIZONA_EQ4_B3_C_SHIFT                        0  /* EQ4_B3_C - [15:0] */
7501  #define ARIZONA_EQ4_B3_C_WIDTH                       16  /* EQ4_B3_C - [15:0] */
7502  
7503  /*
7504   * R3678 (0xE5E) - EQ4_13
7505   */
7506  #define ARIZONA_EQ4_B3_PG_MASK                   0xFFFF  /* EQ4_B3_PG - [15:0] */
7507  #define ARIZONA_EQ4_B3_PG_SHIFT                       0  /* EQ4_B3_PG - [15:0] */
7508  #define ARIZONA_EQ4_B3_PG_WIDTH                      16  /* EQ4_B3_PG - [15:0] */
7509  
7510  /*
7511   * R3679 (0xE5F) - EQ4_14
7512   */
7513  #define ARIZONA_EQ4_B4_A_MASK                    0xFFFF  /* EQ4_B4_A - [15:0] */
7514  #define ARIZONA_EQ4_B4_A_SHIFT                        0  /* EQ4_B4_A - [15:0] */
7515  #define ARIZONA_EQ4_B4_A_WIDTH                       16  /* EQ4_B4_A - [15:0] */
7516  
7517  /*
7518   * R3680 (0xE60) - EQ4_15
7519   */
7520  #define ARIZONA_EQ4_B4_B_MASK                    0xFFFF  /* EQ4_B4_B - [15:0] */
7521  #define ARIZONA_EQ4_B4_B_SHIFT                        0  /* EQ4_B4_B - [15:0] */
7522  #define ARIZONA_EQ4_B4_B_WIDTH                       16  /* EQ4_B4_B - [15:0] */
7523  
7524  /*
7525   * R3681 (0xE61) - EQ4_16
7526   */
7527  #define ARIZONA_EQ4_B4_C_MASK                    0xFFFF  /* EQ4_B4_C - [15:0] */
7528  #define ARIZONA_EQ4_B4_C_SHIFT                        0  /* EQ4_B4_C - [15:0] */
7529  #define ARIZONA_EQ4_B4_C_WIDTH                       16  /* EQ4_B4_C - [15:0] */
7530  
7531  /*
7532   * R3682 (0xE62) - EQ4_17
7533   */
7534  #define ARIZONA_EQ4_B4_PG_MASK                   0xFFFF  /* EQ4_B4_PG - [15:0] */
7535  #define ARIZONA_EQ4_B4_PG_SHIFT                       0  /* EQ4_B4_PG - [15:0] */
7536  #define ARIZONA_EQ4_B4_PG_WIDTH                      16  /* EQ4_B4_PG - [15:0] */
7537  
7538  /*
7539   * R3683 (0xE63) - EQ4_18
7540   */
7541  #define ARIZONA_EQ4_B5_A_MASK                    0xFFFF  /* EQ4_B5_A - [15:0] */
7542  #define ARIZONA_EQ4_B5_A_SHIFT                        0  /* EQ4_B5_A - [15:0] */
7543  #define ARIZONA_EQ4_B5_A_WIDTH                       16  /* EQ4_B5_A - [15:0] */
7544  
7545  /*
7546   * R3684 (0xE64) - EQ4_19
7547   */
7548  #define ARIZONA_EQ4_B5_B_MASK                    0xFFFF  /* EQ4_B5_B - [15:0] */
7549  #define ARIZONA_EQ4_B5_B_SHIFT                        0  /* EQ4_B5_B - [15:0] */
7550  #define ARIZONA_EQ4_B5_B_WIDTH                       16  /* EQ4_B5_B - [15:0] */
7551  
7552  /*
7553   * R3685 (0xE65) - EQ4_20
7554   */
7555  #define ARIZONA_EQ4_B5_PG_MASK                   0xFFFF  /* EQ4_B5_PG - [15:0] */
7556  #define ARIZONA_EQ4_B5_PG_SHIFT                       0  /* EQ4_B5_PG - [15:0] */
7557  #define ARIZONA_EQ4_B5_PG_WIDTH                      16  /* EQ4_B5_PG - [15:0] */
7558  
7559  /*
7560   * R3686 (0xE66) - EQ4_21
7561   */
7562  #define ARIZONA_EQ4_B1_C_MASK                    0xFFFF  /* EQ4_B1_C - [15:0] */
7563  #define ARIZONA_EQ4_B1_C_SHIFT                        0  /* EQ4_B1_C - [15:0] */
7564  #define ARIZONA_EQ4_B1_C_WIDTH                       16  /* EQ4_B1_C - [15:0] */
7565  
7566  /*
7567   * R3712 (0xE80) - DRC1 ctrl1
7568   */
7569  #define ARIZONA_DRC1_SIG_DET_RMS_MASK            0xF800  /* DRC1_SIG_DET_RMS - [15:11] */
7570  #define ARIZONA_DRC1_SIG_DET_RMS_SHIFT               11  /* DRC1_SIG_DET_RMS - [15:11] */
7571  #define ARIZONA_DRC1_SIG_DET_RMS_WIDTH                5  /* DRC1_SIG_DET_RMS - [15:11] */
7572  #define ARIZONA_DRC1_SIG_DET_PK_MASK             0x0600  /* DRC1_SIG_DET_PK - [10:9] */
7573  #define ARIZONA_DRC1_SIG_DET_PK_SHIFT                 9  /* DRC1_SIG_DET_PK - [10:9] */
7574  #define ARIZONA_DRC1_SIG_DET_PK_WIDTH                 2  /* DRC1_SIG_DET_PK - [10:9] */
7575  #define ARIZONA_DRC1_NG_ENA                      0x0100  /* DRC1_NG_ENA */
7576  #define ARIZONA_DRC1_NG_ENA_MASK                 0x0100  /* DRC1_NG_ENA */
7577  #define ARIZONA_DRC1_NG_ENA_SHIFT                     8  /* DRC1_NG_ENA */
7578  #define ARIZONA_DRC1_NG_ENA_WIDTH                     1  /* DRC1_NG_ENA */
7579  #define ARIZONA_DRC1_SIG_DET_MODE                0x0080  /* DRC1_SIG_DET_MODE */
7580  #define ARIZONA_DRC1_SIG_DET_MODE_MASK           0x0080  /* DRC1_SIG_DET_MODE */
7581  #define ARIZONA_DRC1_SIG_DET_MODE_SHIFT               7  /* DRC1_SIG_DET_MODE */
7582  #define ARIZONA_DRC1_SIG_DET_MODE_WIDTH               1  /* DRC1_SIG_DET_MODE */
7583  #define ARIZONA_DRC1_SIG_DET                     0x0040  /* DRC1_SIG_DET */
7584  #define ARIZONA_DRC1_SIG_DET_MASK                0x0040  /* DRC1_SIG_DET */
7585  #define ARIZONA_DRC1_SIG_DET_SHIFT                    6  /* DRC1_SIG_DET */
7586  #define ARIZONA_DRC1_SIG_DET_WIDTH                    1  /* DRC1_SIG_DET */
7587  #define ARIZONA_DRC1_KNEE2_OP_ENA                0x0020  /* DRC1_KNEE2_OP_ENA */
7588  #define ARIZONA_DRC1_KNEE2_OP_ENA_MASK           0x0020  /* DRC1_KNEE2_OP_ENA */
7589  #define ARIZONA_DRC1_KNEE2_OP_ENA_SHIFT               5  /* DRC1_KNEE2_OP_ENA */
7590  #define ARIZONA_DRC1_KNEE2_OP_ENA_WIDTH               1  /* DRC1_KNEE2_OP_ENA */
7591  #define ARIZONA_DRC1_QR                          0x0010  /* DRC1_QR */
7592  #define ARIZONA_DRC1_QR_MASK                     0x0010  /* DRC1_QR */
7593  #define ARIZONA_DRC1_QR_SHIFT                         4  /* DRC1_QR */
7594  #define ARIZONA_DRC1_QR_WIDTH                         1  /* DRC1_QR */
7595  #define ARIZONA_DRC1_ANTICLIP                    0x0008  /* DRC1_ANTICLIP */
7596  #define ARIZONA_DRC1_ANTICLIP_MASK               0x0008  /* DRC1_ANTICLIP */
7597  #define ARIZONA_DRC1_ANTICLIP_SHIFT                   3  /* DRC1_ANTICLIP */
7598  #define ARIZONA_DRC1_ANTICLIP_WIDTH                   1  /* DRC1_ANTICLIP */
7599  #define ARIZONA_DRC1L_ENA                        0x0002  /* DRC1L_ENA */
7600  #define ARIZONA_DRC1L_ENA_MASK                   0x0002  /* DRC1L_ENA */
7601  #define ARIZONA_DRC1L_ENA_SHIFT                       1  /* DRC1L_ENA */
7602  #define ARIZONA_DRC1L_ENA_WIDTH                       1  /* DRC1L_ENA */
7603  #define ARIZONA_DRC1R_ENA                        0x0001  /* DRC1R_ENA */
7604  #define ARIZONA_DRC1R_ENA_MASK                   0x0001  /* DRC1R_ENA */
7605  #define ARIZONA_DRC1R_ENA_SHIFT                       0  /* DRC1R_ENA */
7606  #define ARIZONA_DRC1R_ENA_WIDTH                       1  /* DRC1R_ENA */
7607  
7608  /*
7609   * R3713 (0xE81) - DRC1 ctrl2
7610   */
7611  #define ARIZONA_DRC1_ATK_MASK                    0x1E00  /* DRC1_ATK - [12:9] */
7612  #define ARIZONA_DRC1_ATK_SHIFT                        9  /* DRC1_ATK - [12:9] */
7613  #define ARIZONA_DRC1_ATK_WIDTH                        4  /* DRC1_ATK - [12:9] */
7614  #define ARIZONA_DRC1_DCY_MASK                    0x01E0  /* DRC1_DCY - [8:5] */
7615  #define ARIZONA_DRC1_DCY_SHIFT                        5  /* DRC1_DCY - [8:5] */
7616  #define ARIZONA_DRC1_DCY_WIDTH                        4  /* DRC1_DCY - [8:5] */
7617  #define ARIZONA_DRC1_MINGAIN_MASK                0x001C  /* DRC1_MINGAIN - [4:2] */
7618  #define ARIZONA_DRC1_MINGAIN_SHIFT                    2  /* DRC1_MINGAIN - [4:2] */
7619  #define ARIZONA_DRC1_MINGAIN_WIDTH                    3  /* DRC1_MINGAIN - [4:2] */
7620  #define ARIZONA_DRC1_MAXGAIN_MASK                0x0003  /* DRC1_MAXGAIN - [1:0] */
7621  #define ARIZONA_DRC1_MAXGAIN_SHIFT                    0  /* DRC1_MAXGAIN - [1:0] */
7622  #define ARIZONA_DRC1_MAXGAIN_WIDTH                    2  /* DRC1_MAXGAIN - [1:0] */
7623  
7624  /*
7625   * R3714 (0xE82) - DRC1 ctrl3
7626   */
7627  #define ARIZONA_DRC1_NG_MINGAIN_MASK             0xF000  /* DRC1_NG_MINGAIN - [15:12] */
7628  #define ARIZONA_DRC1_NG_MINGAIN_SHIFT                12  /* DRC1_NG_MINGAIN - [15:12] */
7629  #define ARIZONA_DRC1_NG_MINGAIN_WIDTH                 4  /* DRC1_NG_MINGAIN - [15:12] */
7630  #define ARIZONA_DRC1_NG_EXP_MASK                 0x0C00  /* DRC1_NG_EXP - [11:10] */
7631  #define ARIZONA_DRC1_NG_EXP_SHIFT                    10  /* DRC1_NG_EXP - [11:10] */
7632  #define ARIZONA_DRC1_NG_EXP_WIDTH                     2  /* DRC1_NG_EXP - [11:10] */
7633  #define ARIZONA_DRC1_QR_THR_MASK                 0x0300  /* DRC1_QR_THR - [9:8] */
7634  #define ARIZONA_DRC1_QR_THR_SHIFT                     8  /* DRC1_QR_THR - [9:8] */
7635  #define ARIZONA_DRC1_QR_THR_WIDTH                     2  /* DRC1_QR_THR - [9:8] */
7636  #define ARIZONA_DRC1_QR_DCY_MASK                 0x00C0  /* DRC1_QR_DCY - [7:6] */
7637  #define ARIZONA_DRC1_QR_DCY_SHIFT                     6  /* DRC1_QR_DCY - [7:6] */
7638  #define ARIZONA_DRC1_QR_DCY_WIDTH                     2  /* DRC1_QR_DCY - [7:6] */
7639  #define ARIZONA_DRC1_HI_COMP_MASK                0x0038  /* DRC1_HI_COMP - [5:3] */
7640  #define ARIZONA_DRC1_HI_COMP_SHIFT                    3  /* DRC1_HI_COMP - [5:3] */
7641  #define ARIZONA_DRC1_HI_COMP_WIDTH                    3  /* DRC1_HI_COMP - [5:3] */
7642  #define ARIZONA_DRC1_LO_COMP_MASK                0x0007  /* DRC1_LO_COMP - [2:0] */
7643  #define ARIZONA_DRC1_LO_COMP_SHIFT                    0  /* DRC1_LO_COMP - [2:0] */
7644  #define ARIZONA_DRC1_LO_COMP_WIDTH                    3  /* DRC1_LO_COMP - [2:0] */
7645  
7646  /*
7647   * R3715 (0xE83) - DRC1 ctrl4
7648   */
7649  #define ARIZONA_DRC1_KNEE_IP_MASK                0x07E0  /* DRC1_KNEE_IP - [10:5] */
7650  #define ARIZONA_DRC1_KNEE_IP_SHIFT                    5  /* DRC1_KNEE_IP - [10:5] */
7651  #define ARIZONA_DRC1_KNEE_IP_WIDTH                    6  /* DRC1_KNEE_IP - [10:5] */
7652  #define ARIZONA_DRC1_KNEE_OP_MASK                0x001F  /* DRC1_KNEE_OP - [4:0] */
7653  #define ARIZONA_DRC1_KNEE_OP_SHIFT                    0  /* DRC1_KNEE_OP - [4:0] */
7654  #define ARIZONA_DRC1_KNEE_OP_WIDTH                    5  /* DRC1_KNEE_OP - [4:0] */
7655  
7656  /*
7657   * R3716 (0xE84) - DRC1 ctrl5
7658   */
7659  #define ARIZONA_DRC1_KNEE2_IP_MASK               0x03E0  /* DRC1_KNEE2_IP - [9:5] */
7660  #define ARIZONA_DRC1_KNEE2_IP_SHIFT                   5  /* DRC1_KNEE2_IP - [9:5] */
7661  #define ARIZONA_DRC1_KNEE2_IP_WIDTH                   5  /* DRC1_KNEE2_IP - [9:5] */
7662  #define ARIZONA_DRC1_KNEE2_OP_MASK               0x001F  /* DRC1_KNEE2_OP - [4:0] */
7663  #define ARIZONA_DRC1_KNEE2_OP_SHIFT                   0  /* DRC1_KNEE2_OP - [4:0] */
7664  #define ARIZONA_DRC1_KNEE2_OP_WIDTH                   5  /* DRC1_KNEE2_OP - [4:0] */
7665  
7666  /*
7667   * R3721 (0xE89) - DRC2 ctrl1
7668   */
7669  #define ARIZONA_DRC2_SIG_DET_RMS_MASK            0xF800  /* DRC2_SIG_DET_RMS - [15:11] */
7670  #define ARIZONA_DRC2_SIG_DET_RMS_SHIFT               11  /* DRC2_SIG_DET_RMS - [15:11] */
7671  #define ARIZONA_DRC2_SIG_DET_RMS_WIDTH                5  /* DRC2_SIG_DET_RMS - [15:11] */
7672  #define ARIZONA_DRC2_SIG_DET_PK_MASK             0x0600  /* DRC2_SIG_DET_PK - [10:9] */
7673  #define ARIZONA_DRC2_SIG_DET_PK_SHIFT                 9  /* DRC2_SIG_DET_PK - [10:9] */
7674  #define ARIZONA_DRC2_SIG_DET_PK_WIDTH                 2  /* DRC2_SIG_DET_PK - [10:9] */
7675  #define ARIZONA_DRC2_NG_ENA                      0x0100  /* DRC2_NG_ENA */
7676  #define ARIZONA_DRC2_NG_ENA_MASK                 0x0100  /* DRC2_NG_ENA */
7677  #define ARIZONA_DRC2_NG_ENA_SHIFT                     8  /* DRC2_NG_ENA */
7678  #define ARIZONA_DRC2_NG_ENA_WIDTH                     1  /* DRC2_NG_ENA */
7679  #define ARIZONA_DRC2_SIG_DET_MODE                0x0080  /* DRC2_SIG_DET_MODE */
7680  #define ARIZONA_DRC2_SIG_DET_MODE_MASK           0x0080  /* DRC2_SIG_DET_MODE */
7681  #define ARIZONA_DRC2_SIG_DET_MODE_SHIFT               7  /* DRC2_SIG_DET_MODE */
7682  #define ARIZONA_DRC2_SIG_DET_MODE_WIDTH               1  /* DRC2_SIG_DET_MODE */
7683  #define ARIZONA_DRC2_SIG_DET                     0x0040  /* DRC2_SIG_DET */
7684  #define ARIZONA_DRC2_SIG_DET_MASK                0x0040  /* DRC2_SIG_DET */
7685  #define ARIZONA_DRC2_SIG_DET_SHIFT                    6  /* DRC2_SIG_DET */
7686  #define ARIZONA_DRC2_SIG_DET_WIDTH                    1  /* DRC2_SIG_DET */
7687  #define ARIZONA_DRC2_KNEE2_OP_ENA                0x0020  /* DRC2_KNEE2_OP_ENA */
7688  #define ARIZONA_DRC2_KNEE2_OP_ENA_MASK           0x0020  /* DRC2_KNEE2_OP_ENA */
7689  #define ARIZONA_DRC2_KNEE2_OP_ENA_SHIFT               5  /* DRC2_KNEE2_OP_ENA */
7690  #define ARIZONA_DRC2_KNEE2_OP_ENA_WIDTH               1  /* DRC2_KNEE2_OP_ENA */
7691  #define ARIZONA_DRC2_QR                          0x0010  /* DRC2_QR */
7692  #define ARIZONA_DRC2_QR_MASK                     0x0010  /* DRC2_QR */
7693  #define ARIZONA_DRC2_QR_SHIFT                         4  /* DRC2_QR */
7694  #define ARIZONA_DRC2_QR_WIDTH                         1  /* DRC2_QR */
7695  #define ARIZONA_DRC2_ANTICLIP                    0x0008  /* DRC2_ANTICLIP */
7696  #define ARIZONA_DRC2_ANTICLIP_MASK               0x0008  /* DRC2_ANTICLIP */
7697  #define ARIZONA_DRC2_ANTICLIP_SHIFT                   3  /* DRC2_ANTICLIP */
7698  #define ARIZONA_DRC2_ANTICLIP_WIDTH                   1  /* DRC2_ANTICLIP */
7699  #define ARIZONA_DRC2L_ENA                        0x0002  /* DRC2L_ENA */
7700  #define ARIZONA_DRC2L_ENA_MASK                   0x0002  /* DRC2L_ENA */
7701  #define ARIZONA_DRC2L_ENA_SHIFT                       1  /* DRC2L_ENA */
7702  #define ARIZONA_DRC2L_ENA_WIDTH                       1  /* DRC2L_ENA */
7703  #define ARIZONA_DRC2R_ENA                        0x0001  /* DRC2R_ENA */
7704  #define ARIZONA_DRC2R_ENA_MASK                   0x0001  /* DRC2R_ENA */
7705  #define ARIZONA_DRC2R_ENA_SHIFT                       0  /* DRC2R_ENA */
7706  #define ARIZONA_DRC2R_ENA_WIDTH                       1  /* DRC2R_ENA */
7707  
7708  /*
7709   * R3722 (0xE8A) - DRC2 ctrl2
7710   */
7711  #define ARIZONA_DRC2_ATK_MASK                    0x1E00  /* DRC2_ATK - [12:9] */
7712  #define ARIZONA_DRC2_ATK_SHIFT                        9  /* DRC2_ATK - [12:9] */
7713  #define ARIZONA_DRC2_ATK_WIDTH                        4  /* DRC2_ATK - [12:9] */
7714  #define ARIZONA_DRC2_DCY_MASK                    0x01E0  /* DRC2_DCY - [8:5] */
7715  #define ARIZONA_DRC2_DCY_SHIFT                        5  /* DRC2_DCY - [8:5] */
7716  #define ARIZONA_DRC2_DCY_WIDTH                        4  /* DRC2_DCY - [8:5] */
7717  #define ARIZONA_DRC2_MINGAIN_MASK                0x001C  /* DRC2_MINGAIN - [4:2] */
7718  #define ARIZONA_DRC2_MINGAIN_SHIFT                    2  /* DRC2_MINGAIN - [4:2] */
7719  #define ARIZONA_DRC2_MINGAIN_WIDTH                    3  /* DRC2_MINGAIN - [4:2] */
7720  #define ARIZONA_DRC2_MAXGAIN_MASK                0x0003  /* DRC2_MAXGAIN - [1:0] */
7721  #define ARIZONA_DRC2_MAXGAIN_SHIFT                    0  /* DRC2_MAXGAIN - [1:0] */
7722  #define ARIZONA_DRC2_MAXGAIN_WIDTH                    2  /* DRC2_MAXGAIN - [1:0] */
7723  
7724  /*
7725   * R3723 (0xE8B) - DRC2 ctrl3
7726   */
7727  #define ARIZONA_DRC2_NG_MINGAIN_MASK             0xF000  /* DRC2_NG_MINGAIN - [15:12] */
7728  #define ARIZONA_DRC2_NG_MINGAIN_SHIFT                12  /* DRC2_NG_MINGAIN - [15:12] */
7729  #define ARIZONA_DRC2_NG_MINGAIN_WIDTH                 4  /* DRC2_NG_MINGAIN - [15:12] */
7730  #define ARIZONA_DRC2_NG_EXP_MASK                 0x0C00  /* DRC2_NG_EXP - [11:10] */
7731  #define ARIZONA_DRC2_NG_EXP_SHIFT                    10  /* DRC2_NG_EXP - [11:10] */
7732  #define ARIZONA_DRC2_NG_EXP_WIDTH                     2  /* DRC2_NG_EXP - [11:10] */
7733  #define ARIZONA_DRC2_QR_THR_MASK                 0x0300  /* DRC2_QR_THR - [9:8] */
7734  #define ARIZONA_DRC2_QR_THR_SHIFT                     8  /* DRC2_QR_THR - [9:8] */
7735  #define ARIZONA_DRC2_QR_THR_WIDTH                     2  /* DRC2_QR_THR - [9:8] */
7736  #define ARIZONA_DRC2_QR_DCY_MASK                 0x00C0  /* DRC2_QR_DCY - [7:6] */
7737  #define ARIZONA_DRC2_QR_DCY_SHIFT                     6  /* DRC2_QR_DCY - [7:6] */
7738  #define ARIZONA_DRC2_QR_DCY_WIDTH                     2  /* DRC2_QR_DCY - [7:6] */
7739  #define ARIZONA_DRC2_HI_COMP_MASK                0x0038  /* DRC2_HI_COMP - [5:3] */
7740  #define ARIZONA_DRC2_HI_COMP_SHIFT                    3  /* DRC2_HI_COMP - [5:3] */
7741  #define ARIZONA_DRC2_HI_COMP_WIDTH                    3  /* DRC2_HI_COMP - [5:3] */
7742  #define ARIZONA_DRC2_LO_COMP_MASK                0x0007  /* DRC2_LO_COMP - [2:0] */
7743  #define ARIZONA_DRC2_LO_COMP_SHIFT                    0  /* DRC2_LO_COMP - [2:0] */
7744  #define ARIZONA_DRC2_LO_COMP_WIDTH                    3  /* DRC2_LO_COMP - [2:0] */
7745  
7746  /*
7747   * R3724 (0xE8C) - DRC2 ctrl4
7748   */
7749  #define ARIZONA_DRC2_KNEE_IP_MASK                0x07E0  /* DRC2_KNEE_IP - [10:5] */
7750  #define ARIZONA_DRC2_KNEE_IP_SHIFT                    5  /* DRC2_KNEE_IP - [10:5] */
7751  #define ARIZONA_DRC2_KNEE_IP_WIDTH                    6  /* DRC2_KNEE_IP - [10:5] */
7752  #define ARIZONA_DRC2_KNEE_OP_MASK                0x001F  /* DRC2_KNEE_OP - [4:0] */
7753  #define ARIZONA_DRC2_KNEE_OP_SHIFT                    0  /* DRC2_KNEE_OP - [4:0] */
7754  #define ARIZONA_DRC2_KNEE_OP_WIDTH                    5  /* DRC2_KNEE_OP - [4:0] */
7755  
7756  /*
7757   * R3725 (0xE8D) - DRC2 ctrl5
7758   */
7759  #define ARIZONA_DRC2_KNEE2_IP_MASK               0x03E0  /* DRC2_KNEE2_IP - [9:5] */
7760  #define ARIZONA_DRC2_KNEE2_IP_SHIFT                   5  /* DRC2_KNEE2_IP - [9:5] */
7761  #define ARIZONA_DRC2_KNEE2_IP_WIDTH                   5  /* DRC2_KNEE2_IP - [9:5] */
7762  #define ARIZONA_DRC2_KNEE2_OP_MASK               0x001F  /* DRC2_KNEE2_OP - [4:0] */
7763  #define ARIZONA_DRC2_KNEE2_OP_SHIFT                   0  /* DRC2_KNEE2_OP - [4:0] */
7764  #define ARIZONA_DRC2_KNEE2_OP_WIDTH                   5  /* DRC2_KNEE2_OP - [4:0] */
7765  
7766  /*
7767   * R3776 (0xEC0) - HPLPF1_1
7768   */
7769  #define ARIZONA_LHPF1_MODE                       0x0002  /* LHPF1_MODE */
7770  #define ARIZONA_LHPF1_MODE_MASK                  0x0002  /* LHPF1_MODE */
7771  #define ARIZONA_LHPF1_MODE_SHIFT                      1  /* LHPF1_MODE */
7772  #define ARIZONA_LHPF1_MODE_WIDTH                      1  /* LHPF1_MODE */
7773  #define ARIZONA_LHPF1_ENA                        0x0001  /* LHPF1_ENA */
7774  #define ARIZONA_LHPF1_ENA_MASK                   0x0001  /* LHPF1_ENA */
7775  #define ARIZONA_LHPF1_ENA_SHIFT                       0  /* LHPF1_ENA */
7776  #define ARIZONA_LHPF1_ENA_WIDTH                       1  /* LHPF1_ENA */
7777  
7778  /*
7779   * R3777 (0xEC1) - HPLPF1_2
7780   */
7781  #define ARIZONA_LHPF1_COEFF_MASK                 0xFFFF  /* LHPF1_COEFF - [15:0] */
7782  #define ARIZONA_LHPF1_COEFF_SHIFT                     0  /* LHPF1_COEFF - [15:0] */
7783  #define ARIZONA_LHPF1_COEFF_WIDTH                    16  /* LHPF1_COEFF - [15:0] */
7784  
7785  /*
7786   * R3780 (0xEC4) - HPLPF2_1
7787   */
7788  #define ARIZONA_LHPF2_MODE                       0x0002  /* LHPF2_MODE */
7789  #define ARIZONA_LHPF2_MODE_MASK                  0x0002  /* LHPF2_MODE */
7790  #define ARIZONA_LHPF2_MODE_SHIFT                      1  /* LHPF2_MODE */
7791  #define ARIZONA_LHPF2_MODE_WIDTH                      1  /* LHPF2_MODE */
7792  #define ARIZONA_LHPF2_ENA                        0x0001  /* LHPF2_ENA */
7793  #define ARIZONA_LHPF2_ENA_MASK                   0x0001  /* LHPF2_ENA */
7794  #define ARIZONA_LHPF2_ENA_SHIFT                       0  /* LHPF2_ENA */
7795  #define ARIZONA_LHPF2_ENA_WIDTH                       1  /* LHPF2_ENA */
7796  
7797  /*
7798   * R3781 (0xEC5) - HPLPF2_2
7799   */
7800  #define ARIZONA_LHPF2_COEFF_MASK                 0xFFFF  /* LHPF2_COEFF - [15:0] */
7801  #define ARIZONA_LHPF2_COEFF_SHIFT                     0  /* LHPF2_COEFF - [15:0] */
7802  #define ARIZONA_LHPF2_COEFF_WIDTH                    16  /* LHPF2_COEFF - [15:0] */
7803  
7804  /*
7805   * R3784 (0xEC8) - HPLPF3_1
7806   */
7807  #define ARIZONA_LHPF3_MODE                       0x0002  /* LHPF3_MODE */
7808  #define ARIZONA_LHPF3_MODE_MASK                  0x0002  /* LHPF3_MODE */
7809  #define ARIZONA_LHPF3_MODE_SHIFT                      1  /* LHPF3_MODE */
7810  #define ARIZONA_LHPF3_MODE_WIDTH                      1  /* LHPF3_MODE */
7811  #define ARIZONA_LHPF3_ENA                        0x0001  /* LHPF3_ENA */
7812  #define ARIZONA_LHPF3_ENA_MASK                   0x0001  /* LHPF3_ENA */
7813  #define ARIZONA_LHPF3_ENA_SHIFT                       0  /* LHPF3_ENA */
7814  #define ARIZONA_LHPF3_ENA_WIDTH                       1  /* LHPF3_ENA */
7815  
7816  /*
7817   * R3785 (0xEC9) - HPLPF3_2
7818   */
7819  #define ARIZONA_LHPF3_COEFF_MASK                 0xFFFF  /* LHPF3_COEFF - [15:0] */
7820  #define ARIZONA_LHPF3_COEFF_SHIFT                     0  /* LHPF3_COEFF - [15:0] */
7821  #define ARIZONA_LHPF3_COEFF_WIDTH                    16  /* LHPF3_COEFF - [15:0] */
7822  
7823  /*
7824   * R3788 (0xECC) - HPLPF4_1
7825   */
7826  #define ARIZONA_LHPF4_MODE                       0x0002  /* LHPF4_MODE */
7827  #define ARIZONA_LHPF4_MODE_MASK                  0x0002  /* LHPF4_MODE */
7828  #define ARIZONA_LHPF4_MODE_SHIFT                      1  /* LHPF4_MODE */
7829  #define ARIZONA_LHPF4_MODE_WIDTH                      1  /* LHPF4_MODE */
7830  #define ARIZONA_LHPF4_ENA                        0x0001  /* LHPF4_ENA */
7831  #define ARIZONA_LHPF4_ENA_MASK                   0x0001  /* LHPF4_ENA */
7832  #define ARIZONA_LHPF4_ENA_SHIFT                       0  /* LHPF4_ENA */
7833  #define ARIZONA_LHPF4_ENA_WIDTH                       1  /* LHPF4_ENA */
7834  
7835  /*
7836   * R3789 (0xECD) - HPLPF4_2
7837   */
7838  #define ARIZONA_LHPF4_COEFF_MASK                 0xFFFF  /* LHPF4_COEFF - [15:0] */
7839  #define ARIZONA_LHPF4_COEFF_SHIFT                     0  /* LHPF4_COEFF - [15:0] */
7840  #define ARIZONA_LHPF4_COEFF_WIDTH                    16  /* LHPF4_COEFF - [15:0] */
7841  
7842  /*
7843   * R3808 (0xEE0) - ASRC_ENABLE
7844   */
7845  #define ARIZONA_ASRC2L_ENA                       0x0008  /* ASRC2L_ENA */
7846  #define ARIZONA_ASRC2L_ENA_MASK                  0x0008  /* ASRC2L_ENA */
7847  #define ARIZONA_ASRC2L_ENA_SHIFT                      3  /* ASRC2L_ENA */
7848  #define ARIZONA_ASRC2L_ENA_WIDTH                      1  /* ASRC2L_ENA */
7849  #define ARIZONA_ASRC2R_ENA                       0x0004  /* ASRC2R_ENA */
7850  #define ARIZONA_ASRC2R_ENA_MASK                  0x0004  /* ASRC2R_ENA */
7851  #define ARIZONA_ASRC2R_ENA_SHIFT                      2  /* ASRC2R_ENA */
7852  #define ARIZONA_ASRC2R_ENA_WIDTH                      1  /* ASRC2R_ENA */
7853  #define ARIZONA_ASRC1L_ENA                       0x0002  /* ASRC1L_ENA */
7854  #define ARIZONA_ASRC1L_ENA_MASK                  0x0002  /* ASRC1L_ENA */
7855  #define ARIZONA_ASRC1L_ENA_SHIFT                      1  /* ASRC1L_ENA */
7856  #define ARIZONA_ASRC1L_ENA_WIDTH                      1  /* ASRC1L_ENA */
7857  #define ARIZONA_ASRC1R_ENA                       0x0001  /* ASRC1R_ENA */
7858  #define ARIZONA_ASRC1R_ENA_MASK                  0x0001  /* ASRC1R_ENA */
7859  #define ARIZONA_ASRC1R_ENA_SHIFT                      0  /* ASRC1R_ENA */
7860  #define ARIZONA_ASRC1R_ENA_WIDTH                      1  /* ASRC1R_ENA */
7861  
7862  /*
7863   * R3810 (0xEE2) - ASRC_RATE1
7864   */
7865  #define ARIZONA_ASRC_RATE1_MASK                  0x7800  /* ASRC_RATE1 - [14:11] */
7866  #define ARIZONA_ASRC_RATE1_SHIFT                     11  /* ASRC_RATE1 - [14:11] */
7867  #define ARIZONA_ASRC_RATE1_WIDTH                      4  /* ASRC_RATE1 - [14:11] */
7868  
7869  /*
7870   * R3811 (0xEE3) - ASRC_RATE2
7871   */
7872  #define ARIZONA_ASRC_RATE2_MASK                  0x7800  /* ASRC_RATE2 - [14:11] */
7873  #define ARIZONA_ASRC_RATE2_SHIFT                     11  /* ASRC_RATE2 - [14:11] */
7874  #define ARIZONA_ASRC_RATE2_WIDTH                      4  /* ASRC_RATE2 - [14:11] */
7875  
7876  /*
7877   * R3824 (0xEF0) - ISRC 1 CTRL 1
7878   */
7879  #define ARIZONA_ISRC1_FSH_MASK                   0x7800  /* ISRC1_FSH - [14:11] */
7880  #define ARIZONA_ISRC1_FSH_SHIFT                      11  /* ISRC1_FSH - [14:11] */
7881  #define ARIZONA_ISRC1_FSH_WIDTH                       4  /* ISRC1_FSH - [14:11] */
7882  #define ARIZONA_ISRC1_CLK_SEL_MASK               0x0700  /* ISRC1_CLK_SEL - [10:8] */
7883  #define ARIZONA_ISRC1_CLK_SEL_SHIFT                   8  /* ISRC1_CLK_SEL - [10:8] */
7884  #define ARIZONA_ISRC1_CLK_SEL_WIDTH                   3  /* ISRC1_CLK_SEL - [10:8] */
7885  
7886  /*
7887   * R3825 (0xEF1) - ISRC 1 CTRL 2
7888   */
7889  #define ARIZONA_ISRC1_FSL_MASK                   0x7800  /* ISRC1_FSL - [14:11] */
7890  #define ARIZONA_ISRC1_FSL_SHIFT                      11  /* ISRC1_FSL - [14:11] */
7891  #define ARIZONA_ISRC1_FSL_WIDTH                       4  /* ISRC1_FSL - [14:11] */
7892  
7893  /*
7894   * R3826 (0xEF2) - ISRC 1 CTRL 3
7895   */
7896  #define ARIZONA_ISRC1_INT0_ENA                   0x8000  /* ISRC1_INT0_ENA */
7897  #define ARIZONA_ISRC1_INT0_ENA_MASK              0x8000  /* ISRC1_INT0_ENA */
7898  #define ARIZONA_ISRC1_INT0_ENA_SHIFT                 15  /* ISRC1_INT0_ENA */
7899  #define ARIZONA_ISRC1_INT0_ENA_WIDTH                  1  /* ISRC1_INT0_ENA */
7900  #define ARIZONA_ISRC1_INT1_ENA                   0x4000  /* ISRC1_INT1_ENA */
7901  #define ARIZONA_ISRC1_INT1_ENA_MASK              0x4000  /* ISRC1_INT1_ENA */
7902  #define ARIZONA_ISRC1_INT1_ENA_SHIFT                 14  /* ISRC1_INT1_ENA */
7903  #define ARIZONA_ISRC1_INT1_ENA_WIDTH                  1  /* ISRC1_INT1_ENA */
7904  #define ARIZONA_ISRC1_INT2_ENA                   0x2000  /* ISRC1_INT2_ENA */
7905  #define ARIZONA_ISRC1_INT2_ENA_MASK              0x2000  /* ISRC1_INT2_ENA */
7906  #define ARIZONA_ISRC1_INT2_ENA_SHIFT                 13  /* ISRC1_INT2_ENA */
7907  #define ARIZONA_ISRC1_INT2_ENA_WIDTH                  1  /* ISRC1_INT2_ENA */
7908  #define ARIZONA_ISRC1_INT3_ENA                   0x1000  /* ISRC1_INT3_ENA */
7909  #define ARIZONA_ISRC1_INT3_ENA_MASK              0x1000  /* ISRC1_INT3_ENA */
7910  #define ARIZONA_ISRC1_INT3_ENA_SHIFT                 12  /* ISRC1_INT3_ENA */
7911  #define ARIZONA_ISRC1_INT3_ENA_WIDTH                  1  /* ISRC1_INT3_ENA */
7912  #define ARIZONA_ISRC1_DEC0_ENA                   0x0200  /* ISRC1_DEC0_ENA */
7913  #define ARIZONA_ISRC1_DEC0_ENA_MASK              0x0200  /* ISRC1_DEC0_ENA */
7914  #define ARIZONA_ISRC1_DEC0_ENA_SHIFT                  9  /* ISRC1_DEC0_ENA */
7915  #define ARIZONA_ISRC1_DEC0_ENA_WIDTH                  1  /* ISRC1_DEC0_ENA */
7916  #define ARIZONA_ISRC1_DEC1_ENA                   0x0100  /* ISRC1_DEC1_ENA */
7917  #define ARIZONA_ISRC1_DEC1_ENA_MASK              0x0100  /* ISRC1_DEC1_ENA */
7918  #define ARIZONA_ISRC1_DEC1_ENA_SHIFT                  8  /* ISRC1_DEC1_ENA */
7919  #define ARIZONA_ISRC1_DEC1_ENA_WIDTH                  1  /* ISRC1_DEC1_ENA */
7920  #define ARIZONA_ISRC1_DEC2_ENA                   0x0080  /* ISRC1_DEC2_ENA */
7921  #define ARIZONA_ISRC1_DEC2_ENA_MASK              0x0080  /* ISRC1_DEC2_ENA */
7922  #define ARIZONA_ISRC1_DEC2_ENA_SHIFT                  7  /* ISRC1_DEC2_ENA */
7923  #define ARIZONA_ISRC1_DEC2_ENA_WIDTH                  1  /* ISRC1_DEC2_ENA */
7924  #define ARIZONA_ISRC1_DEC3_ENA                   0x0040  /* ISRC1_DEC3_ENA */
7925  #define ARIZONA_ISRC1_DEC3_ENA_MASK              0x0040  /* ISRC1_DEC3_ENA */
7926  #define ARIZONA_ISRC1_DEC3_ENA_SHIFT                  6  /* ISRC1_DEC3_ENA */
7927  #define ARIZONA_ISRC1_DEC3_ENA_WIDTH                  1  /* ISRC1_DEC3_ENA */
7928  #define ARIZONA_ISRC1_NOTCH_ENA                  0x0001  /* ISRC1_NOTCH_ENA */
7929  #define ARIZONA_ISRC1_NOTCH_ENA_MASK             0x0001  /* ISRC1_NOTCH_ENA */
7930  #define ARIZONA_ISRC1_NOTCH_ENA_SHIFT                 0  /* ISRC1_NOTCH_ENA */
7931  #define ARIZONA_ISRC1_NOTCH_ENA_WIDTH                 1  /* ISRC1_NOTCH_ENA */
7932  
7933  /*
7934   * R3827 (0xEF3) - ISRC 2 CTRL 1
7935   */
7936  #define ARIZONA_ISRC2_FSH_MASK                   0x7800  /* ISRC2_FSH - [14:11] */
7937  #define ARIZONA_ISRC2_FSH_SHIFT                      11  /* ISRC2_FSH - [14:11] */
7938  #define ARIZONA_ISRC2_FSH_WIDTH                       4  /* ISRC2_FSH - [14:11] */
7939  #define ARIZONA_ISRC2_CLK_SEL_MASK               0x0700  /* ISRC2_CLK_SEL - [10:8] */
7940  #define ARIZONA_ISRC2_CLK_SEL_SHIFT                   8  /* ISRC2_CLK_SEL - [10:8] */
7941  #define ARIZONA_ISRC2_CLK_SEL_WIDTH                   3  /* ISRC2_CLK_SEL - [10:8] */
7942  
7943  /*
7944   * R3828 (0xEF4) - ISRC 2 CTRL 2
7945   */
7946  #define ARIZONA_ISRC2_FSL_MASK                   0x7800  /* ISRC2_FSL - [14:11] */
7947  #define ARIZONA_ISRC2_FSL_SHIFT                      11  /* ISRC2_FSL - [14:11] */
7948  #define ARIZONA_ISRC2_FSL_WIDTH                       4  /* ISRC2_FSL - [14:11] */
7949  
7950  /*
7951   * R3829 (0xEF5) - ISRC 2 CTRL 3
7952   */
7953  #define ARIZONA_ISRC2_INT0_ENA                   0x8000  /* ISRC2_INT0_ENA */
7954  #define ARIZONA_ISRC2_INT0_ENA_MASK              0x8000  /* ISRC2_INT0_ENA */
7955  #define ARIZONA_ISRC2_INT0_ENA_SHIFT                 15  /* ISRC2_INT0_ENA */
7956  #define ARIZONA_ISRC2_INT0_ENA_WIDTH                  1  /* ISRC2_INT0_ENA */
7957  #define ARIZONA_ISRC2_INT1_ENA                   0x4000  /* ISRC2_INT1_ENA */
7958  #define ARIZONA_ISRC2_INT1_ENA_MASK              0x4000  /* ISRC2_INT1_ENA */
7959  #define ARIZONA_ISRC2_INT1_ENA_SHIFT                 14  /* ISRC2_INT1_ENA */
7960  #define ARIZONA_ISRC2_INT1_ENA_WIDTH                  1  /* ISRC2_INT1_ENA */
7961  #define ARIZONA_ISRC2_INT2_ENA                   0x2000  /* ISRC2_INT2_ENA */
7962  #define ARIZONA_ISRC2_INT2_ENA_MASK              0x2000  /* ISRC2_INT2_ENA */
7963  #define ARIZONA_ISRC2_INT2_ENA_SHIFT                 13  /* ISRC2_INT2_ENA */
7964  #define ARIZONA_ISRC2_INT2_ENA_WIDTH                  1  /* ISRC2_INT2_ENA */
7965  #define ARIZONA_ISRC2_INT3_ENA                   0x1000  /* ISRC2_INT3_ENA */
7966  #define ARIZONA_ISRC2_INT3_ENA_MASK              0x1000  /* ISRC2_INT3_ENA */
7967  #define ARIZONA_ISRC2_INT3_ENA_SHIFT                 12  /* ISRC2_INT3_ENA */
7968  #define ARIZONA_ISRC2_INT3_ENA_WIDTH                  1  /* ISRC2_INT3_ENA */
7969  #define ARIZONA_ISRC2_DEC0_ENA                   0x0200  /* ISRC2_DEC0_ENA */
7970  #define ARIZONA_ISRC2_DEC0_ENA_MASK              0x0200  /* ISRC2_DEC0_ENA */
7971  #define ARIZONA_ISRC2_DEC0_ENA_SHIFT                  9  /* ISRC2_DEC0_ENA */
7972  #define ARIZONA_ISRC2_DEC0_ENA_WIDTH                  1  /* ISRC2_DEC0_ENA */
7973  #define ARIZONA_ISRC2_DEC1_ENA                   0x0100  /* ISRC2_DEC1_ENA */
7974  #define ARIZONA_ISRC2_DEC1_ENA_MASK              0x0100  /* ISRC2_DEC1_ENA */
7975  #define ARIZONA_ISRC2_DEC1_ENA_SHIFT                  8  /* ISRC2_DEC1_ENA */
7976  #define ARIZONA_ISRC2_DEC1_ENA_WIDTH                  1  /* ISRC2_DEC1_ENA */
7977  #define ARIZONA_ISRC2_DEC2_ENA                   0x0080  /* ISRC2_DEC2_ENA */
7978  #define ARIZONA_ISRC2_DEC2_ENA_MASK              0x0080  /* ISRC2_DEC2_ENA */
7979  #define ARIZONA_ISRC2_DEC2_ENA_SHIFT                  7  /* ISRC2_DEC2_ENA */
7980  #define ARIZONA_ISRC2_DEC2_ENA_WIDTH                  1  /* ISRC2_DEC2_ENA */
7981  #define ARIZONA_ISRC2_DEC3_ENA                   0x0040  /* ISRC2_DEC3_ENA */
7982  #define ARIZONA_ISRC2_DEC3_ENA_MASK              0x0040  /* ISRC2_DEC3_ENA */
7983  #define ARIZONA_ISRC2_DEC3_ENA_SHIFT                  6  /* ISRC2_DEC3_ENA */
7984  #define ARIZONA_ISRC2_DEC3_ENA_WIDTH                  1  /* ISRC2_DEC3_ENA */
7985  #define ARIZONA_ISRC2_NOTCH_ENA                  0x0001  /* ISRC2_NOTCH_ENA */
7986  #define ARIZONA_ISRC2_NOTCH_ENA_MASK             0x0001  /* ISRC2_NOTCH_ENA */
7987  #define ARIZONA_ISRC2_NOTCH_ENA_SHIFT                 0  /* ISRC2_NOTCH_ENA */
7988  #define ARIZONA_ISRC2_NOTCH_ENA_WIDTH                 1  /* ISRC2_NOTCH_ENA */
7989  
7990  /*
7991   * R3830 (0xEF6) - ISRC 3 CTRL 1
7992   */
7993  #define ARIZONA_ISRC3_FSH_MASK                   0x7800  /* ISRC3_FSH - [14:11] */
7994  #define ARIZONA_ISRC3_FSH_SHIFT                      11  /* ISRC3_FSH - [14:11] */
7995  #define ARIZONA_ISRC3_FSH_WIDTH                       4  /* ISRC3_FSH - [14:11] */
7996  #define ARIZONA_ISRC3_CLK_SEL_MASK               0x0700  /* ISRC3_CLK_SEL - [10:8] */
7997  #define ARIZONA_ISRC3_CLK_SEL_SHIFT                   8  /* ISRC3_CLK_SEL - [10:8] */
7998  #define ARIZONA_ISRC3_CLK_SEL_WIDTH                   3  /* ISRC3_CLK_SEL - [10:8] */
7999  
8000  /*
8001   * R3831 (0xEF7) - ISRC 3 CTRL 2
8002   */
8003  #define ARIZONA_ISRC3_FSL_MASK                   0x7800  /* ISRC3_FSL - [14:11] */
8004  #define ARIZONA_ISRC3_FSL_SHIFT                      11  /* ISRC3_FSL - [14:11] */
8005  #define ARIZONA_ISRC3_FSL_WIDTH                       4  /* ISRC3_FSL - [14:11] */
8006  
8007  /*
8008   * R3832 (0xEF8) - ISRC 3 CTRL 3
8009   */
8010  #define ARIZONA_ISRC3_INT0_ENA                   0x8000  /* ISRC3_INT0_ENA */
8011  #define ARIZONA_ISRC3_INT0_ENA_MASK              0x8000  /* ISRC3_INT0_ENA */
8012  #define ARIZONA_ISRC3_INT0_ENA_SHIFT                 15  /* ISRC3_INT0_ENA */
8013  #define ARIZONA_ISRC3_INT0_ENA_WIDTH                  1  /* ISRC3_INT0_ENA */
8014  #define ARIZONA_ISRC3_INT1_ENA                   0x4000  /* ISRC3_INT1_ENA */
8015  #define ARIZONA_ISRC3_INT1_ENA_MASK              0x4000  /* ISRC3_INT1_ENA */
8016  #define ARIZONA_ISRC3_INT1_ENA_SHIFT                 14  /* ISRC3_INT1_ENA */
8017  #define ARIZONA_ISRC3_INT1_ENA_WIDTH                  1  /* ISRC3_INT1_ENA */
8018  #define ARIZONA_ISRC3_INT2_ENA                   0x2000  /* ISRC3_INT2_ENA */
8019  #define ARIZONA_ISRC3_INT2_ENA_MASK              0x2000  /* ISRC3_INT2_ENA */
8020  #define ARIZONA_ISRC3_INT2_ENA_SHIFT                 13  /* ISRC3_INT2_ENA */
8021  #define ARIZONA_ISRC3_INT2_ENA_WIDTH                  1  /* ISRC3_INT2_ENA */
8022  #define ARIZONA_ISRC3_INT3_ENA                   0x1000  /* ISRC3_INT3_ENA */
8023  #define ARIZONA_ISRC3_INT3_ENA_MASK              0x1000  /* ISRC3_INT3_ENA */
8024  #define ARIZONA_ISRC3_INT3_ENA_SHIFT                 12  /* ISRC3_INT3_ENA */
8025  #define ARIZONA_ISRC3_INT3_ENA_WIDTH                  1  /* ISRC3_INT3_ENA */
8026  #define ARIZONA_ISRC3_DEC0_ENA                   0x0200  /* ISRC3_DEC0_ENA */
8027  #define ARIZONA_ISRC3_DEC0_ENA_MASK              0x0200  /* ISRC3_DEC0_ENA */
8028  #define ARIZONA_ISRC3_DEC0_ENA_SHIFT                  9  /* ISRC3_DEC0_ENA */
8029  #define ARIZONA_ISRC3_DEC0_ENA_WIDTH                  1  /* ISRC3_DEC0_ENA */
8030  #define ARIZONA_ISRC3_DEC1_ENA                   0x0100  /* ISRC3_DEC1_ENA */
8031  #define ARIZONA_ISRC3_DEC1_ENA_MASK              0x0100  /* ISRC3_DEC1_ENA */
8032  #define ARIZONA_ISRC3_DEC1_ENA_SHIFT                  8  /* ISRC3_DEC1_ENA */
8033  #define ARIZONA_ISRC3_DEC1_ENA_WIDTH                  1  /* ISRC3_DEC1_ENA */
8034  #define ARIZONA_ISRC3_DEC2_ENA                   0x0080  /* ISRC3_DEC2_ENA */
8035  #define ARIZONA_ISRC3_DEC2_ENA_MASK              0x0080  /* ISRC3_DEC2_ENA */
8036  #define ARIZONA_ISRC3_DEC2_ENA_SHIFT                  7  /* ISRC3_DEC2_ENA */
8037  #define ARIZONA_ISRC3_DEC2_ENA_WIDTH                  1  /* ISRC3_DEC2_ENA */
8038  #define ARIZONA_ISRC3_DEC3_ENA                   0x0040  /* ISRC3_DEC3_ENA */
8039  #define ARIZONA_ISRC3_DEC3_ENA_MASK              0x0040  /* ISRC3_DEC3_ENA */
8040  #define ARIZONA_ISRC3_DEC3_ENA_SHIFT                  6  /* ISRC3_DEC3_ENA */
8041  #define ARIZONA_ISRC3_DEC3_ENA_WIDTH                  1  /* ISRC3_DEC3_ENA */
8042  #define ARIZONA_ISRC3_NOTCH_ENA                  0x0001  /* ISRC3_NOTCH_ENA */
8043  #define ARIZONA_ISRC3_NOTCH_ENA_MASK             0x0001  /* ISRC3_NOTCH_ENA */
8044  #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT                 0  /* ISRC3_NOTCH_ENA */
8045  #define ARIZONA_ISRC3_NOTCH_ENA_WIDTH                 1  /* ISRC3_NOTCH_ENA */
8046  
8047  /*
8048   * R3840 (0xF00) - Clock Control
8049   */
8050  #define ARIZONA_EXT_NG_SEL_CLR                   0x0080  /* EXT_NG_SEL_CLR */
8051  #define ARIZONA_EXT_NG_SEL_CLR_MASK              0x0080  /* EXT_NG_SEL_CLR */
8052  #define ARIZONA_EXT_NG_SEL_CLR_SHIFT                  7  /* EXT_NG_SEL_CLR */
8053  #define ARIZONA_EXT_NG_SEL_CLR_WIDTH                  1  /* EXT_NG_SEL_CLR */
8054  #define ARIZONA_EXT_NG_SEL_SET                   0x0040  /* EXT_NG_SEL_SET */
8055  #define ARIZONA_EXT_NG_SEL_SET_MASK              0x0040  /* EXT_NG_SEL_SET */
8056  #define ARIZONA_EXT_NG_SEL_SET_SHIFT                  6  /* EXT_NG_SEL_SET */
8057  #define ARIZONA_EXT_NG_SEL_SET_WIDTH                  1  /* EXT_NG_SEL_SET */
8058  #define ARIZONA_CLK_R_ENA_CLR                    0x0020  /* CLK_R_ENA_CLR */
8059  #define ARIZONA_CLK_R_ENA_CLR_MASK               0x0020  /* CLK_R_ENA_CLR */
8060  #define ARIZONA_CLK_R_ENA_CLR_SHIFT                   5  /* CLK_R_ENA_CLR */
8061  #define ARIZONA_CLK_R_ENA_CLR_WIDTH                   1  /* CLK_R_ENA_CLR */
8062  #define ARIZONA_CLK_R_ENA_SET                    0x0010  /* CLK_R_ENA_SET */
8063  #define ARIZONA_CLK_R_ENA_SET_MASK               0x0010  /* CLK_R_ENA_SET */
8064  #define ARIZONA_CLK_R_ENA_SET_SHIFT                   4  /* CLK_R_ENA_SET */
8065  #define ARIZONA_CLK_R_ENA_SET_WIDTH                   1  /* CLK_R_ENA_SET */
8066  #define ARIZONA_CLK_NG_ENA_CLR                   0x0008  /* CLK_NG_ENA_CLR */
8067  #define ARIZONA_CLK_NG_ENA_CLR_MASK              0x0008  /* CLK_NG_ENA_CLR */
8068  #define ARIZONA_CLK_NG_ENA_CLR_SHIFT                  3  /* CLK_NG_ENA_CLR */
8069  #define ARIZONA_CLK_NG_ENA_CLR_WIDTH                  1  /* CLK_NG_ENA_CLR */
8070  #define ARIZONA_CLK_NG_ENA_SET                   0x0004  /* CLK_NG_ENA_SET */
8071  #define ARIZONA_CLK_NG_ENA_SET_MASK              0x0004  /* CLK_NG_ENA_SET */
8072  #define ARIZONA_CLK_NG_ENA_SET_SHIFT                  2  /* CLK_NG_ENA_SET */
8073  #define ARIZONA_CLK_NG_ENA_SET_WIDTH                  1  /* CLK_NG_ENA_SET */
8074  #define ARIZONA_CLK_L_ENA_CLR                    0x0002  /* CLK_L_ENA_CLR */
8075  #define ARIZONA_CLK_L_ENA_CLR_MASK               0x0002  /* CLK_L_ENA_CLR */
8076  #define ARIZONA_CLK_L_ENA_CLR_SHIFT                   1  /* CLK_L_ENA_CLR */
8077  #define ARIZONA_CLK_L_ENA_CLR_WIDTH                   1  /* CLK_L_ENA_CLR */
8078  #define ARIZONA_CLK_L_ENA_SET                    0x0001  /* CLK_L_ENA_SET */
8079  #define ARIZONA_CLK_L_ENA_SET_MASK               0x0001  /* CLK_L_ENA_SET */
8080  #define ARIZONA_CLK_L_ENA_SET_SHIFT                   0  /* CLK_L_ENA_SET */
8081  #define ARIZONA_CLK_L_ENA_SET_WIDTH                   1  /* CLK_L_ENA_SET */
8082  
8083  /*
8084   * R3841 (0xF01) - ANC SRC
8085   */
8086  #define ARIZONA_IN_RXANCR_SEL_MASK               0x0070  /* IN_RXANCR_SEL - [4:6] */
8087  #define ARIZONA_IN_RXANCR_SEL_SHIFT                   4  /* IN_RXANCR_SEL - [4:6] */
8088  #define ARIZONA_IN_RXANCR_SEL_WIDTH                   3  /* IN_RXANCR_SEL - [4:6] */
8089  #define ARIZONA_IN_RXANCL_SEL_MASK               0x0007  /* IN_RXANCL_SEL - [0:2] */
8090  #define ARIZONA_IN_RXANCL_SEL_SHIFT                   0  /* IN_RXANCL_SEL - [0:2] */
8091  #define ARIZONA_IN_RXANCL_SEL_WIDTH                   3  /* IN_RXANCL_SEL - [0:2] */
8092  
8093  /*
8094   * R3863 (0xF17) - FCL ADC Reformatter Control
8095   */
8096  #define ARIZONA_FCL_MIC_MODE_SEL                 0x000C  /* FCL_MIC_MODE_SEL - [2:3] */
8097  #define ARIZONA_FCL_MIC_MODE_SEL_SHIFT                2  /* FCL_MIC_MODE_SEL - [2:3] */
8098  #define ARIZONA_FCL_MIC_MODE_SEL_WIDTH                2  /* FCL_MIC_MODE_SEL - [2:3] */
8099  
8100  /*
8101   * R3954 (0xF72) - FCR ADC Reformatter Control
8102   */
8103  #define ARIZONA_FCR_MIC_MODE_SEL                 0x000C  /* FCR_MIC_MODE_SEL - [2:3] */
8104  #define ARIZONA_FCR_MIC_MODE_SEL_SHIFT                2  /* FCR_MIC_MODE_SEL - [2:3] */
8105  #define ARIZONA_FCR_MIC_MODE_SEL_WIDTH                2  /* FCR_MIC_MODE_SEL - [2:3] */
8106  
8107  /*
8108   * R4352 (0x1100) - DSP1 Control 1
8109   */
8110  #define ARIZONA_DSP1_RATE_MASK                   0x7800  /* DSP1_RATE - [14:11] */
8111  #define ARIZONA_DSP1_RATE_SHIFT                      11  /* DSP1_RATE - [14:11] */
8112  #define ARIZONA_DSP1_RATE_WIDTH                       4  /* DSP1_RATE - [14:11] */
8113  #define ARIZONA_DSP1_MEM_ENA                     0x0010  /* DSP1_MEM_ENA */
8114  #define ARIZONA_DSP1_MEM_ENA_MASK                0x0010  /* DSP1_MEM_ENA */
8115  #define ARIZONA_DSP1_MEM_ENA_SHIFT                    4  /* DSP1_MEM_ENA */
8116  #define ARIZONA_DSP1_MEM_ENA_WIDTH                    1  /* DSP1_MEM_ENA */
8117  #define ARIZONA_DSP1_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
8118  #define ARIZONA_DSP1_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
8119  #define ARIZONA_DSP1_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
8120  #define ARIZONA_DSP1_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
8121  #define ARIZONA_DSP1_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
8122  #define ARIZONA_DSP1_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
8123  #define ARIZONA_DSP1_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
8124  #define ARIZONA_DSP1_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
8125  #define ARIZONA_DSP1_START                       0x0001  /* DSP1_START */
8126  #define ARIZONA_DSP1_START_MASK                  0x0001  /* DSP1_START */
8127  #define ARIZONA_DSP1_START_SHIFT                      0  /* DSP1_START */
8128  #define ARIZONA_DSP1_START_WIDTH                      1  /* DSP1_START */
8129  
8130  /*
8131   * R4353 (0x1101) - DSP1 Clocking 1
8132   */
8133  #define ARIZONA_DSP1_CLK_SEL_MASK                0x0007  /* DSP1_CLK_SEL - [2:0] */
8134  #define ARIZONA_DSP1_CLK_SEL_SHIFT                    0  /* DSP1_CLK_SEL - [2:0] */
8135  #define ARIZONA_DSP1_CLK_SEL_WIDTH                    3  /* DSP1_CLK_SEL - [2:0] */
8136  
8137  /*
8138   * R4356 (0x1104) - DSP1 Status 1
8139   */
8140  #define ARIZONA_DSP1_RAM_RDY                     0x0001  /* DSP1_RAM_RDY */
8141  #define ARIZONA_DSP1_RAM_RDY_MASK                0x0001  /* DSP1_RAM_RDY */
8142  #define ARIZONA_DSP1_RAM_RDY_SHIFT                    0  /* DSP1_RAM_RDY */
8143  #define ARIZONA_DSP1_RAM_RDY_WIDTH                    1  /* DSP1_RAM_RDY */
8144  
8145  /*
8146   * R4357 (0x1105) - DSP1 Status 2
8147   */
8148  #define ARIZONA_DSP1_PING_FULL                   0x8000  /* DSP1_PING_FULL */
8149  #define ARIZONA_DSP1_PING_FULL_MASK              0x8000  /* DSP1_PING_FULL */
8150  #define ARIZONA_DSP1_PING_FULL_SHIFT                 15  /* DSP1_PING_FULL */
8151  #define ARIZONA_DSP1_PING_FULL_WIDTH                  1  /* DSP1_PING_FULL */
8152  #define ARIZONA_DSP1_PONG_FULL                   0x4000  /* DSP1_PONG_FULL */
8153  #define ARIZONA_DSP1_PONG_FULL_MASK              0x4000  /* DSP1_PONG_FULL */
8154  #define ARIZONA_DSP1_PONG_FULL_SHIFT                 14  /* DSP1_PONG_FULL */
8155  #define ARIZONA_DSP1_PONG_FULL_WIDTH                  1  /* DSP1_PONG_FULL */
8156  #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK   0x00FF  /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
8157  #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT       0  /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
8158  #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH       8  /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
8159  
8160  #endif
8161