Searched refs:AR934X_SRIF_DDR_DPLL2_REG (Results 1 – 2 of 2) sorted by relevance
280 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG); in ar934x_clocks_init()
995 #define AR934X_SRIF_DDR_DPLL2_REG 0x244 macro