Searched refs:AMDGPU_VCE_HARVEST_VCE0 (Results 1 – 3 of 3) sorted by relevance
86 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_rptr()118 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_wptr()149 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_set_wptr()279 if (idx != 1 || adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) { in vce_v3_0_start()383 return AMDGPU_VCE_HARVEST_VCE0; in vce_v3_0_get_harvest_config()387 return AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1; in vce_v3_0_get_harvest_config()406 (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) == in vce_v3_0_early_init()407 (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) in vce_v3_0_early_init()606 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK; in vce_v3_0_is_idle()
30 #define AMDGPU_VCE_HARVEST_VCE0 (1 << 0) macro
700 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;