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Searched refs:ADF_CSR_RD (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/drivers/crypto/intel/qat/qat_common/
Dadf_gen4_hw_csr_data.h38 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
42 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
46 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
49 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
52 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
55 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
58 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
61 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
64 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
67 ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
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Dadf_gen4_ras.c46 val = ADF_CSR_RD(csr, ADF_GEN4_ERRMSK2); in disable_errsou_reporting()
125 reg = ADF_CSR_RD(csr, ADF_GEN4_TIMISCCTL); in enable_ti_ri_error_reporting()
162 reg = ADF_CSR_RD(csr, ADF_GEN4_TIMISCCTL); in disable_ti_ri_error_reporting()
219 val = ADF_CSR_RD(csr, ADF_GEN4_SSMFEATREN); in enable_ssm_error_reporting()
257 val = ADF_CSR_RD(csr, ADF_GEN4_SSMFEATREN); in disable_ssm_error_reporting()
353 u32 aecorrerr = ADF_CSR_RD(csr, ADF_GEN4_HIAECORERRLOG_CPP0); in adf_gen4_process_errsou0()
375 aeuncorerr = ADF_CSR_RD(csr, ADF_GEN4_HIAEUNCERRLOG_CPP0); in adf_handle_cpp_aeunc()
398 cmdparerr = ADF_CSR_RD(csr, ADF_GEN4_HICPPAGENTCMDPARERRLOG); in adf_handle_cppcmdparerr()
421 rimem_parerr_sts = ADF_CSR_RD(csr, ADF_GEN4_RIMEM_PARERR_STS); in adf_handle_ri_mem_par_err()
453 ti_ci_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_CI_PAR_STS); in adf_handle_ti_ci_par_sts()
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Dadf_gen4_pm.c31 msg = ADF_CSR_RD(pmisc, ADF_GEN4_PM_HOST_MSG); in send_host_msg()
53 return read_poll_timeout(ADF_CSR_RD, msg, in send_host_msg()
91 val = ADF_CSR_RD(pmisc, ADF_GEN4_ERRMSK2); in pm_bh_handler()
107 errmsk2 = ADF_CSR_RD(pmisc, ADF_GEN4_ERRMSK2); in adf_gen4_handle_pm_interrupt()
111 errsou2 = ADF_CSR_RD(pmisc, ADF_GEN4_ERRSOU2); in adf_gen4_handle_pm_interrupt()
116 val = ADF_CSR_RD(pmisc, ADF_GEN4_ERRMSK2); in adf_gen4_handle_pm_interrupt()
120 val = ADF_CSR_RD(pmisc, ADF_GEN4_PM_INTERRUPT); in adf_gen4_handle_pm_interrupt()
150 val = ADF_CSR_RD(pmisc, ADF_GEN4_PM_INTERRUPT); in adf_gen4_enable_pm()
158 val = ADF_CSR_RD(pmisc, ADF_GEN4_ERRMSK2); in adf_gen4_enable_pm()
Dadf_gen4_pfvf.c42 val = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK) & ~vf_mask; in adf_gen4_enable_vf2pf_interrupts()
56 sources = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_SOU); in adf_gen4_disable_pending_vf2pf_interrupts()
61 disabled = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts()
99 ret = read_poll_timeout(ADF_CSR_RD, csr_val, !(csr_val & ADF_PFVF_INT), in adf_gen4_pfvf_send()
118 csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); in adf_gen4_pfvf_recv()
Dadf_gen2_pfvf.c58 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_enable_vf2pf_interrupts()
67 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_disable_all_vf2pf_interrupts()
78 errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3); in adf_gen2_disable_pending_vf2pf_interrupts()
85 errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3); in adf_gen2_disable_pending_vf2pf_interrupts()
216 csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); in adf_gen2_pfvf_send()
227 ret = read_poll_timeout(ADF_CSR_RD, csr_val, !(csr_val & int_bit), in adf_gen2_pfvf_send()
287 csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); in adf_gen2_pfvf_recv()
Dadf_gen2_hw_data.c36 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i)); in adf_gen2_enable_error_correction()
39 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i)); in adf_gen2_enable_error_correction()
46 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_UERRSSMSH(i)); in adf_gen2_enable_error_correction()
49 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_CERRSSMSH(i)); in adf_gen2_enable_error_correction()
Dadf_gen2_hw_csr_data.h31 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
34 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
37 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
Dadf_gen2_hw_data.h19 ADF_CSR_RD(pmisc_bar_addr, AE2FUNCTION_MAP_A_OFFSET + \
25 ADF_CSR_RD(pmisc_bar_addr, AE2FUNCTION_MAP_B_OFFSET + \
Dicp_qat_hal.h128 ADF_CSR_RD((handle)->hal_cap_g_ctl_csr_addr_v, csr)
134 #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0)
Dadf_gen4_hw_data.c117 csr = ADF_CSR_RD(addr, ADF_GEN4_ERRMSK2); in adf_gen4_init_device()
125 ret = read_poll_timeout(ADF_CSR_RD, status, in adf_gen4_init_device()
211 ret = read_poll_timeout(ADF_CSR_RD, status, in reset_ring_pair()
441 ret = read_poll_timeout(ADF_CSR_RD, intsrc, intsrc, in adf_gen4_bank_quiesce_coal_timer()
460 return read_poll_timeout(ADF_CSR_RD, status, in drain_bank()
Dadf_vf_isr.c144 v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET); in adf_isr()
147 v_mask = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTMSK_OFFSET); in adf_isr()
Dadf_gen4_pm_debugfs.c248 val = ADF_CSR_RD(pmisc, ADF_GEN4_PM_HOST_MSG); in adf_gen4_print_pm_status()
251 val = ADF_CSR_RD(pmisc, ADF_GEN4_PM_INTERRUPT); in adf_gen4_print_pm_status()
Dadf_admin.c126 if (ADF_CSR_RD(mailbox, mb_offset) == 1) { in adf_put_admin_msg_sync()
134 ret = read_poll_timeout(ADF_CSR_RD, status, status == 0, in adf_put_admin_msg_sync()
Dqat_hal.c453 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
457 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
463 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
Dadf_accel_devices.h375 #define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset) macro
Dadf_gen4_vf_mig.c710 regv = ADF_CSR_RD(csr, misc_states[i].offset); in adf_gen4_vfmig_save_misc()
/linux-6.12.1/drivers/crypto/intel/qat/qat_dh895xcc/
Dadf_dh895xcc_hw_data.c129 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in enable_vf2pf_interrupts()
136 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in enable_vf2pf_interrupts()
147 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in disable_all_vf2pf_interrupts()
152 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in disable_all_vf2pf_interrupts()
164 errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3); in disable_pending_vf2pf_interrupts()
165 errsou5 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU5); in disable_pending_vf2pf_interrupts()
173 errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3); in disable_pending_vf2pf_interrupts()
174 errmsk5 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5); in disable_pending_vf2pf_interrupts()