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Searched refs:ACLK_PCIE20_SLV (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3568-cru.h194 #define ACLK_PCIE20_SLV 130 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3568.c820 GATE(ACLK_PCIE20_SLV, "aclk_pcie20_slv", "aclk_pipe", 0,
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk356x.dtsi1025 clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,