1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_GUC_TYPES_H_ 7 #define _XE_GUC_TYPES_H_ 8 9 #include <linux/idr.h> 10 #include <linux/xarray.h> 11 12 #include "regs/xe_reg_defs.h" 13 #include "xe_guc_ads_types.h" 14 #include "xe_guc_ct_types.h" 15 #include "xe_guc_fwif.h" 16 #include "xe_guc_log_types.h" 17 #include "xe_guc_pc_types.h" 18 #include "xe_guc_relay_types.h" 19 #include "xe_uc_fw_types.h" 20 21 /** 22 * struct xe_guc_db_mgr - GuC Doorbells Manager. 23 * 24 * Note: GuC Doorbells Manager is relying on &xe_guc::submission_state.lock 25 * to protect its members. 26 */ 27 struct xe_guc_db_mgr { 28 /** @count: number of doorbells to manage */ 29 unsigned int count; 30 /** @bitmap: bitmap to track allocated doorbells */ 31 unsigned long *bitmap; 32 }; 33 34 /** 35 * struct xe_guc_id_mgr - GuC context ID Manager. 36 * 37 * Note: GuC context ID Manager is relying on &xe_guc::submission_state.lock 38 * to protect its members. 39 */ 40 struct xe_guc_id_mgr { 41 /** @bitmap: bitmap to track allocated IDs */ 42 unsigned long *bitmap; 43 /** @total: total number of IDs being managed */ 44 unsigned int total; 45 /** @used: number of IDs currently in use */ 46 unsigned int used; 47 }; 48 49 /** 50 * struct xe_guc - Graphic micro controller 51 */ 52 struct xe_guc { 53 /** @fw: Generic uC firmware management */ 54 struct xe_uc_fw fw; 55 /** @log: GuC log */ 56 struct xe_guc_log log; 57 /** @ads: GuC ads */ 58 struct xe_guc_ads ads; 59 /** @ct: GuC ct */ 60 struct xe_guc_ct ct; 61 /** @pc: GuC Power Conservation */ 62 struct xe_guc_pc pc; 63 /** @dbm: GuC Doorbell Manager */ 64 struct xe_guc_db_mgr dbm; 65 /** @submission_state: GuC submission state */ 66 struct { 67 /** @submission_state.idm: GuC context ID Manager */ 68 struct xe_guc_id_mgr idm; 69 /** @submission_state.exec_queue_lookup: Lookup an xe_engine from guc_id */ 70 struct xarray exec_queue_lookup; 71 /** @submission_state.stopped: submissions are stopped */ 72 atomic_t stopped; 73 /** @submission_state.lock: protects submission state */ 74 struct mutex lock; 75 /** @submission_state.enabled: submission is enabled */ 76 bool enabled; 77 /** @submission_state.fini_wq: submit fini wait queue */ 78 wait_queue_head_t fini_wq; 79 } submission_state; 80 /** @hwconfig: Hardware config state */ 81 struct { 82 /** @hwconfig.bo: buffer object of the hardware config */ 83 struct xe_bo *bo; 84 /** @hwconfig.size: size of the hardware config */ 85 u32 size; 86 } hwconfig; 87 88 /** @relay: GuC Relay Communication used in SR-IOV */ 89 struct xe_guc_relay relay; 90 91 /** 92 * @notify_reg: Register which is written to notify GuC of H2G messages 93 */ 94 struct xe_reg notify_reg; 95 /** @params: Control params for fw initialization */ 96 u32 params[GUC_CTL_MAX_DWORDS]; 97 }; 98 99 #endif 100