1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * Copyright 2019 NXP 4 * 5 * Author: Daniel Baluta <daniel.baluta@nxp.com> 6 */ 7 8 #ifndef __INCLUDE_SOUND_SOF_DAI_IMX_H__ 9 #define __INCLUDE_SOUND_SOF_DAI_IMX_H__ 10 11 #include <sound/sof/header.h> 12 13 /* ESAI Configuration Request - SOF_IPC_DAI_ESAI_CONFIG */ 14 struct sof_ipc_dai_esai_params { 15 struct sof_ipc_hdr hdr; 16 17 /* MCLK */ 18 uint16_t reserved1; 19 uint16_t mclk_id; 20 uint32_t mclk_direction; 21 22 uint32_t mclk_rate; /* MCLK frequency in Hz */ 23 uint32_t fsync_rate; /* FSYNC frequency in Hz */ 24 uint32_t bclk_rate; /* BCLK frequency in Hz */ 25 26 /* TDM */ 27 uint32_t tdm_slots; 28 uint32_t rx_slots; 29 uint32_t tx_slots; 30 uint16_t tdm_slot_width; 31 uint16_t reserved2; /* alignment */ 32 } __packed; 33 34 /* SAI Configuration Request - SOF_IPC_DAI_SAI_CONFIG */ 35 struct sof_ipc_dai_sai_params { 36 struct sof_ipc_hdr hdr; 37 38 /* MCLK */ 39 uint16_t reserved1; 40 uint16_t mclk_id; 41 uint32_t mclk_direction; 42 43 uint32_t mclk_rate; /* MCLK frequency in Hz */ 44 uint32_t fsync_rate; /* FSYNC frequency in Hz */ 45 uint32_t bclk_rate; /* BCLK frequency in Hz */ 46 47 /* TDM */ 48 uint32_t tdm_slots; 49 uint32_t rx_slots; 50 uint32_t tx_slots; 51 uint16_t tdm_slot_width; 52 uint16_t reserved2; /* alignment */ 53 } __packed; 54 55 /* MICFIL Configuration Request - SOF_IPC_DAI_MICFIL_CONFIG */ 56 struct sof_ipc_dai_micfil_params { 57 uint32_t pdm_rate; 58 uint32_t pdm_ch; 59 } __packed; 60 61 #endif 62