1  /* SPDX-License-Identifier: GPL-2.0 */
2  /*
3   * Support for Intel Camera Imaging ISP subsystem.
4   * Copyright (c) 2015, Intel Corporation.
5   *
6   * This program is free software; you can redistribute it and/or modify it
7   * under the terms and conditions of the GNU General Public License,
8   * version 2, as published by the Free Software Foundation.
9   *
10   * This program is distributed in the hope it will be useful, but WITHOUT
11   * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   * more details.
14   */
15  
16  #ifndef _SH_CSS_DEFS_H_
17  #define _SH_CSS_DEFS_H_
18  
19  #include "isp.h"
20  
21  /*#include "vamem.h"*/ /* Cannot include for VAMEM properties this file is visible on ISP -> pipeline generator */
22  
23  #include "math_support.h"	/* max(), min, etc etc */
24  
25  /* ID's for refcount */
26  #define IA_CSS_REFCOUNT_PARAM_SET_POOL  0xCAFE0001
27  #define IA_CSS_REFCOUNT_PARAM_BUFFER    0xCAFE0002
28  
29  /* Digital Image Stabilization */
30  #define SH_CSS_DIS_DECI_FACTOR_LOG2       6
31  
32  /* UV offset: 1:uv=-128...127, 0:uv=0...255 */
33  #define SH_CSS_UV_OFFSET_IS_0             0
34  
35  /* Bits of bayer is adjusted as 13 in ISP */
36  #define SH_CSS_BAYER_BITS                 13
37  
38  /* Max value of bayer data (unsigned 13bit in ISP) */
39  #define SH_CSS_BAYER_MAXVAL               ((1U << SH_CSS_BAYER_BITS) - 1)
40  
41  /* Bits of yuv in ISP */
42  #define SH_CSS_ISP_YUV_BITS               8
43  
44  #define SH_CSS_DP_GAIN_SHIFT              5
45  #define SH_CSS_BNR_GAIN_SHIFT             13
46  #define SH_CSS_YNR_GAIN_SHIFT             13
47  #define SH_CSS_AE_YCOEF_SHIFT             13
48  #define SH_CSS_AF_FIR_SHIFT               13
49  #define SH_CSS_YEE_DETAIL_GAIN_SHIFT      8  /* [u5.8] */
50  #define SH_CSS_YEE_SCALE_SHIFT            8
51  #define SH_CSS_TNR_COEF_SHIFT             13
52  #define SH_CSS_MACC_COEF_SHIFT            11 /* [s2.11] for ISP1 */
53  #define SH_CSS_MACC2_COEF_SHIFT           13 /* [s[exp].[13-exp]] for ISP2 */
54  #define SH_CSS_DIS_COEF_SHIFT             13
55  
56  /* enumeration of the bayer downscale factors. When a binary supports multiple
57   * factors, the OR of these defines is used to build the mask of supported
58   * factors. The BDS factor is used in pre-processor expressions so we cannot
59   * use an enum here. */
60  #define SH_CSS_BDS_FACTOR_1_00	(0)
61  #define SH_CSS_BDS_FACTOR_1_25	(1)
62  #define SH_CSS_BDS_FACTOR_1_50	(2)
63  #define SH_CSS_BDS_FACTOR_2_00	(3)
64  #define SH_CSS_BDS_FACTOR_2_25	(4)
65  #define SH_CSS_BDS_FACTOR_2_50	(5)
66  #define SH_CSS_BDS_FACTOR_3_00	(6)
67  #define SH_CSS_BDS_FACTOR_4_00	(7)
68  #define SH_CSS_BDS_FACTOR_4_50	(8)
69  #define SH_CSS_BDS_FACTOR_5_00	(9)
70  #define SH_CSS_BDS_FACTOR_6_00	(10)
71  #define SH_CSS_BDS_FACTOR_8_00	(11)
72  #define NUM_BDS_FACTORS		(12)
73  
74  #define PACK_BDS_FACTOR(factor)	(1 << (factor))
75  
76  /* Following macros should match with the type enum ia_css_pipe_version in
77   * ia_css_pipe_public.h. The reason to add these macros is that enum type
78   * will be evaluted to 0 in preprocessing time. */
79  #define SH_CSS_ISP_PIPE_VERSION_1	1
80  #define SH_CSS_ISP_PIPE_VERSION_2_2	2
81  #define SH_CSS_ISP_PIPE_VERSION_2_6_1	3
82  #define SH_CSS_ISP_PIPE_VERSION_2_7	4
83  
84  /*--------------- sRGB Gamma -----------------
85  CCM        : YCgCo[0,8191] -> RGB[0,4095]
86  sRGB Gamma : RGB  [0,4095] -> RGB[0,8191]
87  CSC        : RGB  [0,8191] -> YUV[0,8191]
88  
89  CCM:
90  Y[0,8191],CgCo[-4096,4095],coef[-8192,8191] -> RGB[0,4095]
91  
92  sRGB Gamma:
93  RGB[0,4095] -(interpolation step16)-> RGB[0,255] -(LUT 12bit)-> RGB[0,4095] -> RGB[0,8191]
94  
95  CSC:
96  RGB[0,8191],coef[-8192,8191] -> RGB[0,8191]
97  --------------------------------------------*/
98  /* Bits of input/output of sRGB Gamma */
99  #define SH_CSS_RGB_GAMMA_INPUT_BITS       12 /* [0,4095] */
100  #define SH_CSS_RGB_GAMMA_OUTPUT_BITS      13 /* [0,8191] */
101  
102  /* Bits of fractional part of interpolation in vamem, [0,4095]->[0,255] */
103  #define SH_CSS_RGB_GAMMA_FRAC_BITS        \
104  	(SH_CSS_RGB_GAMMA_INPUT_BITS - SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE_LOG2)
105  #define SH_CSS_RGB_GAMMA_ONE              BIT(SH_CSS_RGB_GAMMA_FRAC_BITS)
106  
107  /* Bits of input of CCM,  = 13, Y[0,8191],CgCo[-4096,4095] */
108  #define SH_CSS_YUV2RGB_CCM_INPUT_BITS     SH_CSS_BAYER_BITS
109  
110  /* Bits of output of CCM,  = 12, RGB[0,4095] */
111  #define SH_CSS_YUV2RGB_CCM_OUTPUT_BITS    SH_CSS_RGB_GAMMA_INPUT_BITS
112  
113  /* Maximum value of output of CCM */
114  #define SH_CSS_YUV2RGB_CCM_MAX_OUTPUT     \
115  	((1 << SH_CSS_YUV2RGB_CCM_OUTPUT_BITS) - 1)
116  
117  #define SH_CSS_NUM_INPUT_BUF_LINES        4
118  
119  /* Left cropping only applicable for sufficiently large nway */
120  #define SH_CSS_MAX_LEFT_CROPPING          12
121  #define SH_CSS_MAX_TOP_CROPPING           12
122  
123  #define	SH_CSS_SP_MAX_WIDTH               1280
124  
125  /* This is the maximum grid we can handle in the ISP binaries.
126   * The host code makes sure no bigger grid is ever selected. */
127  #define SH_CSS_MAX_BQ_GRID_WIDTH          80
128  #define SH_CSS_MAX_BQ_GRID_HEIGHT         60
129  
130  /* The minimum dvs envelope is 12x12(for IPU2) to make sure the
131   * invalid rows/columns that result from filter initialization are skipped. */
132  #define SH_CSS_MIN_DVS_ENVELOPE           12U
133  
134  /* The FPGA system (vec_nelems == 16) only supports up to 5MP */
135  #define SH_CSS_MAX_SENSOR_WIDTH           4608
136  #define SH_CSS_MAX_SENSOR_HEIGHT          3450
137  
138  /* Limited to reduce vmem pressure */
139  #if ISP_VMEM_DEPTH >= 3072
140  #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH  SH_CSS_MAX_SENSOR_WIDTH
141  #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT SH_CSS_MAX_SENSOR_HEIGHT
142  #else
143  #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH  3264
144  #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT 2448
145  #endif
146  /* When using bayer decimation */
147  /*
148  #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC  4224
149  #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC 3168
150  */
151  #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC  SH_CSS_MAX_SENSOR_WIDTH
152  #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC SH_CSS_MAX_SENSOR_HEIGHT
153  
154  #define SH_CSS_MIN_SENSOR_WIDTH           2
155  #define SH_CSS_MIN_SENSOR_HEIGHT          2
156  
157  /*
158  #define SH_CSS_MAX_VF_WIDTH_DEC               1920
159  #define SH_CSS_MAX_VF_HEIGHT_DEC              1080
160  */
161  #define SH_CSS_MAX_VF_WIDTH_DEC               SH_CSS_MAX_VF_WIDTH
162  #define SH_CSS_MAX_VF_HEIGHT_DEC              SH_CSS_MAX_VF_HEIGHT
163  
164  /* We use 16 bits per coordinate component, including integer
165     and fractional bits */
166  #define SH_CSS_MORPH_TABLE_GRID               ISP_VEC_NELEMS
167  #define SH_CSS_MORPH_TABLE_ELEM_BYTES         2
168  #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \
169  	(HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES)
170  
171  #define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR   (SH_CSS_MAX_BQ_GRID_WIDTH + 1)
172  #define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR   (SH_CSS_MAX_BQ_GRID_HEIGHT + 1)
173  
174  #define SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \
175  	CEIL_MUL(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS)
176  
177  /* Each line of this table is aligned to the maximum line width. */
178  #define SH_CSS_MAX_S3ATBL_WIDTH              SH_CSS_MAX_BQ_GRID_WIDTH
179  
180  /* Video mode specific DVS define */
181  /* The video binary supports a delay of 1 or 2 frames */
182  #define MAX_DVS_FRAME_DELAY		2
183  /* +1 because DVS reads the previous and writes the current frame concurrently */
184  #define MAX_NUM_VIDEO_DELAY_FRAMES	(MAX_DVS_FRAME_DELAY + 1)
185  
186  #define NUM_VIDEO_TNR_FRAMES		2
187  
188  /* Note that this is the define used to configure all data structures common for all modes */
189  /* It should be equal or bigger to the max number of DVS frames for all possible modes */
190  /* Rules: these implement logic shared between the host code and ISP firmware.
191     The ISP firmware needs these rules to be applied at pre-processor time,
192     that's why these are macros, not functions. */
193  #define _ISP_BQS(num)  ((num) / 2)
194  #define _ISP_VECS(width) CEIL_DIV(width, ISP_VEC_NELEMS)
195  
196  #define ISP_BQ_GRID_WIDTH(elements_per_line, deci_factor_log2) \
197  	CEIL_SHIFT(elements_per_line / 2,  deci_factor_log2)
198  #define ISP_BQ_GRID_HEIGHT(lines_per_frame, deci_factor_log2) \
199  	CEIL_SHIFT(lines_per_frame / 2,  deci_factor_log2)
200  #define ISP_C_VECTORS_PER_LINE(elements_per_line) \
201  	_ISP_VECS(elements_per_line / 2)
202  
203  /* The morphing table is similar to the shading table in the sense that we
204     have 1 more value than we have cells in the grid. */
205  #define _ISP_MORPH_TABLE_WIDTH(int_width) \
206  	(CEIL_DIV(int_width, SH_CSS_MORPH_TABLE_GRID) + 1)
207  #define _ISP_MORPH_TABLE_HEIGHT(int_height) \
208  	(CEIL_DIV(int_height, SH_CSS_MORPH_TABLE_GRID) + 1)
209  #define _ISP_MORPH_TABLE_ALIGNED_WIDTH(width) \
210  	CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \
211  		 SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD)
212  
213  #define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \
214  	(ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1)
215  #define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \
216  	(ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1)
217  #define _ISP_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \
218  	CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \
219  		 ISP_VEC_NELEMS)
220  
221  /* To position the shading center grid point on the center of output image,
222   * one more grid cell is needed as margin. */
223  #define SH_CSS_SCTBL_CENTERING_MARGIN	1
224  
225  /* The shading table width and height are the number of grids, not cells. The last grid should be counted. */
226  #define SH_CSS_SCTBL_LAST_GRID_COUNT	1
227  
228  /* Number of horizontal grids per color in the shading table. */
229  #define _ISP2401_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \
230  	(ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \
231  	SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT)
232  
233  /* Number of vertical grids per color in the shading table. */
234  #define _ISP2401_SCTBL_HEIGHT(input_height, deci_factor_log2) \
235  	(ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \
236  	SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT)
237  
238  /* ISP2401: Legacy API: Number of horizontal grids per color in the shading table. */
239  #define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \
240  	(ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT)
241  
242  /* ISP2401: Legacy API: Number of vertical grids per color in the shading table. */
243  #define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \
244  	(ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT)
245  
246  /* *****************************************************************
247   * Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure)
248   * *****************************************************************/
249  /* if left cropping is used, 3A statistics are also cropped by 2 vectors. */
250  #define _ISP_S3ATBL_WIDTH(in_width, deci_factor_log2) \
251  	(_ISP_BQS(in_width) >> deci_factor_log2)
252  #define _ISP_S3ATBL_HEIGHT(in_height, deci_factor_log2) \
253  	(_ISP_BQS(in_height) >> deci_factor_log2)
254  #define _ISP_S3A_ELEMS_ISP_WIDTH(width, left_crop) \
255  	(width - ((left_crop) ? 2 * ISP_VEC_NELEMS : 0))
256  
257  #define _ISP_S3ATBL_ISP_WIDTH(in_width, deci_factor_log2) \
258  	CEIL_SHIFT(_ISP_BQS(in_width), deci_factor_log2)
259  #define _ISP_S3ATBL_ISP_HEIGHT(in_height, deci_factor_log2) \
260  	CEIL_SHIFT(_ISP_BQS(in_height), deci_factor_log2)
261  #define ISP_S3ATBL_VECTORS \
262  	_ISP_VECS(SH_CSS_MAX_S3ATBL_WIDTH * \
263  		  (sizeof(struct ia_css_3a_output) / sizeof(int32_t)))
264  #define ISP_S3ATBL_HI_LO_STRIDE \
265  	(ISP_S3ATBL_VECTORS * ISP_VEC_NELEMS)
266  #define ISP_S3ATBL_HI_LO_STRIDE_BYTES \
267  	(sizeof(unsigned short) * ISP_S3ATBL_HI_LO_STRIDE)
268  
269  /* Viewfinder support */
270  #define __ISP_MAX_VF_OUTPUT_WIDTH(width, left_crop) \
271  	(width - 2 * ISP_VEC_NELEMS + ((left_crop) ? 2 * ISP_VEC_NELEMS : 0))
272  
273  #define __ISP_VF_OUTPUT_WIDTH_VECS(out_width, vf_log_downscale) \
274  	(_ISP_VECS((out_width) >> (vf_log_downscale)))
275  
276  #define _ISP_VF_OUTPUT_WIDTH(vf_out_vecs) ((vf_out_vecs) * ISP_VEC_NELEMS)
277  #define _ISP_VF_OUTPUT_HEIGHT(out_height, vf_log_ds) \
278  	((out_height) >> (vf_log_ds))
279  
280  #define _ISP_LOG_VECTOR_STEP(mode) \
281  	((mode) == IA_CSS_BINARY_MODE_CAPTURE_PP ? 2 : 1)
282  
283  /* It is preferred to have not more than 2x scaling at one step
284   * in GDC (assumption is for capture_pp and yuv_scale stages) */
285  #define MAX_PREFERRED_YUV_DS_PER_STEP	2
286  
287  /* Rules for computing the internal width. This is extremely complicated
288   * and definitely needs to be commented and explained. */
289  #define _ISP_LEFT_CROP_EXTRA(left_crop) ((left_crop) > 0 ? 2 * ISP_VEC_NELEMS : 0)
290  
291  #define __ISP_MIN_INTERNAL_WIDTH(num_chunks, pipelining, mode) \
292  	((num_chunks) * (pipelining) * (1 << _ISP_LOG_VECTOR_STEP(mode)) * \
293  	 ISP_VEC_NELEMS)
294  
295  #define __ISP_PADDED_OUTPUT_WIDTH(out_width, dvs_env_width, left_crop) \
296  	((out_width) + MAX(dvs_env_width, _ISP_LEFT_CROP_EXTRA(left_crop)))
297  
298  #define __ISP_CHUNK_STRIDE_ISP(mode) \
299  	((1 << _ISP_LOG_VECTOR_STEP(mode)) * ISP_VEC_NELEMS)
300  
301  #define __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \
302  	((c_subsampling) * (num_chunks) * HIVE_ISP_DDR_WORD_BYTES)
303  #define __ISP_INTERNAL_WIDTH(out_width, \
304  			     dvs_env_width, \
305  			     left_crop, \
306  			     mode, \
307  			     c_subsampling, \
308  			     num_chunks, \
309  			     pipelining) \
310  	CEIL_MUL2(CEIL_MUL2(MAX(__ISP_PADDED_OUTPUT_WIDTH(out_width, \
311  							    dvs_env_width, \
312  							    left_crop), \
313  				  __ISP_MIN_INTERNAL_WIDTH(num_chunks, \
314  							   pipelining, \
315  							   mode) \
316  				 ), \
317  			  __ISP_CHUNK_STRIDE_ISP(mode) \
318  			 ), \
319  		 __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \
320  		)
321  
322  #define __ISP_INTERNAL_HEIGHT(out_height, dvs_env_height, top_crop) \
323  	((out_height) + (dvs_env_height) + top_crop)
324  
325  /* @GC: Input can be up to sensor resolution when either bayer downscaling
326   *	or raw binning is enabled.
327   *	Also, during continuous mode, we need to align to 4*NWAY since input
328   *	should support binning */
329  #define _ISP_MAX_INPUT_WIDTH(max_internal_width, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \
330  				enable_continuous) \
331  	((enable_ds) ? \
332  	   SH_CSS_MAX_SENSOR_WIDTH :\
333  	 (enable_fixed_bayer_ds) ? \
334  	   CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC, 4 * ISP_VEC_NELEMS) : \
335  	 (enable_raw_bin) ? \
336  	   CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH, 4 * ISP_VEC_NELEMS) : \
337  	 (enable_continuous) ? \
338  	   SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH \
339  	   : max_internal_width)
340  
341  #define _ISP_INPUT_WIDTH(internal_width, ds_input_width, enable_ds) \
342  	((enable_ds) ? (ds_input_width) : (internal_width))
343  
344  #define _ISP_MAX_INPUT_HEIGHT(max_internal_height, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \
345  				enable_continuous) \
346  	((enable_ds) ? \
347  	   SH_CSS_MAX_SENSOR_HEIGHT :\
348  	 (enable_fixed_bayer_ds) ? \
349  	   SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC : \
350  	 (enable_raw_bin || enable_continuous) ? \
351  	   SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT \
352  	   : max_internal_height)
353  
354  #define _ISP_INPUT_HEIGHT(internal_height, ds_input_height, enable_ds) \
355  	((enable_ds) ? (ds_input_height) : (internal_height))
356  
357  #define SH_CSS_MAX_STAGES 8 /* primary_stage[1-6], capture_pp, vf_pp */
358  
359  /* For CSI2+ input system, it requires extra paddinga from vmem */
360  #define _ISP_EXTRA_PADDING_VECS 0
361  
362  #endif /* _SH_CSS_DEFS_H_ */
363