1 /*
2  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2021,2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef _HAL_LI_API_H_
21 #define _HAL_LI_API_H_
22 
23 #include "hal_li_hw_headers.h"
24 #include "hal_api.h"
25 
26 /**
27  * hal_set_link_desc_addr_li() - Setup link descriptor in a buffer_addr_info
28  * HW structure
29  *
30  * @desc: Descriptor entry (from WBM_IDLE_LINK ring)
31  * @cookie: SW cookie for the buffer/descriptor
32  * @link_desc_paddr: Physical address of link descriptor entry
33  * @bm_id: idle link BM id
34  */
35 void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
36 			       qdf_dma_addr_t link_desc_paddr,
37 			       uint8_t bm_id);
38 
39 /**
40  * hal_tx_init_data_ring_li() - Initialize all the TCL Descriptors in SRNG
41  * @hal_soc_hdl: Handle to HAL SoC structure
42  * @hal_ring_hdl: Handle to HAL SRNG structure
43  *
44  * Return: none
45  */
46 void hal_tx_init_data_ring_li(hal_soc_handle_t hal_soc_hdl,
47 			      hal_ring_handle_t hal_ring_hdl);
48 
49 /**
50  * hal_hw_txrx_default_ops_attach_li(): Add default ops for Lithium chips
51  * @hal_soc: hal_soc handle
52  *
53  * Return: None
54  */
55 void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc);
56 
57 uint32_t hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc);
58 uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc);
59 
60 /**
61  * hal_reo_qdesc_setup_li() - Setup HW REO queue descriptor
62  * @hal_soc_hdl: Opaque HAL SOC handle
63  * @tid: TID
64  * @ba_window_size: BlockAck window size
65  * @start_seq: Starting sequence number
66  * @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
67  * @hw_qdesc_paddr: Physical address of REO queue descriptor memory
68  * @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
69  * @vdev_stats_id: vdev_stats_id
70  */
71 void hal_reo_qdesc_setup_li(hal_soc_handle_t hal_soc_hdl,
72 			    int tid, uint32_t ba_window_size,
73 			    uint32_t start_seq, void *hw_qdesc_vaddr,
74 			    qdf_dma_addr_t hw_qdesc_paddr,
75 			    int pn_type, uint8_t vdev_stats_id);
76 
77 #endif /* _HAL_LI_API_H_ */
78