1[ 2 { 3 "EventName": "ex_ret_instr", 4 "EventCode": "0xc0", 5 "BriefDescription": "Retired instructions." 6 }, 7 { 8 "EventName": "ex_ret_ops", 9 "EventCode": "0xc1", 10 "BriefDescription": "Retired macro-ops." 11 }, 12 { 13 "EventName": "ex_ret_brn", 14 "EventCode": "0xc2", 15 "BriefDescription": "Retired branch instructions (all types of architectural control flow changes, including exceptions and interrupts)." 16 }, 17 { 18 "EventName": "ex_ret_brn_misp", 19 "EventCode": "0xc3", 20 "BriefDescription": "Retired branch instructions mispredicted." 21 }, 22 { 23 "EventName": "ex_ret_brn_tkn", 24 "EventCode": "0xc4", 25 "BriefDescription": "Retired taken branch instructions (all types of architectural control flow changes, including exceptions and interrupts)." 26 }, 27 { 28 "EventName": "ex_ret_brn_tkn_misp", 29 "EventCode": "0xc5", 30 "BriefDescription": "Retired taken branch instructions mispredicted." 31 }, 32 { 33 "EventName": "ex_ret_brn_far", 34 "EventCode": "0xc6", 35 "BriefDescription": "Retired far control transfers (far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts). Far control transfers are not subject to branch prediction." 36 }, 37 { 38 "EventName": "ex_ret_near_ret", 39 "EventCode": "0xc8", 40 "BriefDescription": "Retired near returns (RET or RET Iw)." 41 }, 42 { 43 "EventName": "ex_ret_near_ret_mispred", 44 "EventCode": "0xc9", 45 "BriefDescription": "Retired near returns mispredicted. Each misprediction incurs the same penalty as a mispredicted conditional branch instruction." 46 }, 47 { 48 "EventName": "ex_ret_brn_ind_misp", 49 "EventCode": "0xca", 50 "BriefDescription": "Retired indirect branch instructions mispredicted (only EX mispredicts). Each misprediction incurs the same penalty as a mispredicted conditional branch instruction." 51 }, 52 { 53 "EventName": "ex_ret_mmx_fp_instr.x87", 54 "EventCode": "0xcb", 55 "BriefDescription": "Retired x87 instructions.", 56 "UMask": "0x01" 57 }, 58 { 59 "EventName": "ex_ret_mmx_fp_instr.mmx", 60 "EventCode": "0xcb", 61 "BriefDescription": "Retired MMX instructions.", 62 "UMask": "0x02" 63 }, 64 { 65 "EventName": "ex_ret_mmx_fp_instr.sse", 66 "EventCode": "0xcb", 67 "BriefDescription": "Retired SSE instructions (includes SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42 and AVX).", 68 "UMask": "0x04" 69 }, 70 { 71 "EventName": "ex_ret_ind_brch_instr", 72 "EventCode": "0xcc", 73 "BriefDescription": "Retired indirect branch instructions." 74 }, 75 { 76 "EventName": "ex_ret_cond", 77 "EventCode": "0xd1", 78 "BriefDescription": "Retired conditional branch instructions." 79 }, 80 { 81 "EventName": "ex_div_busy", 82 "EventCode": "0xd3", 83 "BriefDescription": "Number of cycles the divider is busy." 84 }, 85 { 86 "EventName": "ex_div_count", 87 "EventCode": "0xd4", 88 "BriefDescription": "Divide ops executed." 89 }, 90 { 91 "EventName": "ex_no_retire.empty", 92 "EventCode": "0xd6", 93 "BriefDescription": "Cycles with no retire due to the lack of valid ops in the retire queue (may be caused by front-end bottlenecks or pipeline redirects).", 94 "UMask": "0x01" 95 }, 96 { 97 "EventName": "ex_no_retire.not_complete", 98 "EventCode": "0xd6", 99 "BriefDescription": "Cycles with no retire while the oldest op is waiting to be executed.", 100 "UMask": "0x02" 101 }, 102 { 103 "EventName": "ex_no_retire.other", 104 "EventCode": "0xd6", 105 "BriefDescription": "Cycles with no retire caused by other reasons (retire breaks, traps, faults, etc.).", 106 "UMask": "0x08" 107 }, 108 { 109 "EventName": "ex_no_retire.thread_not_selected", 110 "EventCode": "0xd6", 111 "BriefDescription": "Cycles with no retire because thread arbitration did not select the thread.", 112 "UMask": "0x10" 113 }, 114 { 115 "EventName": "ex_no_retire.load_not_complete", 116 "EventCode": "0xd6", 117 "BriefDescription": "Cycles with no retire while the oldest op is waiting for load data.", 118 "UMask": "0xa2" 119 }, 120 { 121 "EventName": "ex_no_retire.all", 122 "EventCode": "0xd6", 123 "BriefDescription": "Cycles with no retire for any reason.", 124 "UMask": "0x1b" 125 }, 126 { 127 "EventName": "ex_ret_ucode_instr", 128 "EventCode": "0x1c1", 129 "BriefDescription": "Retired microcoded instructions." 130 }, 131 { 132 "EventName": "ex_ret_ucode_ops", 133 "EventCode": "0x1c2", 134 "BriefDescription": "Retired microcode ops." 135 }, 136 { 137 "EventName": "ex_ret_msprd_brnch_instr_dir_msmtch", 138 "EventCode": "0x1c7", 139 "BriefDescription": "Retired branch instructions mispredicted due to direction mismatch." 140 }, 141 { 142 "EventName": "ex_ret_uncond_brnch_instr_mispred", 143 "EventCode": "0x1c8", 144 "BriefDescription": "Retired unconditional indirect branch instructions mispredicted." 145 }, 146 { 147 "EventName": "ex_ret_uncond_brnch_instr", 148 "EventCode": "0x1c9", 149 "BriefDescription": "Retired unconditional branch instructions." 150 }, 151 { 152 "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops", 153 "EventCode": "0x1cf", 154 "BriefDescription": "Ops tagged by IBS.", 155 "UMask": "0x01" 156 }, 157 { 158 "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret", 159 "EventCode": "0x1cf", 160 "BriefDescription": "Ops tagged by IBS that retired.", 161 "UMask": "0x02" 162 }, 163 { 164 "EventName": "ex_tagged_ibs_ops.ibs_count_rollover", 165 "EventCode": "0x1cf", 166 "BriefDescription": "Ops not tagged by IBS due to a previous tagged op that has not yet signaled interrupt.", 167 "UMask": "0x04" 168 }, 169 { 170 "EventName": "ex_ret_fused_instr", 171 "EventCode": "0x1d0", 172 "BriefDescription": "Retired fused instructions." 173 } 174] 175