1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  tifm_sd.c - TI FlashMedia driver
4  *
5  *  Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6  *
7  * Special thanks to Brad Campbell for extensive testing of this driver.
8  */
9 
10 
11 #include <linux/tifm.h>
12 #include <linux/mmc/host.h>
13 #include <linux/highmem.h>
14 #include <linux/scatterlist.h>
15 #include <linux/module.h>
16 #include <linux/workqueue.h>
17 #include <asm/io.h>
18 
19 #define DRIVER_NAME "tifm_sd"
20 #define DRIVER_VERSION "0.8"
21 
22 static bool no_dma = 0;
23 static bool fixed_timeout = 0;
24 module_param(no_dma, bool, 0644);
25 module_param(fixed_timeout, bool, 0644);
26 
27 /* Constants here are mostly from OMAP5912 datasheet */
28 #define TIFM_MMCSD_RESET      0x0002
29 #define TIFM_MMCSD_CLKMASK    0x03ff
30 #define TIFM_MMCSD_POWER      0x0800
31 #define TIFM_MMCSD_4BBUS      0x8000
32 #define TIFM_MMCSD_RXDE       0x8000   /* rx dma enable */
33 #define TIFM_MMCSD_TXDE       0x0080   /* tx dma enable */
34 #define TIFM_MMCSD_BUFINT     0x0c00   /* set bits: AE, AF */
35 #define TIFM_MMCSD_DPE        0x0020   /* data timeout counted in kilocycles */
36 #define TIFM_MMCSD_INAB       0x0080   /* abort / initialize command */
37 #define TIFM_MMCSD_READ       0x8000
38 
39 #define TIFM_MMCSD_ERRMASK    0x01e0   /* set bits: CCRC, CTO, DCRC, DTO */
40 #define TIFM_MMCSD_EOC        0x0001   /* end of command phase  */
41 #define TIFM_MMCSD_CD         0x0002   /* card detect           */
42 #define TIFM_MMCSD_CB         0x0004   /* card enter busy state */
43 #define TIFM_MMCSD_BRS        0x0008   /* block received/sent   */
44 #define TIFM_MMCSD_EOFB       0x0010   /* card exit busy state  */
45 #define TIFM_MMCSD_DTO        0x0020   /* data time-out         */
46 #define TIFM_MMCSD_DCRC       0x0040   /* data crc error        */
47 #define TIFM_MMCSD_CTO        0x0080   /* command time-out      */
48 #define TIFM_MMCSD_CCRC       0x0100   /* command crc error     */
49 #define TIFM_MMCSD_AF         0x0400   /* fifo almost full      */
50 #define TIFM_MMCSD_AE         0x0800   /* fifo almost empty     */
51 #define TIFM_MMCSD_OCRB       0x1000   /* OCR busy              */
52 #define TIFM_MMCSD_CIRQ       0x2000   /* card irq (cmd40/sdio) */
53 #define TIFM_MMCSD_CERR       0x4000   /* card status error     */
54 
55 #define TIFM_MMCSD_ODTO       0x0040   /* open drain / extended timeout */
56 #define TIFM_MMCSD_CARD_RO    0x0200   /* card is read-only     */
57 
58 #define TIFM_MMCSD_FIFO_SIZE  0x0020
59 
60 #define TIFM_MMCSD_RSP_R0     0x0000
61 #define TIFM_MMCSD_RSP_R1     0x0100
62 #define TIFM_MMCSD_RSP_R2     0x0200
63 #define TIFM_MMCSD_RSP_R3     0x0300
64 #define TIFM_MMCSD_RSP_R4     0x0400
65 #define TIFM_MMCSD_RSP_R5     0x0500
66 #define TIFM_MMCSD_RSP_R6     0x0600
67 
68 #define TIFM_MMCSD_RSP_BUSY   0x0800
69 
70 #define TIFM_MMCSD_CMD_BC     0x0000
71 #define TIFM_MMCSD_CMD_BCR    0x1000
72 #define TIFM_MMCSD_CMD_AC     0x2000
73 #define TIFM_MMCSD_CMD_ADTC   0x3000
74 
75 #define TIFM_MMCSD_MAX_BLOCK_SIZE  0x0800UL
76 
77 #define TIFM_MMCSD_REQ_TIMEOUT_MS  1000
78 
79 enum {
80 	CMD_READY    = 0x0001,
81 	FIFO_READY   = 0x0002,
82 	BRS_READY    = 0x0004,
83 	SCMD_ACTIVE  = 0x0008,
84 	SCMD_READY   = 0x0010,
85 	CARD_BUSY    = 0x0020,
86 	DATA_CARRY   = 0x0040
87 };
88 
89 struct tifm_sd {
90 	struct tifm_dev       *dev;
91 
92 	unsigned short        eject:1,
93 			      open_drain:1,
94 			      no_dma:1;
95 	unsigned short        cmd_flags;
96 
97 	unsigned int          clk_freq;
98 	unsigned int          clk_div;
99 	unsigned long         timeout_jiffies;
100 
101 	struct work_struct    finish_bh_work;
102 	struct timer_list     timer;
103 	struct mmc_request    *req;
104 
105 	int                   sg_len;
106 	int                   sg_pos;
107 	unsigned int          block_pos;
108 	struct scatterlist    bounce_buf;
109 	unsigned char         bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE];
110 };
111 
112 /* for some reason, host won't respond correctly to readw/writew */
tifm_sd_read_fifo(struct tifm_sd * host,struct page * pg,unsigned int off,unsigned int cnt)113 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
114 			      unsigned int off, unsigned int cnt)
115 {
116 	struct tifm_dev *sock = host->dev;
117 	unsigned char *buf;
118 	unsigned int pos = 0, val;
119 
120 	buf = kmap_local_page(pg) + off;
121 	if (host->cmd_flags & DATA_CARRY) {
122 		buf[pos++] = host->bounce_buf_data[0];
123 		host->cmd_flags &= ~DATA_CARRY;
124 	}
125 
126 	while (pos < cnt) {
127 		val = readl(sock->addr + SOCK_MMCSD_DATA);
128 		buf[pos++] = val & 0xff;
129 		if (pos == cnt) {
130 			host->bounce_buf_data[0] = (val >> 8) & 0xff;
131 			host->cmd_flags |= DATA_CARRY;
132 			break;
133 		}
134 		buf[pos++] = (val >> 8) & 0xff;
135 	}
136 	kunmap_local(buf - off);
137 }
138 
tifm_sd_write_fifo(struct tifm_sd * host,struct page * pg,unsigned int off,unsigned int cnt)139 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
140 			       unsigned int off, unsigned int cnt)
141 {
142 	struct tifm_dev *sock = host->dev;
143 	unsigned char *buf;
144 	unsigned int pos = 0, val;
145 
146 	buf = kmap_local_page(pg) + off;
147 	if (host->cmd_flags & DATA_CARRY) {
148 		val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
149 		writel(val, sock->addr + SOCK_MMCSD_DATA);
150 		host->cmd_flags &= ~DATA_CARRY;
151 	}
152 
153 	while (pos < cnt) {
154 		val = buf[pos++];
155 		if (pos == cnt) {
156 			host->bounce_buf_data[0] = val & 0xff;
157 			host->cmd_flags |= DATA_CARRY;
158 			break;
159 		}
160 		val |= (buf[pos++] << 8) & 0xff00;
161 		writel(val, sock->addr + SOCK_MMCSD_DATA);
162 	}
163 	kunmap_local(buf - off);
164 }
165 
tifm_sd_transfer_data(struct tifm_sd * host)166 static void tifm_sd_transfer_data(struct tifm_sd *host)
167 {
168 	struct mmc_data *r_data = host->req->cmd->data;
169 	struct scatterlist *sg = r_data->sg;
170 	unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
171 	unsigned int p_off, p_cnt;
172 	struct page *pg;
173 
174 	if (host->sg_pos == host->sg_len)
175 		return;
176 	while (t_size) {
177 		cnt = sg[host->sg_pos].length - host->block_pos;
178 		if (!cnt) {
179 			host->block_pos = 0;
180 			host->sg_pos++;
181 			if (host->sg_pos == host->sg_len) {
182 				if ((r_data->flags & MMC_DATA_WRITE)
183 				    && (host->cmd_flags & DATA_CARRY))
184 					writel(host->bounce_buf_data[0],
185 					       host->dev->addr
186 					       + SOCK_MMCSD_DATA);
187 
188 				return;
189 			}
190 			cnt = sg[host->sg_pos].length;
191 		}
192 		off = sg[host->sg_pos].offset + host->block_pos;
193 
194 		pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
195 		p_off = offset_in_page(off);
196 		p_cnt = PAGE_SIZE - p_off;
197 		p_cnt = min(p_cnt, cnt);
198 		p_cnt = min(p_cnt, t_size);
199 
200 		if (r_data->flags & MMC_DATA_READ)
201 			tifm_sd_read_fifo(host, pg, p_off, p_cnt);
202 		else if (r_data->flags & MMC_DATA_WRITE)
203 			tifm_sd_write_fifo(host, pg, p_off, p_cnt);
204 
205 		t_size -= p_cnt;
206 		host->block_pos += p_cnt;
207 	}
208 }
209 
tifm_sd_copy_page(struct page * dst,unsigned int dst_off,struct page * src,unsigned int src_off,unsigned int count)210 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
211 			      struct page *src, unsigned int src_off,
212 			      unsigned int count)
213 {
214 	unsigned char *src_buf = kmap_local_page(src) + src_off;
215 	unsigned char *dst_buf = kmap_local_page(dst) + dst_off;
216 
217 	memcpy(dst_buf, src_buf, count);
218 
219 	kunmap_local(dst_buf - dst_off);
220 	kunmap_local(src_buf - src_off);
221 }
222 
tifm_sd_bounce_block(struct tifm_sd * host,struct mmc_data * r_data)223 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data)
224 {
225 	struct scatterlist *sg = r_data->sg;
226 	unsigned int t_size = r_data->blksz;
227 	unsigned int off, cnt;
228 	unsigned int p_off, p_cnt;
229 	struct page *pg;
230 
231 	dev_dbg(&host->dev->dev, "bouncing block\n");
232 	while (t_size) {
233 		cnt = sg[host->sg_pos].length - host->block_pos;
234 		if (!cnt) {
235 			host->block_pos = 0;
236 			host->sg_pos++;
237 			if (host->sg_pos == host->sg_len)
238 				return;
239 			cnt = sg[host->sg_pos].length;
240 		}
241 		off = sg[host->sg_pos].offset + host->block_pos;
242 
243 		pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
244 		p_off = offset_in_page(off);
245 		p_cnt = PAGE_SIZE - p_off;
246 		p_cnt = min(p_cnt, cnt);
247 		p_cnt = min(p_cnt, t_size);
248 
249 		if (r_data->flags & MMC_DATA_WRITE)
250 			tifm_sd_copy_page(sg_page(&host->bounce_buf),
251 					  r_data->blksz - t_size,
252 					  pg, p_off, p_cnt);
253 		else if (r_data->flags & MMC_DATA_READ)
254 			tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf),
255 					  r_data->blksz - t_size, p_cnt);
256 
257 		t_size -= p_cnt;
258 		host->block_pos += p_cnt;
259 	}
260 }
261 
tifm_sd_set_dma_data(struct tifm_sd * host,struct mmc_data * r_data)262 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data)
263 {
264 	struct tifm_dev *sock = host->dev;
265 	unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz;
266 	unsigned int dma_len, dma_blk_cnt, dma_off;
267 	struct scatterlist *sg = NULL;
268 
269 	if (host->sg_pos == host->sg_len)
270 		return 1;
271 
272 	if (host->cmd_flags & DATA_CARRY) {
273 		host->cmd_flags &= ~DATA_CARRY;
274 		tifm_sd_bounce_block(host, r_data);
275 		if (host->sg_pos == host->sg_len)
276 			return 1;
277 	}
278 
279 	dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
280 	if (!dma_len) {
281 		host->block_pos = 0;
282 		host->sg_pos++;
283 		if (host->sg_pos == host->sg_len)
284 			return 1;
285 		dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
286 	}
287 
288 	if (dma_len < t_size) {
289 		dma_blk_cnt = dma_len / r_data->blksz;
290 		dma_off = host->block_pos;
291 		host->block_pos += dma_blk_cnt * r_data->blksz;
292 	} else {
293 		dma_blk_cnt = TIFM_DMA_TSIZE;
294 		dma_off = host->block_pos;
295 		host->block_pos += t_size;
296 	}
297 
298 	if (dma_blk_cnt)
299 		sg = &r_data->sg[host->sg_pos];
300 	else if (dma_len) {
301 		if (r_data->flags & MMC_DATA_WRITE)
302 			tifm_sd_bounce_block(host, r_data);
303 		else
304 			host->cmd_flags |= DATA_CARRY;
305 
306 		sg = &host->bounce_buf;
307 		dma_off = 0;
308 		dma_blk_cnt = 1;
309 	} else
310 		return 1;
311 
312 	dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt);
313 	writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
314 	if (r_data->flags & MMC_DATA_WRITE)
315 		writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
316 		       sock->addr + SOCK_DMA_CONTROL);
317 	else
318 		writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
319 		       sock->addr + SOCK_DMA_CONTROL);
320 
321 	return 0;
322 }
323 
tifm_sd_op_flags(struct mmc_command * cmd)324 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
325 {
326 	unsigned int rc = 0;
327 
328 	switch (mmc_resp_type(cmd)) {
329 	case MMC_RSP_NONE:
330 		rc |= TIFM_MMCSD_RSP_R0;
331 		break;
332 	case MMC_RSP_R1B:
333 		rc |= TIFM_MMCSD_RSP_BUSY;
334 		fallthrough;
335 	case MMC_RSP_R1:
336 		rc |= TIFM_MMCSD_RSP_R1;
337 		break;
338 	case MMC_RSP_R2:
339 		rc |= TIFM_MMCSD_RSP_R2;
340 		break;
341 	case MMC_RSP_R3:
342 		rc |= TIFM_MMCSD_RSP_R3;
343 		break;
344 	default:
345 		BUG();
346 	}
347 
348 	switch (mmc_cmd_type(cmd)) {
349 	case MMC_CMD_BC:
350 		rc |= TIFM_MMCSD_CMD_BC;
351 		break;
352 	case MMC_CMD_BCR:
353 		rc |= TIFM_MMCSD_CMD_BCR;
354 		break;
355 	case MMC_CMD_AC:
356 		rc |= TIFM_MMCSD_CMD_AC;
357 		break;
358 	case MMC_CMD_ADTC:
359 		rc |= TIFM_MMCSD_CMD_ADTC;
360 		break;
361 	default:
362 		BUG();
363 	}
364 	return rc;
365 }
366 
tifm_sd_exec(struct tifm_sd * host,struct mmc_command * cmd)367 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
368 {
369 	struct tifm_dev *sock = host->dev;
370 	unsigned int cmd_mask = tifm_sd_op_flags(cmd);
371 
372 	if (host->open_drain)
373 		cmd_mask |= TIFM_MMCSD_ODTO;
374 
375 	if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
376 		cmd_mask |= TIFM_MMCSD_READ;
377 
378 	dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
379 		cmd->opcode, cmd->arg, cmd_mask);
380 
381 	writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
382 	writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
383 	writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
384 }
385 
tifm_sd_fetch_resp(struct mmc_command * cmd,struct tifm_dev * sock)386 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
387 {
388 	cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
389 		       | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
390 	cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
391 		       | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
392 	cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
393 		       | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
394 	cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
395 		       | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
396 }
397 
tifm_sd_check_status(struct tifm_sd * host)398 static void tifm_sd_check_status(struct tifm_sd *host)
399 {
400 	struct tifm_dev *sock = host->dev;
401 	struct mmc_command *cmd = host->req->cmd;
402 
403 	if (cmd->error)
404 		goto finish_request;
405 
406 	if (!(host->cmd_flags & CMD_READY))
407 		return;
408 
409 	if (cmd->data) {
410 		if (cmd->data->error) {
411 			if ((host->cmd_flags & SCMD_ACTIVE)
412 			    && !(host->cmd_flags & SCMD_READY))
413 				return;
414 
415 			goto finish_request;
416 		}
417 
418 		if (!(host->cmd_flags & BRS_READY))
419 			return;
420 
421 		if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
422 			return;
423 
424 		if (cmd->data->flags & MMC_DATA_WRITE) {
425 			if (host->req->stop) {
426 				if (!(host->cmd_flags & SCMD_ACTIVE)) {
427 					host->cmd_flags |= SCMD_ACTIVE;
428 					writel(TIFM_MMCSD_EOFB
429 					       | readl(sock->addr
430 						       + SOCK_MMCSD_INT_ENABLE),
431 					       sock->addr
432 					       + SOCK_MMCSD_INT_ENABLE);
433 					tifm_sd_exec(host, host->req->stop);
434 					return;
435 				} else {
436 					if (!(host->cmd_flags & SCMD_READY)
437 					    || (host->cmd_flags & CARD_BUSY))
438 						return;
439 					writel((~TIFM_MMCSD_EOFB)
440 					       & readl(sock->addr
441 						       + SOCK_MMCSD_INT_ENABLE),
442 					       sock->addr
443 					       + SOCK_MMCSD_INT_ENABLE);
444 				}
445 			} else {
446 				if (host->cmd_flags & CARD_BUSY)
447 					return;
448 				writel((~TIFM_MMCSD_EOFB)
449 				       & readl(sock->addr
450 					       + SOCK_MMCSD_INT_ENABLE),
451 				       sock->addr + SOCK_MMCSD_INT_ENABLE);
452 			}
453 		} else {
454 			if (host->req->stop) {
455 				if (!(host->cmd_flags & SCMD_ACTIVE)) {
456 					host->cmd_flags |= SCMD_ACTIVE;
457 					tifm_sd_exec(host, host->req->stop);
458 					return;
459 				} else {
460 					if (!(host->cmd_flags & SCMD_READY))
461 						return;
462 				}
463 			}
464 		}
465 	}
466 finish_request:
467 	queue_work(system_bh_wq, &host->finish_bh_work);
468 }
469 
470 /* Called from interrupt handler */
tifm_sd_data_event(struct tifm_dev * sock)471 static void tifm_sd_data_event(struct tifm_dev *sock)
472 {
473 	struct tifm_sd *host;
474 	unsigned int fifo_status = 0;
475 	struct mmc_data *r_data = NULL;
476 
477 	spin_lock(&sock->lock);
478 	host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
479 	fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
480 	dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
481 		fifo_status, host->cmd_flags);
482 
483 	if (host->req) {
484 		r_data = host->req->cmd->data;
485 
486 		if (r_data && (fifo_status & TIFM_FIFO_READY)) {
487 			if (tifm_sd_set_dma_data(host, r_data)) {
488 				host->cmd_flags |= FIFO_READY;
489 				tifm_sd_check_status(host);
490 			}
491 		}
492 	}
493 
494 	writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
495 	spin_unlock(&sock->lock);
496 }
497 
498 /* Called from interrupt handler */
tifm_sd_card_event(struct tifm_dev * sock)499 static void tifm_sd_card_event(struct tifm_dev *sock)
500 {
501 	struct tifm_sd *host;
502 	unsigned int host_status = 0;
503 	int cmd_error = 0;
504 	struct mmc_command *cmd = NULL;
505 
506 	spin_lock(&sock->lock);
507 	host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
508 	host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
509 	dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
510 		host_status, host->cmd_flags);
511 
512 	if (host->req) {
513 		cmd = host->req->cmd;
514 
515 		if (host_status & TIFM_MMCSD_ERRMASK) {
516 			writel(host_status & TIFM_MMCSD_ERRMASK,
517 			       sock->addr + SOCK_MMCSD_STATUS);
518 			if (host_status & TIFM_MMCSD_CTO)
519 				cmd_error = -ETIMEDOUT;
520 			else if (host_status & TIFM_MMCSD_CCRC)
521 				cmd_error = -EILSEQ;
522 
523 			if (cmd->data) {
524 				if (host_status & TIFM_MMCSD_DTO)
525 					cmd->data->error = -ETIMEDOUT;
526 				else if (host_status & TIFM_MMCSD_DCRC)
527 					cmd->data->error = -EILSEQ;
528 			}
529 
530 			writel(TIFM_FIFO_INT_SETALL,
531 			       sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
532 			writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
533 
534 			if (host->req->stop) {
535 				if (host->cmd_flags & SCMD_ACTIVE) {
536 					host->req->stop->error = cmd_error;
537 					host->cmd_flags |= SCMD_READY;
538 				} else {
539 					cmd->error = cmd_error;
540 					host->cmd_flags |= SCMD_ACTIVE;
541 					tifm_sd_exec(host, host->req->stop);
542 					goto done;
543 				}
544 			} else
545 				cmd->error = cmd_error;
546 		} else {
547 			if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
548 				if (!(host->cmd_flags & CMD_READY)) {
549 					host->cmd_flags |= CMD_READY;
550 					tifm_sd_fetch_resp(cmd, sock);
551 				} else if (host->cmd_flags & SCMD_ACTIVE) {
552 					host->cmd_flags |= SCMD_READY;
553 					tifm_sd_fetch_resp(host->req->stop,
554 							   sock);
555 				}
556 			}
557 			if (host_status & TIFM_MMCSD_BRS)
558 				host->cmd_flags |= BRS_READY;
559 		}
560 
561 		if (host->no_dma && cmd->data) {
562 			if (host_status & TIFM_MMCSD_AE)
563 				writel(host_status & TIFM_MMCSD_AE,
564 				       sock->addr + SOCK_MMCSD_STATUS);
565 
566 			if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF
567 					   | TIFM_MMCSD_BRS)) {
568 				tifm_sd_transfer_data(host);
569 				host_status &= ~TIFM_MMCSD_AE;
570 			}
571 		}
572 
573 		if (host_status & TIFM_MMCSD_EOFB)
574 			host->cmd_flags &= ~CARD_BUSY;
575 		else if (host_status & TIFM_MMCSD_CB)
576 			host->cmd_flags |= CARD_BUSY;
577 
578 		tifm_sd_check_status(host);
579 	}
580 done:
581 	writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
582 	spin_unlock(&sock->lock);
583 }
584 
tifm_sd_set_data_timeout(struct tifm_sd * host,struct mmc_data * data)585 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
586 				     struct mmc_data *data)
587 {
588 	struct tifm_dev *sock = host->dev;
589 	unsigned int data_timeout = data->timeout_clks;
590 
591 	if (fixed_timeout)
592 		return;
593 
594 	data_timeout += data->timeout_ns /
595 			((1000000000UL / host->clk_freq) * host->clk_div);
596 
597 	if (data_timeout < 0xffff) {
598 		writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
599 		writel((~TIFM_MMCSD_DPE)
600 		       & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
601 		       sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
602 	} else {
603 		data_timeout = (data_timeout >> 10) + 1;
604 		if (data_timeout > 0xffff)
605 			data_timeout = 0;	/* set to unlimited */
606 		writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
607 		writel(TIFM_MMCSD_DPE
608 		       | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
609 		       sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
610 	}
611 }
612 
tifm_sd_request(struct mmc_host * mmc,struct mmc_request * mrq)613 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
614 {
615 	struct tifm_sd *host = mmc_priv(mmc);
616 	struct tifm_dev *sock = host->dev;
617 	unsigned long flags;
618 	struct mmc_data *r_data = mrq->cmd->data;
619 
620 	spin_lock_irqsave(&sock->lock, flags);
621 	if (host->eject) {
622 		mrq->cmd->error = -ENOMEDIUM;
623 		goto err_out;
624 	}
625 
626 	if (host->req) {
627 		pr_err("%s : unfinished request detected\n",
628 		       dev_name(&sock->dev));
629 		mrq->cmd->error = -ETIMEDOUT;
630 		goto err_out;
631 	}
632 
633 	host->cmd_flags = 0;
634 	host->block_pos = 0;
635 	host->sg_pos = 0;
636 
637 	if (mrq->data && !is_power_of_2(mrq->data->blksz))
638 		host->no_dma = 1;
639 	else
640 		host->no_dma = no_dma ? 1 : 0;
641 
642 	if (r_data) {
643 		tifm_sd_set_data_timeout(host, r_data);
644 
645 		if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop)
646 			 writel(TIFM_MMCSD_EOFB
647 				| readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
648 				sock->addr + SOCK_MMCSD_INT_ENABLE);
649 
650 		if (host->no_dma) {
651 			writel(TIFM_MMCSD_BUFINT
652 			       | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
653 			       sock->addr + SOCK_MMCSD_INT_ENABLE);
654 			writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
655 			       | (TIFM_MMCSD_FIFO_SIZE - 1),
656 			       sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
657 
658 			host->sg_len = r_data->sg_len;
659 		} else {
660 			sg_init_one(&host->bounce_buf, host->bounce_buf_data,
661 				    r_data->blksz);
662 
663 			if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
664 					    r_data->flags & MMC_DATA_WRITE
665 					    ? DMA_TO_DEVICE
666 					    : DMA_FROM_DEVICE)) {
667 				pr_err("%s : scatterlist map failed\n",
668 				       dev_name(&sock->dev));
669 				mrq->cmd->error = -ENOMEM;
670 				goto err_out;
671 			}
672 			host->sg_len = tifm_map_sg(sock, r_data->sg,
673 						   r_data->sg_len,
674 						   r_data->flags
675 						   & MMC_DATA_WRITE
676 						   ? DMA_TO_DEVICE
677 						   : DMA_FROM_DEVICE);
678 			if (host->sg_len < 1) {
679 				pr_err("%s : scatterlist map failed\n",
680 				       dev_name(&sock->dev));
681 				tifm_unmap_sg(sock, &host->bounce_buf, 1,
682 					      r_data->flags & MMC_DATA_WRITE
683 					      ? DMA_TO_DEVICE
684 					      : DMA_FROM_DEVICE);
685 				mrq->cmd->error = -ENOMEM;
686 				goto err_out;
687 			}
688 
689 			writel(TIFM_FIFO_INT_SETALL,
690 			       sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
691 			writel(ilog2(r_data->blksz) - 2,
692 			       sock->addr + SOCK_FIFO_PAGE_SIZE);
693 			writel(TIFM_FIFO_ENABLE,
694 			       sock->addr + SOCK_FIFO_CONTROL);
695 			writel(TIFM_FIFO_INTMASK,
696 			       sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
697 
698 			if (r_data->flags & MMC_DATA_WRITE)
699 				writel(TIFM_MMCSD_TXDE,
700 				       sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
701 			else
702 				writel(TIFM_MMCSD_RXDE,
703 				       sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
704 
705 			tifm_sd_set_dma_data(host, r_data);
706 		}
707 
708 		writel(r_data->blocks - 1,
709 		       sock->addr + SOCK_MMCSD_NUM_BLOCKS);
710 		writel(r_data->blksz - 1,
711 		       sock->addr + SOCK_MMCSD_BLOCK_LEN);
712 	}
713 
714 	host->req = mrq;
715 	mod_timer(&host->timer, jiffies + host->timeout_jiffies);
716 	writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
717 	       sock->addr + SOCK_CONTROL);
718 	tifm_sd_exec(host, mrq->cmd);
719 	spin_unlock_irqrestore(&sock->lock, flags);
720 	return;
721 
722 err_out:
723 	spin_unlock_irqrestore(&sock->lock, flags);
724 	mmc_request_done(mmc, mrq);
725 }
726 
tifm_sd_end_cmd(struct work_struct * t)727 static void tifm_sd_end_cmd(struct work_struct *t)
728 {
729 	struct tifm_sd *host = from_work(host, t, finish_bh_work);
730 	struct tifm_dev *sock = host->dev;
731 	struct mmc_host *mmc = tifm_get_drvdata(sock);
732 	struct mmc_request *mrq;
733 	struct mmc_data *r_data = NULL;
734 	unsigned long flags;
735 
736 	spin_lock_irqsave(&sock->lock, flags);
737 
738 	del_timer(&host->timer);
739 	mrq = host->req;
740 	host->req = NULL;
741 
742 	if (!mrq) {
743 		pr_err(" %s : no request to complete?\n",
744 		       dev_name(&sock->dev));
745 		spin_unlock_irqrestore(&sock->lock, flags);
746 		return;
747 	}
748 
749 	r_data = mrq->cmd->data;
750 	if (r_data) {
751 		if (host->no_dma) {
752 			writel((~TIFM_MMCSD_BUFINT)
753 			       & readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
754 			       sock->addr + SOCK_MMCSD_INT_ENABLE);
755 		} else {
756 			tifm_unmap_sg(sock, &host->bounce_buf, 1,
757 				      (r_data->flags & MMC_DATA_WRITE)
758 				      ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
759 			tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
760 				      (r_data->flags & MMC_DATA_WRITE)
761 				      ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
762 		}
763 
764 		r_data->bytes_xfered = r_data->blocks
765 			- readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
766 		r_data->bytes_xfered *= r_data->blksz;
767 		r_data->bytes_xfered += r_data->blksz
768 			- readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
769 	}
770 
771 	writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
772 	       sock->addr + SOCK_CONTROL);
773 
774 	spin_unlock_irqrestore(&sock->lock, flags);
775 	mmc_request_done(mmc, mrq);
776 }
777 
tifm_sd_abort(struct timer_list * t)778 static void tifm_sd_abort(struct timer_list *t)
779 {
780 	struct tifm_sd *host = from_timer(host, t, timer);
781 
782 	pr_err("%s : card failed to respond for a long period of time "
783 	       "(%x, %x)\n",
784 	       dev_name(&host->dev->dev), host->req->cmd->opcode, host->cmd_flags);
785 
786 	tifm_eject(host->dev);
787 }
788 
tifm_sd_ios(struct mmc_host * mmc,struct mmc_ios * ios)789 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
790 {
791 	struct tifm_sd *host = mmc_priv(mmc);
792 	struct tifm_dev *sock = host->dev;
793 	unsigned int clk_div1, clk_div2;
794 	unsigned long flags;
795 
796 	spin_lock_irqsave(&sock->lock, flags);
797 
798 	dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, "
799 		"chip_select = %x, power_mode = %x, bus_width = %x\n",
800 		ios->clock, ios->vdd, ios->bus_mode, ios->chip_select,
801 		ios->power_mode, ios->bus_width);
802 
803 	if (ios->bus_width == MMC_BUS_WIDTH_4) {
804 		writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
805 		       sock->addr + SOCK_MMCSD_CONFIG);
806 	} else {
807 		writel((~TIFM_MMCSD_4BBUS)
808 		       & readl(sock->addr + SOCK_MMCSD_CONFIG),
809 		       sock->addr + SOCK_MMCSD_CONFIG);
810 	}
811 
812 	if (ios->clock) {
813 		clk_div1 = 20000000 / ios->clock;
814 		if (!clk_div1)
815 			clk_div1 = 1;
816 
817 		clk_div2 = 24000000 / ios->clock;
818 		if (!clk_div2)
819 			clk_div2 = 1;
820 
821 		if ((20000000 / clk_div1) > ios->clock)
822 			clk_div1++;
823 		if ((24000000 / clk_div2) > ios->clock)
824 			clk_div2++;
825 		if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
826 			host->clk_freq = 20000000;
827 			host->clk_div = clk_div1;
828 			writel((~TIFM_CTRL_FAST_CLK)
829 			       & readl(sock->addr + SOCK_CONTROL),
830 			       sock->addr + SOCK_CONTROL);
831 		} else {
832 			host->clk_freq = 24000000;
833 			host->clk_div = clk_div2;
834 			writel(TIFM_CTRL_FAST_CLK
835 			       | readl(sock->addr + SOCK_CONTROL),
836 			       sock->addr + SOCK_CONTROL);
837 		}
838 	} else {
839 		host->clk_div = 0;
840 	}
841 	host->clk_div &= TIFM_MMCSD_CLKMASK;
842 	writel(host->clk_div
843 	       | ((~TIFM_MMCSD_CLKMASK)
844 		  & readl(sock->addr + SOCK_MMCSD_CONFIG)),
845 	       sock->addr + SOCK_MMCSD_CONFIG);
846 
847 	host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
848 
849 	/* chip_select : maybe later */
850 	//vdd
851 	//power is set before probe / after remove
852 
853 	spin_unlock_irqrestore(&sock->lock, flags);
854 }
855 
tifm_sd_ro(struct mmc_host * mmc)856 static int tifm_sd_ro(struct mmc_host *mmc)
857 {
858 	int rc = 0;
859 	struct tifm_sd *host = mmc_priv(mmc);
860 	struct tifm_dev *sock = host->dev;
861 	unsigned long flags;
862 
863 	spin_lock_irqsave(&sock->lock, flags);
864 	if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
865 		rc = 1;
866 	spin_unlock_irqrestore(&sock->lock, flags);
867 	return rc;
868 }
869 
870 static const struct mmc_host_ops tifm_sd_ops = {
871 	.request = tifm_sd_request,
872 	.set_ios = tifm_sd_ios,
873 	.get_ro  = tifm_sd_ro
874 };
875 
tifm_sd_initialize_host(struct tifm_sd * host)876 static int tifm_sd_initialize_host(struct tifm_sd *host)
877 {
878 	int rc;
879 	unsigned int host_status = 0;
880 	struct tifm_dev *sock = host->dev;
881 
882 	writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
883 	host->clk_div = 61;
884 	host->clk_freq = 20000000;
885 	writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
886 	writel(host->clk_div | TIFM_MMCSD_POWER,
887 	       sock->addr + SOCK_MMCSD_CONFIG);
888 
889 	/* wait up to 0.51 sec for reset */
890 	for (rc = 32; rc <= 256; rc <<= 1) {
891 		if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
892 			rc = 0;
893 			break;
894 		}
895 		msleep(rc);
896 	}
897 
898 	if (rc) {
899 		pr_err("%s : controller failed to reset\n",
900 		       dev_name(&sock->dev));
901 		return -ENODEV;
902 	}
903 
904 	writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
905 	writel(host->clk_div | TIFM_MMCSD_POWER,
906 	       sock->addr + SOCK_MMCSD_CONFIG);
907 	writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
908 
909 	// command timeout fixed to 64 clocks for now
910 	writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
911 	writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
912 
913 	for (rc = 16; rc <= 64; rc <<= 1) {
914 		host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
915 		writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
916 		if (!(host_status & TIFM_MMCSD_ERRMASK)
917 		    && (host_status & TIFM_MMCSD_EOC)) {
918 			rc = 0;
919 			break;
920 		}
921 		msleep(rc);
922 	}
923 
924 	if (rc) {
925 		pr_err("%s : card not ready - probe failed on initialization\n",
926 		       dev_name(&sock->dev));
927 		return -ENODEV;
928 	}
929 
930 	writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
931 	       | TIFM_MMCSD_ERRMASK,
932 	       sock->addr + SOCK_MMCSD_INT_ENABLE);
933 
934 	return 0;
935 }
936 
tifm_sd_probe(struct tifm_dev * sock)937 static int tifm_sd_probe(struct tifm_dev *sock)
938 {
939 	struct mmc_host *mmc;
940 	struct tifm_sd *host;
941 	int rc = -EIO;
942 
943 	if (!(TIFM_SOCK_STATE_OCCUPIED
944 	      & readl(sock->addr + SOCK_PRESENT_STATE))) {
945 		pr_warn("%s : card gone, unexpectedly\n",
946 			dev_name(&sock->dev));
947 		return rc;
948 	}
949 
950 	mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
951 	if (!mmc)
952 		return -ENOMEM;
953 
954 	host = mmc_priv(mmc);
955 	tifm_set_drvdata(sock, mmc);
956 	host->dev = sock;
957 	host->timeout_jiffies = msecs_to_jiffies(TIFM_MMCSD_REQ_TIMEOUT_MS);
958 	/*
959 	 * We use a fixed request timeout of 1s, hence inform the core about it.
960 	 * A future improvement should instead respect the cmd->busy_timeout.
961 	 */
962 	mmc->max_busy_timeout = TIFM_MMCSD_REQ_TIMEOUT_MS;
963 
964 	INIT_WORK(&host->finish_bh_work, tifm_sd_end_cmd);
965 	timer_setup(&host->timer, tifm_sd_abort, 0);
966 
967 	mmc->ops = &tifm_sd_ops;
968 	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
969 	mmc->caps = MMC_CAP_4_BIT_DATA;
970 	mmc->f_min = 20000000 / 60;
971 	mmc->f_max = 24000000;
972 
973 	mmc->max_blk_count = 2048;
974 	mmc->max_segs = mmc->max_blk_count;
975 	mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE);
976 	mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size;
977 	mmc->max_req_size = mmc->max_seg_size;
978 
979 	sock->card_event = tifm_sd_card_event;
980 	sock->data_event = tifm_sd_data_event;
981 	rc = tifm_sd_initialize_host(host);
982 
983 	if (!rc)
984 		rc = mmc_add_host(mmc);
985 	if (!rc)
986 		return 0;
987 
988 	mmc_free_host(mmc);
989 	return rc;
990 }
991 
tifm_sd_remove(struct tifm_dev * sock)992 static void tifm_sd_remove(struct tifm_dev *sock)
993 {
994 	struct mmc_host *mmc = tifm_get_drvdata(sock);
995 	struct tifm_sd *host = mmc_priv(mmc);
996 	unsigned long flags;
997 
998 	spin_lock_irqsave(&sock->lock, flags);
999 	host->eject = 1;
1000 	writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
1001 	spin_unlock_irqrestore(&sock->lock, flags);
1002 
1003 	cancel_work_sync(&host->finish_bh_work);
1004 
1005 	spin_lock_irqsave(&sock->lock, flags);
1006 	if (host->req) {
1007 		writel(TIFM_FIFO_INT_SETALL,
1008 		       sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1009 		writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
1010 		host->req->cmd->error = -ENOMEDIUM;
1011 		if (host->req->stop)
1012 			host->req->stop->error = -ENOMEDIUM;
1013 		queue_work(system_bh_wq, &host->finish_bh_work);
1014 	}
1015 	spin_unlock_irqrestore(&sock->lock, flags);
1016 	mmc_remove_host(mmc);
1017 	dev_dbg(&sock->dev, "after remove\n");
1018 
1019 	mmc_free_host(mmc);
1020 }
1021 
1022 #ifdef CONFIG_PM
1023 
tifm_sd_suspend(struct tifm_dev * sock,pm_message_t state)1024 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
1025 {
1026 	return 0;
1027 }
1028 
tifm_sd_resume(struct tifm_dev * sock)1029 static int tifm_sd_resume(struct tifm_dev *sock)
1030 {
1031 	struct mmc_host *mmc = tifm_get_drvdata(sock);
1032 	struct tifm_sd *host = mmc_priv(mmc);
1033 	int rc;
1034 
1035 	rc = tifm_sd_initialize_host(host);
1036 	dev_dbg(&sock->dev, "resume initialize %d\n", rc);
1037 
1038 	if (rc)
1039 		host->eject = 1;
1040 
1041 	return rc;
1042 }
1043 
1044 #else
1045 
1046 #define tifm_sd_suspend NULL
1047 #define tifm_sd_resume NULL
1048 
1049 #endif /* CONFIG_PM */
1050 
1051 static struct tifm_device_id tifm_sd_id_tbl[] = {
1052 	{ TIFM_TYPE_SD }, { }
1053 };
1054 
1055 static struct tifm_driver tifm_sd_driver = {
1056 	.driver = {
1057 		.name  = DRIVER_NAME,
1058 		.owner = THIS_MODULE
1059 	},
1060 	.id_table = tifm_sd_id_tbl,
1061 	.probe    = tifm_sd_probe,
1062 	.remove   = tifm_sd_remove,
1063 	.suspend  = tifm_sd_suspend,
1064 	.resume   = tifm_sd_resume
1065 };
1066 
tifm_sd_init(void)1067 static int __init tifm_sd_init(void)
1068 {
1069 	return tifm_register_driver(&tifm_sd_driver);
1070 }
1071 
tifm_sd_exit(void)1072 static void __exit tifm_sd_exit(void)
1073 {
1074 	tifm_unregister_driver(&tifm_sd_driver);
1075 }
1076 
1077 MODULE_AUTHOR("Alex Dubov");
1078 MODULE_DESCRIPTION("TI FlashMedia SD driver");
1079 MODULE_LICENSE("GPL");
1080 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
1081 MODULE_VERSION(DRIVER_VERSION);
1082 
1083 module_init(tifm_sd_init);
1084 module_exit(tifm_sd_exit);
1085