1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/minmax.h>
22 #include <linux/module.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/regulator/consumer.h>
25
26 #include <media/v4l2-cci.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-event.h>
30 #include <media/v4l2-fwnode.h>
31 #include <media/v4l2-mediabus.h>
32
33 /* Chip ID */
34 #define IMX219_REG_CHIP_ID CCI_REG16(0x0000)
35 #define IMX219_CHIP_ID 0x0219
36
37 #define IMX219_REG_MODE_SELECT CCI_REG8(0x0100)
38 #define IMX219_MODE_STANDBY 0x00
39 #define IMX219_MODE_STREAMING 0x01
40
41 #define IMX219_REG_CSI_LANE_MODE CCI_REG8(0x0114)
42 #define IMX219_CSI_2_LANE_MODE 0x01
43 #define IMX219_CSI_4_LANE_MODE 0x03
44
45 #define IMX219_REG_DPHY_CTRL CCI_REG8(0x0128)
46 #define IMX219_DPHY_CTRL_TIMING_AUTO 0
47 #define IMX219_DPHY_CTRL_TIMING_MANUAL 1
48
49 #define IMX219_REG_EXCK_FREQ CCI_REG16(0x012a)
50 #define IMX219_EXCK_FREQ(n) ((n) * 256) /* n expressed in MHz */
51
52 /* Analog gain control */
53 #define IMX219_REG_ANALOG_GAIN CCI_REG8(0x0157)
54 #define IMX219_ANA_GAIN_MIN 0
55 #define IMX219_ANA_GAIN_MAX 232
56 #define IMX219_ANA_GAIN_STEP 1
57 #define IMX219_ANA_GAIN_DEFAULT 0x0
58
59 /* Digital gain control */
60 #define IMX219_REG_DIGITAL_GAIN CCI_REG16(0x0158)
61 #define IMX219_DGTL_GAIN_MIN 0x0100
62 #define IMX219_DGTL_GAIN_MAX 0x0fff
63 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
64 #define IMX219_DGTL_GAIN_STEP 1
65
66 /* Exposure control */
67 #define IMX219_REG_EXPOSURE CCI_REG16(0x015a)
68 #define IMX219_EXPOSURE_MIN 4
69 #define IMX219_EXPOSURE_STEP 1
70 #define IMX219_EXPOSURE_DEFAULT 0x640
71 #define IMX219_EXPOSURE_MAX 65535
72
73 /* V_TIMING internal */
74 #define IMX219_REG_VTS CCI_REG16(0x0160)
75 #define IMX219_VTS_MAX 0xffff
76
77 #define IMX219_VBLANK_MIN 4
78
79 /* HBLANK control - read only */
80 #define IMX219_PPL_DEFAULT 3448
81
82 #define IMX219_REG_LINE_LENGTH_A CCI_REG16(0x0162)
83 #define IMX219_REG_X_ADD_STA_A CCI_REG16(0x0164)
84 #define IMX219_REG_X_ADD_END_A CCI_REG16(0x0166)
85 #define IMX219_REG_Y_ADD_STA_A CCI_REG16(0x0168)
86 #define IMX219_REG_Y_ADD_END_A CCI_REG16(0x016a)
87 #define IMX219_REG_X_OUTPUT_SIZE CCI_REG16(0x016c)
88 #define IMX219_REG_Y_OUTPUT_SIZE CCI_REG16(0x016e)
89 #define IMX219_REG_X_ODD_INC_A CCI_REG8(0x0170)
90 #define IMX219_REG_Y_ODD_INC_A CCI_REG8(0x0171)
91 #define IMX219_REG_ORIENTATION CCI_REG8(0x0172)
92
93 /* Binning Mode */
94 #define IMX219_REG_BINNING_MODE_H CCI_REG8(0x0174)
95 #define IMX219_REG_BINNING_MODE_V CCI_REG8(0x0175)
96 #define IMX219_BINNING_NONE 0x00
97 #define IMX219_BINNING_X2 0x01
98 #define IMX219_BINNING_X2_ANALOG 0x03
99
100 #define IMX219_REG_CSI_DATA_FORMAT_A CCI_REG16(0x018c)
101
102 /* PLL Settings */
103 #define IMX219_REG_VTPXCK_DIV CCI_REG8(0x0301)
104 #define IMX219_REG_VTSYCK_DIV CCI_REG8(0x0303)
105 #define IMX219_REG_PREPLLCK_VT_DIV CCI_REG8(0x0304)
106 #define IMX219_REG_PREPLLCK_OP_DIV CCI_REG8(0x0305)
107 #define IMX219_REG_PLL_VT_MPY CCI_REG16(0x0306)
108 #define IMX219_REG_OPPXCK_DIV CCI_REG8(0x0309)
109 #define IMX219_REG_OPSYCK_DIV CCI_REG8(0x030b)
110 #define IMX219_REG_PLL_OP_MPY CCI_REG16(0x030c)
111
112 /* Test Pattern Control */
113 #define IMX219_REG_TEST_PATTERN CCI_REG16(0x0600)
114 #define IMX219_TEST_PATTERN_DISABLE 0
115 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
116 #define IMX219_TEST_PATTERN_COLOR_BARS 2
117 #define IMX219_TEST_PATTERN_GREY_COLOR 3
118 #define IMX219_TEST_PATTERN_PN9 4
119
120 /* Test pattern colour components */
121 #define IMX219_REG_TESTP_RED CCI_REG16(0x0602)
122 #define IMX219_REG_TESTP_GREENR CCI_REG16(0x0604)
123 #define IMX219_REG_TESTP_BLUE CCI_REG16(0x0606)
124 #define IMX219_REG_TESTP_GREENB CCI_REG16(0x0608)
125 #define IMX219_TESTP_COLOUR_MIN 0
126 #define IMX219_TESTP_COLOUR_MAX 0x03ff
127 #define IMX219_TESTP_COLOUR_STEP 1
128
129 #define IMX219_REG_TP_WINDOW_WIDTH CCI_REG16(0x0624)
130 #define IMX219_REG_TP_WINDOW_HEIGHT CCI_REG16(0x0626)
131
132 /* External clock frequency is 24.0M */
133 #define IMX219_XCLK_FREQ 24000000
134
135 /* Pixel rate is fixed for all the modes */
136 #define IMX219_PIXEL_RATE 182400000
137 #define IMX219_PIXEL_RATE_4LANE 280800000
138
139 #define IMX219_DEFAULT_LINK_FREQ 456000000
140 #define IMX219_DEFAULT_LINK_FREQ_4LANE 363000000
141
142 /* IMX219 native and active pixel array size. */
143 #define IMX219_NATIVE_WIDTH 3296U
144 #define IMX219_NATIVE_HEIGHT 2480U
145 #define IMX219_PIXEL_ARRAY_LEFT 8U
146 #define IMX219_PIXEL_ARRAY_TOP 8U
147 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
148 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
149
150 /* Mode : resolution and related config&values */
151 struct imx219_mode {
152 /* Frame width */
153 unsigned int width;
154 /* Frame height */
155 unsigned int height;
156
157 /* V-timing */
158 unsigned int vts_def;
159 };
160
161 static const struct cci_reg_sequence imx219_common_regs[] = {
162 { IMX219_REG_MODE_SELECT, 0x00 }, /* Mode Select */
163
164 /* To Access Addresses 3000-5fff, send the following commands */
165 { CCI_REG8(0x30eb), 0x05 },
166 { CCI_REG8(0x30eb), 0x0c },
167 { CCI_REG8(0x300a), 0xff },
168 { CCI_REG8(0x300b), 0xff },
169 { CCI_REG8(0x30eb), 0x05 },
170 { CCI_REG8(0x30eb), 0x09 },
171
172 /* PLL Clock Table */
173 { IMX219_REG_VTPXCK_DIV, 5 },
174 { IMX219_REG_VTSYCK_DIV, 1 },
175 { IMX219_REG_PREPLLCK_VT_DIV, 3 }, /* 0x03 = AUTO set */
176 { IMX219_REG_PREPLLCK_OP_DIV, 3 }, /* 0x03 = AUTO set */
177 { IMX219_REG_PLL_VT_MPY, 57 },
178 { IMX219_REG_OPSYCK_DIV, 1 },
179 { IMX219_REG_PLL_OP_MPY, 114 },
180
181 /* Undocumented registers */
182 { CCI_REG8(0x455e), 0x00 },
183 { CCI_REG8(0x471e), 0x4b },
184 { CCI_REG8(0x4767), 0x0f },
185 { CCI_REG8(0x4750), 0x14 },
186 { CCI_REG8(0x4540), 0x00 },
187 { CCI_REG8(0x47b4), 0x14 },
188 { CCI_REG8(0x4713), 0x30 },
189 { CCI_REG8(0x478b), 0x10 },
190 { CCI_REG8(0x478f), 0x10 },
191 { CCI_REG8(0x4793), 0x10 },
192 { CCI_REG8(0x4797), 0x0e },
193 { CCI_REG8(0x479b), 0x0e },
194
195 /* Frame Bank Register Group "A" */
196 { IMX219_REG_LINE_LENGTH_A, 3448 },
197 { IMX219_REG_X_ODD_INC_A, 1 },
198 { IMX219_REG_Y_ODD_INC_A, 1 },
199
200 /* Output setup registers */
201 { IMX219_REG_DPHY_CTRL, IMX219_DPHY_CTRL_TIMING_AUTO },
202 { IMX219_REG_EXCK_FREQ, IMX219_EXCK_FREQ(IMX219_XCLK_FREQ / 1000000) },
203 };
204
205 static const s64 imx219_link_freq_menu[] = {
206 IMX219_DEFAULT_LINK_FREQ,
207 };
208
209 static const s64 imx219_link_freq_4lane_menu[] = {
210 IMX219_DEFAULT_LINK_FREQ_4LANE,
211 };
212
213 static const char * const imx219_test_pattern_menu[] = {
214 "Disabled",
215 "Color Bars",
216 "Solid Color",
217 "Grey Color Bars",
218 "PN9"
219 };
220
221 static const int imx219_test_pattern_val[] = {
222 IMX219_TEST_PATTERN_DISABLE,
223 IMX219_TEST_PATTERN_COLOR_BARS,
224 IMX219_TEST_PATTERN_SOLID_COLOR,
225 IMX219_TEST_PATTERN_GREY_COLOR,
226 IMX219_TEST_PATTERN_PN9,
227 };
228
229 /* regulator supplies */
230 static const char * const imx219_supply_name[] = {
231 /* Supplies can be enabled in any order */
232 "VANA", /* Analog (2.8V) supply */
233 "VDIG", /* Digital Core (1.8V) supply */
234 "VDDL", /* IF (1.2V) supply */
235 };
236
237 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
238
239 /*
240 * The supported formats.
241 * This table MUST contain 4 entries per format, to cover the various flip
242 * combinations in the order
243 * - no flip
244 * - h flip
245 * - v flip
246 * - h&v flips
247 */
248 static const u32 imx219_mbus_formats[] = {
249 MEDIA_BUS_FMT_SRGGB10_1X10,
250 MEDIA_BUS_FMT_SGRBG10_1X10,
251 MEDIA_BUS_FMT_SGBRG10_1X10,
252 MEDIA_BUS_FMT_SBGGR10_1X10,
253
254 MEDIA_BUS_FMT_SRGGB8_1X8,
255 MEDIA_BUS_FMT_SGRBG8_1X8,
256 MEDIA_BUS_FMT_SGBRG8_1X8,
257 MEDIA_BUS_FMT_SBGGR8_1X8,
258 };
259
260 /*
261 * Initialisation delay between XCLR low->high and the moment when the sensor
262 * can start capture (i.e. can leave software stanby) must be not less than:
263 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
264 * where
265 * t4 is fixed, and is max 200uS,
266 * t5 is fixed, and is 6000uS,
267 * t6 depends on the sensor external clock, and is max 32000 clock periods.
268 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
269 * So for any acceptable external clock t6 is always within the range of
270 * 1185 to 5333 uS, and is always less than t5.
271 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
272 * initialize the sensor over I2C, and then exit the software standby.
273 *
274 * This start-up time can be optimized a bit more, if we start the writes
275 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
276 * initialization over I2C may complete before (t4+t5) expires, and we must
277 * ensure that capture is not started before (t4+t5).
278 *
279 * This delay doesn't account for the power supply startup time. If needed,
280 * this should be taken care of via the regulator framework. E.g. in the
281 * case of DT for regulator-fixed one should define the startup-delay-us
282 * property.
283 */
284 #define IMX219_XCLR_MIN_DELAY_US 6200
285 #define IMX219_XCLR_DELAY_RANGE_US 1000
286
287 /* Mode configs */
288 static const struct imx219_mode supported_modes[] = {
289 {
290 /* 8MPix 15fps mode */
291 .width = 3280,
292 .height = 2464,
293 .vts_def = 3526,
294 },
295 {
296 /* 1080P 30fps cropped */
297 .width = 1920,
298 .height = 1080,
299 .vts_def = 1763,
300 },
301 {
302 /* 2x2 binned 30fps mode */
303 .width = 1640,
304 .height = 1232,
305 .vts_def = 1763,
306 },
307 {
308 /* 640x480 30fps mode */
309 .width = 640,
310 .height = 480,
311 .vts_def = 1763,
312 },
313 };
314
315 struct imx219 {
316 struct v4l2_subdev sd;
317 struct media_pad pad;
318
319 struct regmap *regmap;
320 struct clk *xclk; /* system clock to IMX219 */
321 u32 xclk_freq;
322
323 struct gpio_desc *reset_gpio;
324 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
325
326 struct v4l2_ctrl_handler ctrl_handler;
327 /* V4L2 Controls */
328 struct v4l2_ctrl *pixel_rate;
329 struct v4l2_ctrl *link_freq;
330 struct v4l2_ctrl *exposure;
331 struct v4l2_ctrl *vflip;
332 struct v4l2_ctrl *hflip;
333 struct v4l2_ctrl *vblank;
334 struct v4l2_ctrl *hblank;
335
336 /* Two or Four lanes */
337 u8 lanes;
338 };
339
to_imx219(struct v4l2_subdev * _sd)340 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
341 {
342 return container_of(_sd, struct imx219, sd);
343 }
344
345 /* Get bayer order based on flip setting. */
imx219_get_format_code(struct imx219 * imx219,u32 code)346 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
347 {
348 unsigned int i;
349
350 for (i = 0; i < ARRAY_SIZE(imx219_mbus_formats); i++)
351 if (imx219_mbus_formats[i] == code)
352 break;
353
354 if (i >= ARRAY_SIZE(imx219_mbus_formats))
355 i = 0;
356
357 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
358 (imx219->hflip->val ? 1 : 0);
359
360 return imx219_mbus_formats[i];
361 }
362
363 /* -----------------------------------------------------------------------------
364 * Controls
365 */
366
imx219_set_ctrl(struct v4l2_ctrl * ctrl)367 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
368 {
369 struct imx219 *imx219 =
370 container_of(ctrl->handler, struct imx219, ctrl_handler);
371 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
372 const struct v4l2_mbus_framefmt *format;
373 struct v4l2_subdev_state *state;
374 int ret = 0;
375
376 state = v4l2_subdev_get_locked_active_state(&imx219->sd);
377 format = v4l2_subdev_state_get_format(state, 0);
378
379 if (ctrl->id == V4L2_CID_VBLANK) {
380 int exposure_max, exposure_def;
381
382 /* Update max exposure while meeting expected vblanking */
383 exposure_max = format->height + ctrl->val - 4;
384 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
385 exposure_max : IMX219_EXPOSURE_DEFAULT;
386 __v4l2_ctrl_modify_range(imx219->exposure,
387 imx219->exposure->minimum,
388 exposure_max, imx219->exposure->step,
389 exposure_def);
390 }
391
392 /*
393 * Applying V4L2 control value only happens
394 * when power is up for streaming
395 */
396 if (pm_runtime_get_if_in_use(&client->dev) == 0)
397 return 0;
398
399 switch (ctrl->id) {
400 case V4L2_CID_ANALOGUE_GAIN:
401 cci_write(imx219->regmap, IMX219_REG_ANALOG_GAIN,
402 ctrl->val, &ret);
403 break;
404 case V4L2_CID_EXPOSURE:
405 cci_write(imx219->regmap, IMX219_REG_EXPOSURE,
406 ctrl->val, &ret);
407 break;
408 case V4L2_CID_DIGITAL_GAIN:
409 cci_write(imx219->regmap, IMX219_REG_DIGITAL_GAIN,
410 ctrl->val, &ret);
411 break;
412 case V4L2_CID_TEST_PATTERN:
413 cci_write(imx219->regmap, IMX219_REG_TEST_PATTERN,
414 imx219_test_pattern_val[ctrl->val], &ret);
415 break;
416 case V4L2_CID_HFLIP:
417 case V4L2_CID_VFLIP:
418 cci_write(imx219->regmap, IMX219_REG_ORIENTATION,
419 imx219->hflip->val | imx219->vflip->val << 1, &ret);
420 break;
421 case V4L2_CID_VBLANK:
422 cci_write(imx219->regmap, IMX219_REG_VTS,
423 format->height + ctrl->val, &ret);
424 break;
425 case V4L2_CID_TEST_PATTERN_RED:
426 cci_write(imx219->regmap, IMX219_REG_TESTP_RED,
427 ctrl->val, &ret);
428 break;
429 case V4L2_CID_TEST_PATTERN_GREENR:
430 cci_write(imx219->regmap, IMX219_REG_TESTP_GREENR,
431 ctrl->val, &ret);
432 break;
433 case V4L2_CID_TEST_PATTERN_BLUE:
434 cci_write(imx219->regmap, IMX219_REG_TESTP_BLUE,
435 ctrl->val, &ret);
436 break;
437 case V4L2_CID_TEST_PATTERN_GREENB:
438 cci_write(imx219->regmap, IMX219_REG_TESTP_GREENB,
439 ctrl->val, &ret);
440 break;
441 default:
442 dev_info(&client->dev,
443 "ctrl(id:0x%x,val:0x%x) is not handled\n",
444 ctrl->id, ctrl->val);
445 ret = -EINVAL;
446 break;
447 }
448
449 pm_runtime_put(&client->dev);
450
451 return ret;
452 }
453
454 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
455 .s_ctrl = imx219_set_ctrl,
456 };
457
imx219_get_pixel_rate(struct imx219 * imx219)458 static unsigned long imx219_get_pixel_rate(struct imx219 *imx219)
459 {
460 return (imx219->lanes == 2) ? IMX219_PIXEL_RATE : IMX219_PIXEL_RATE_4LANE;
461 }
462
463 /* Initialize control handlers */
imx219_init_controls(struct imx219 * imx219)464 static int imx219_init_controls(struct imx219 *imx219)
465 {
466 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
467 const struct imx219_mode *mode = &supported_modes[0];
468 struct v4l2_ctrl_handler *ctrl_hdlr;
469 struct v4l2_fwnode_device_properties props;
470 int exposure_max, exposure_def, hblank;
471 int i, ret;
472
473 ctrl_hdlr = &imx219->ctrl_handler;
474 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
475 if (ret)
476 return ret;
477
478 /* By default, PIXEL_RATE is read only */
479 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
480 V4L2_CID_PIXEL_RATE,
481 imx219_get_pixel_rate(imx219),
482 imx219_get_pixel_rate(imx219), 1,
483 imx219_get_pixel_rate(imx219));
484
485 imx219->link_freq =
486 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
487 V4L2_CID_LINK_FREQ,
488 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
489 (imx219->lanes == 2) ? imx219_link_freq_menu :
490 imx219_link_freq_4lane_menu);
491 if (imx219->link_freq)
492 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
493
494 /* Initial vblank/hblank/exposure parameters based on current mode */
495 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
496 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
497 IMX219_VTS_MAX - mode->height, 1,
498 mode->vts_def - mode->height);
499 hblank = IMX219_PPL_DEFAULT - mode->width;
500 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
501 V4L2_CID_HBLANK, hblank, hblank,
502 1, hblank);
503 if (imx219->hblank)
504 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
505 exposure_max = mode->vts_def - 4;
506 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
507 exposure_max : IMX219_EXPOSURE_DEFAULT;
508 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
509 V4L2_CID_EXPOSURE,
510 IMX219_EXPOSURE_MIN, exposure_max,
511 IMX219_EXPOSURE_STEP,
512 exposure_def);
513
514 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
515 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
516 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
517
518 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
519 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
520 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
521
522 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
523 V4L2_CID_HFLIP, 0, 1, 1, 0);
524 if (imx219->hflip)
525 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
526
527 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
528 V4L2_CID_VFLIP, 0, 1, 1, 0);
529 if (imx219->vflip)
530 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
531
532 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
533 V4L2_CID_TEST_PATTERN,
534 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
535 0, 0, imx219_test_pattern_menu);
536 for (i = 0; i < 4; i++) {
537 /*
538 * The assumption is that
539 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
540 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
541 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
542 */
543 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
544 V4L2_CID_TEST_PATTERN_RED + i,
545 IMX219_TESTP_COLOUR_MIN,
546 IMX219_TESTP_COLOUR_MAX,
547 IMX219_TESTP_COLOUR_STEP,
548 IMX219_TESTP_COLOUR_MAX);
549 /* The "Solid color" pattern is white by default */
550 }
551
552 if (ctrl_hdlr->error) {
553 ret = ctrl_hdlr->error;
554 dev_err_probe(&client->dev, ret, "Control init failed\n");
555 goto error;
556 }
557
558 ret = v4l2_fwnode_device_parse(&client->dev, &props);
559 if (ret)
560 goto error;
561
562 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
563 &props);
564 if (ret)
565 goto error;
566
567 imx219->sd.ctrl_handler = ctrl_hdlr;
568
569 return 0;
570
571 error:
572 v4l2_ctrl_handler_free(ctrl_hdlr);
573
574 return ret;
575 }
576
imx219_free_controls(struct imx219 * imx219)577 static void imx219_free_controls(struct imx219 *imx219)
578 {
579 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
580 }
581
582 /* -----------------------------------------------------------------------------
583 * Subdev operations
584 */
585
imx219_set_framefmt(struct imx219 * imx219,struct v4l2_subdev_state * state)586 static int imx219_set_framefmt(struct imx219 *imx219,
587 struct v4l2_subdev_state *state)
588 {
589 const struct v4l2_mbus_framefmt *format;
590 const struct v4l2_rect *crop;
591 unsigned int bpp;
592 u64 bin_h, bin_v;
593 int ret = 0;
594
595 format = v4l2_subdev_state_get_format(state, 0);
596 crop = v4l2_subdev_state_get_crop(state, 0);
597
598 switch (format->code) {
599 case MEDIA_BUS_FMT_SRGGB8_1X8:
600 case MEDIA_BUS_FMT_SGRBG8_1X8:
601 case MEDIA_BUS_FMT_SGBRG8_1X8:
602 case MEDIA_BUS_FMT_SBGGR8_1X8:
603 bpp = 8;
604 break;
605
606 case MEDIA_BUS_FMT_SRGGB10_1X10:
607 case MEDIA_BUS_FMT_SGRBG10_1X10:
608 case MEDIA_BUS_FMT_SGBRG10_1X10:
609 case MEDIA_BUS_FMT_SBGGR10_1X10:
610 default:
611 bpp = 10;
612 break;
613 }
614
615 cci_write(imx219->regmap, IMX219_REG_X_ADD_STA_A,
616 crop->left - IMX219_PIXEL_ARRAY_LEFT, &ret);
617 cci_write(imx219->regmap, IMX219_REG_X_ADD_END_A,
618 crop->left - IMX219_PIXEL_ARRAY_LEFT + crop->width - 1, &ret);
619 cci_write(imx219->regmap, IMX219_REG_Y_ADD_STA_A,
620 crop->top - IMX219_PIXEL_ARRAY_TOP, &ret);
621 cci_write(imx219->regmap, IMX219_REG_Y_ADD_END_A,
622 crop->top - IMX219_PIXEL_ARRAY_TOP + crop->height - 1, &ret);
623
624 switch (crop->width / format->width) {
625 case 1:
626 default:
627 bin_h = IMX219_BINNING_NONE;
628 break;
629 case 2:
630 bin_h = bpp == 8 ? IMX219_BINNING_X2_ANALOG : IMX219_BINNING_X2;
631 break;
632 }
633
634 switch (crop->height / format->height) {
635 case 1:
636 default:
637 bin_v = IMX219_BINNING_NONE;
638 break;
639 case 2:
640 bin_v = bpp == 8 ? IMX219_BINNING_X2_ANALOG : IMX219_BINNING_X2;
641 break;
642 }
643
644 cci_write(imx219->regmap, IMX219_REG_BINNING_MODE_H, bin_h, &ret);
645 cci_write(imx219->regmap, IMX219_REG_BINNING_MODE_V, bin_v, &ret);
646
647 cci_write(imx219->regmap, IMX219_REG_X_OUTPUT_SIZE,
648 format->width, &ret);
649 cci_write(imx219->regmap, IMX219_REG_Y_OUTPUT_SIZE,
650 format->height, &ret);
651
652 cci_write(imx219->regmap, IMX219_REG_TP_WINDOW_WIDTH,
653 format->width, &ret);
654 cci_write(imx219->regmap, IMX219_REG_TP_WINDOW_HEIGHT,
655 format->height, &ret);
656
657 cci_write(imx219->regmap, IMX219_REG_CSI_DATA_FORMAT_A,
658 (bpp << 8) | bpp, &ret);
659 cci_write(imx219->regmap, IMX219_REG_OPPXCK_DIV, bpp, &ret);
660
661 return ret;
662 }
663
imx219_configure_lanes(struct imx219 * imx219)664 static int imx219_configure_lanes(struct imx219 *imx219)
665 {
666 return cci_write(imx219->regmap, IMX219_REG_CSI_LANE_MODE,
667 imx219->lanes == 2 ? IMX219_CSI_2_LANE_MODE :
668 IMX219_CSI_4_LANE_MODE, NULL);
669 };
670
imx219_start_streaming(struct imx219 * imx219,struct v4l2_subdev_state * state)671 static int imx219_start_streaming(struct imx219 *imx219,
672 struct v4l2_subdev_state *state)
673 {
674 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
675 int ret;
676
677 ret = pm_runtime_resume_and_get(&client->dev);
678 if (ret < 0)
679 return ret;
680
681 /* Send all registers that are common to all modes */
682 ret = cci_multi_reg_write(imx219->regmap, imx219_common_regs,
683 ARRAY_SIZE(imx219_common_regs), NULL);
684 if (ret) {
685 dev_err(&client->dev, "%s failed to send mfg header\n", __func__);
686 goto err_rpm_put;
687 }
688
689 /* Configure two or four Lane mode */
690 ret = imx219_configure_lanes(imx219);
691 if (ret) {
692 dev_err(&client->dev, "%s failed to configure lanes\n", __func__);
693 goto err_rpm_put;
694 }
695
696 /* Apply format and crop settings. */
697 ret = imx219_set_framefmt(imx219, state);
698 if (ret) {
699 dev_err(&client->dev, "%s failed to set frame format: %d\n",
700 __func__, ret);
701 goto err_rpm_put;
702 }
703
704 /* Apply customized values from user */
705 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
706 if (ret)
707 goto err_rpm_put;
708
709 /* set stream on register */
710 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
711 IMX219_MODE_STREAMING, NULL);
712 if (ret)
713 goto err_rpm_put;
714
715 /* vflip and hflip cannot change during streaming */
716 __v4l2_ctrl_grab(imx219->vflip, true);
717 __v4l2_ctrl_grab(imx219->hflip, true);
718
719 return 0;
720
721 err_rpm_put:
722 pm_runtime_put(&client->dev);
723 return ret;
724 }
725
imx219_stop_streaming(struct imx219 * imx219)726 static void imx219_stop_streaming(struct imx219 *imx219)
727 {
728 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
729 int ret;
730
731 /* set stream off register */
732 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
733 IMX219_MODE_STANDBY, NULL);
734 if (ret)
735 dev_err(&client->dev, "%s failed to set stream\n", __func__);
736
737 __v4l2_ctrl_grab(imx219->vflip, false);
738 __v4l2_ctrl_grab(imx219->hflip, false);
739
740 pm_runtime_put(&client->dev);
741 }
742
imx219_set_stream(struct v4l2_subdev * sd,int enable)743 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
744 {
745 struct imx219 *imx219 = to_imx219(sd);
746 struct v4l2_subdev_state *state;
747 int ret = 0;
748
749 state = v4l2_subdev_lock_and_get_active_state(sd);
750
751 if (enable)
752 ret = imx219_start_streaming(imx219, state);
753 else
754 imx219_stop_streaming(imx219);
755
756 v4l2_subdev_unlock_state(state);
757 return ret;
758 }
759
imx219_update_pad_format(struct imx219 * imx219,const struct imx219_mode * mode,struct v4l2_mbus_framefmt * fmt,u32 code)760 static void imx219_update_pad_format(struct imx219 *imx219,
761 const struct imx219_mode *mode,
762 struct v4l2_mbus_framefmt *fmt, u32 code)
763 {
764 /* Bayer order varies with flips */
765 fmt->code = imx219_get_format_code(imx219, code);
766 fmt->width = mode->width;
767 fmt->height = mode->height;
768 fmt->field = V4L2_FIELD_NONE;
769 fmt->colorspace = V4L2_COLORSPACE_RAW;
770 fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
771 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
772 fmt->xfer_func = V4L2_XFER_FUNC_NONE;
773 }
774
imx219_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * state,struct v4l2_subdev_mbus_code_enum * code)775 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
776 struct v4l2_subdev_state *state,
777 struct v4l2_subdev_mbus_code_enum *code)
778 {
779 struct imx219 *imx219 = to_imx219(sd);
780
781 if (code->index >= (ARRAY_SIZE(imx219_mbus_formats) / 4))
782 return -EINVAL;
783
784 code->code = imx219_get_format_code(imx219, imx219_mbus_formats[code->index * 4]);
785
786 return 0;
787 }
788
imx219_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * state,struct v4l2_subdev_frame_size_enum * fse)789 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
790 struct v4l2_subdev_state *state,
791 struct v4l2_subdev_frame_size_enum *fse)
792 {
793 struct imx219 *imx219 = to_imx219(sd);
794 u32 code;
795
796 if (fse->index >= ARRAY_SIZE(supported_modes))
797 return -EINVAL;
798
799 code = imx219_get_format_code(imx219, fse->code);
800 if (fse->code != code)
801 return -EINVAL;
802
803 fse->min_width = supported_modes[fse->index].width;
804 fse->max_width = fse->min_width;
805 fse->min_height = supported_modes[fse->index].height;
806 fse->max_height = fse->min_height;
807
808 return 0;
809 }
810
imx219_set_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * state,struct v4l2_subdev_format * fmt)811 static int imx219_set_pad_format(struct v4l2_subdev *sd,
812 struct v4l2_subdev_state *state,
813 struct v4l2_subdev_format *fmt)
814 {
815 struct imx219 *imx219 = to_imx219(sd);
816 const struct imx219_mode *mode;
817 struct v4l2_mbus_framefmt *format;
818 struct v4l2_rect *crop;
819 unsigned int bin_h, bin_v;
820
821 mode = v4l2_find_nearest_size(supported_modes,
822 ARRAY_SIZE(supported_modes),
823 width, height,
824 fmt->format.width, fmt->format.height);
825
826 imx219_update_pad_format(imx219, mode, &fmt->format, fmt->format.code);
827
828 format = v4l2_subdev_state_get_format(state, 0);
829 *format = fmt->format;
830
831 /*
832 * Use binning to maximize the crop rectangle size, and centre it in the
833 * sensor.
834 */
835 bin_h = min(IMX219_PIXEL_ARRAY_WIDTH / format->width, 2U);
836 bin_v = min(IMX219_PIXEL_ARRAY_HEIGHT / format->height, 2U);
837
838 crop = v4l2_subdev_state_get_crop(state, 0);
839 crop->width = format->width * bin_h;
840 crop->height = format->height * bin_v;
841 crop->left = (IMX219_NATIVE_WIDTH - crop->width) / 2;
842 crop->top = (IMX219_NATIVE_HEIGHT - crop->height) / 2;
843
844 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
845 int exposure_max;
846 int exposure_def;
847 int hblank;
848
849 /* Update limits and set FPS to default */
850 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
851 IMX219_VTS_MAX - mode->height, 1,
852 mode->vts_def - mode->height);
853 __v4l2_ctrl_s_ctrl(imx219->vblank,
854 mode->vts_def - mode->height);
855 /* Update max exposure while meeting expected vblanking */
856 exposure_max = mode->vts_def - 4;
857 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
858 exposure_max : IMX219_EXPOSURE_DEFAULT;
859 __v4l2_ctrl_modify_range(imx219->exposure,
860 imx219->exposure->minimum,
861 exposure_max, imx219->exposure->step,
862 exposure_def);
863 /*
864 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
865 * depends on mode->width only, and is not changeble in any
866 * way other than changing the mode.
867 */
868 hblank = IMX219_PPL_DEFAULT - mode->width;
869 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
870 hblank);
871 }
872
873 return 0;
874 }
875
imx219_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * state,struct v4l2_subdev_selection * sel)876 static int imx219_get_selection(struct v4l2_subdev *sd,
877 struct v4l2_subdev_state *state,
878 struct v4l2_subdev_selection *sel)
879 {
880 switch (sel->target) {
881 case V4L2_SEL_TGT_CROP: {
882 sel->r = *v4l2_subdev_state_get_crop(state, 0);
883 return 0;
884 }
885
886 case V4L2_SEL_TGT_NATIVE_SIZE:
887 sel->r.top = 0;
888 sel->r.left = 0;
889 sel->r.width = IMX219_NATIVE_WIDTH;
890 sel->r.height = IMX219_NATIVE_HEIGHT;
891
892 return 0;
893
894 case V4L2_SEL_TGT_CROP_DEFAULT:
895 case V4L2_SEL_TGT_CROP_BOUNDS:
896 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
897 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
898 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
899 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
900
901 return 0;
902 }
903
904 return -EINVAL;
905 }
906
imx219_init_state(struct v4l2_subdev * sd,struct v4l2_subdev_state * state)907 static int imx219_init_state(struct v4l2_subdev *sd,
908 struct v4l2_subdev_state *state)
909 {
910 struct v4l2_subdev_format fmt = {
911 .which = V4L2_SUBDEV_FORMAT_TRY,
912 .pad = 0,
913 .format = {
914 .code = MEDIA_BUS_FMT_SRGGB10_1X10,
915 .width = supported_modes[0].width,
916 .height = supported_modes[0].height,
917 },
918 };
919
920 imx219_set_pad_format(sd, state, &fmt);
921
922 return 0;
923 }
924
925 static const struct v4l2_subdev_core_ops imx219_core_ops = {
926 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
927 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
928 };
929
930 static const struct v4l2_subdev_video_ops imx219_video_ops = {
931 .s_stream = imx219_set_stream,
932 };
933
934 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
935 .enum_mbus_code = imx219_enum_mbus_code,
936 .get_fmt = v4l2_subdev_get_fmt,
937 .set_fmt = imx219_set_pad_format,
938 .get_selection = imx219_get_selection,
939 .enum_frame_size = imx219_enum_frame_size,
940 };
941
942 static const struct v4l2_subdev_ops imx219_subdev_ops = {
943 .core = &imx219_core_ops,
944 .video = &imx219_video_ops,
945 .pad = &imx219_pad_ops,
946 };
947
948 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
949 .init_state = imx219_init_state,
950 };
951
952 /* -----------------------------------------------------------------------------
953 * Power management
954 */
955
imx219_power_on(struct device * dev)956 static int imx219_power_on(struct device *dev)
957 {
958 struct v4l2_subdev *sd = dev_get_drvdata(dev);
959 struct imx219 *imx219 = to_imx219(sd);
960 int ret;
961
962 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
963 imx219->supplies);
964 if (ret) {
965 dev_err(dev, "%s: failed to enable regulators\n",
966 __func__);
967 return ret;
968 }
969
970 ret = clk_prepare_enable(imx219->xclk);
971 if (ret) {
972 dev_err(dev, "%s: failed to enable clock\n",
973 __func__);
974 goto reg_off;
975 }
976
977 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
978 usleep_range(IMX219_XCLR_MIN_DELAY_US,
979 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
980
981 return 0;
982
983 reg_off:
984 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
985
986 return ret;
987 }
988
imx219_power_off(struct device * dev)989 static int imx219_power_off(struct device *dev)
990 {
991 struct v4l2_subdev *sd = dev_get_drvdata(dev);
992 struct imx219 *imx219 = to_imx219(sd);
993
994 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
995 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
996 clk_disable_unprepare(imx219->xclk);
997
998 return 0;
999 }
1000
1001 /* -----------------------------------------------------------------------------
1002 * Probe & remove
1003 */
1004
imx219_get_regulators(struct imx219 * imx219)1005 static int imx219_get_regulators(struct imx219 *imx219)
1006 {
1007 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1008 unsigned int i;
1009
1010 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1011 imx219->supplies[i].supply = imx219_supply_name[i];
1012
1013 return devm_regulator_bulk_get(&client->dev,
1014 IMX219_NUM_SUPPLIES,
1015 imx219->supplies);
1016 }
1017
1018 /* Verify chip ID */
imx219_identify_module(struct imx219 * imx219)1019 static int imx219_identify_module(struct imx219 *imx219)
1020 {
1021 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1022 int ret;
1023 u64 val;
1024
1025 ret = cci_read(imx219->regmap, IMX219_REG_CHIP_ID, &val, NULL);
1026 if (ret)
1027 return dev_err_probe(&client->dev, ret,
1028 "failed to read chip id %x\n",
1029 IMX219_CHIP_ID);
1030
1031 if (val != IMX219_CHIP_ID)
1032 return dev_err_probe(&client->dev, -EIO,
1033 "chip id mismatch: %x!=%llx\n",
1034 IMX219_CHIP_ID, val);
1035
1036 return 0;
1037 }
1038
imx219_check_hwcfg(struct device * dev,struct imx219 * imx219)1039 static int imx219_check_hwcfg(struct device *dev, struct imx219 *imx219)
1040 {
1041 struct fwnode_handle *endpoint;
1042 struct v4l2_fwnode_endpoint ep_cfg = {
1043 .bus_type = V4L2_MBUS_CSI2_DPHY
1044 };
1045 int ret = -EINVAL;
1046
1047 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1048 if (!endpoint)
1049 return dev_err_probe(dev, -EINVAL, "endpoint node not found\n");
1050
1051 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1052 dev_err_probe(dev, -EINVAL, "could not parse endpoint\n");
1053 goto error_out;
1054 }
1055
1056 /* Check the number of MIPI CSI2 data lanes */
1057 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
1058 ep_cfg.bus.mipi_csi2.num_data_lanes != 4) {
1059 dev_err_probe(dev, -EINVAL,
1060 "only 2 or 4 data lanes are currently supported\n");
1061 goto error_out;
1062 }
1063 imx219->lanes = ep_cfg.bus.mipi_csi2.num_data_lanes;
1064
1065 /* Check the link frequency set in device tree */
1066 if (!ep_cfg.nr_of_link_frequencies) {
1067 dev_err_probe(dev, -EINVAL,
1068 "link-frequency property not found in DT\n");
1069 goto error_out;
1070 }
1071
1072 if (ep_cfg.nr_of_link_frequencies != 1 ||
1073 (ep_cfg.link_frequencies[0] != ((imx219->lanes == 2) ?
1074 IMX219_DEFAULT_LINK_FREQ : IMX219_DEFAULT_LINK_FREQ_4LANE))) {
1075 dev_err_probe(dev, -EINVAL,
1076 "Link frequency not supported: %lld\n",
1077 ep_cfg.link_frequencies[0]);
1078 goto error_out;
1079 }
1080
1081 ret = 0;
1082
1083 error_out:
1084 v4l2_fwnode_endpoint_free(&ep_cfg);
1085 fwnode_handle_put(endpoint);
1086
1087 return ret;
1088 }
1089
imx219_probe(struct i2c_client * client)1090 static int imx219_probe(struct i2c_client *client)
1091 {
1092 struct device *dev = &client->dev;
1093 struct imx219 *imx219;
1094 int ret;
1095
1096 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1097 if (!imx219)
1098 return -ENOMEM;
1099
1100 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1101 imx219->sd.internal_ops = &imx219_internal_ops;
1102
1103 /* Check the hardware configuration in device tree */
1104 if (imx219_check_hwcfg(dev, imx219))
1105 return -EINVAL;
1106
1107 imx219->regmap = devm_cci_regmap_init_i2c(client, 16);
1108 if (IS_ERR(imx219->regmap))
1109 return dev_err_probe(dev, PTR_ERR(imx219->regmap),
1110 "failed to initialize CCI\n");
1111
1112 /* Get system clock (xclk) */
1113 imx219->xclk = devm_clk_get(dev, NULL);
1114 if (IS_ERR(imx219->xclk))
1115 return dev_err_probe(dev, PTR_ERR(imx219->xclk),
1116 "failed to get xclk\n");
1117
1118 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1119 if (imx219->xclk_freq != IMX219_XCLK_FREQ)
1120 return dev_err_probe(dev, -EINVAL,
1121 "xclk frequency not supported: %d Hz\n",
1122 imx219->xclk_freq);
1123
1124 ret = imx219_get_regulators(imx219);
1125 if (ret)
1126 return dev_err_probe(dev, ret, "failed to get regulators\n");
1127
1128 /* Request optional enable pin */
1129 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1130 GPIOD_OUT_HIGH);
1131
1132 /*
1133 * The sensor must be powered for imx219_identify_module()
1134 * to be able to read the CHIP_ID register
1135 */
1136 ret = imx219_power_on(dev);
1137 if (ret)
1138 return ret;
1139
1140 ret = imx219_identify_module(imx219);
1141 if (ret)
1142 goto error_power_off;
1143
1144 /*
1145 * Sensor doesn't enter LP-11 state upon power up until and unless
1146 * streaming is started, so upon power up switch the modes to:
1147 * streaming -> standby
1148 */
1149 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
1150 IMX219_MODE_STREAMING, NULL);
1151 if (ret < 0)
1152 goto error_power_off;
1153
1154 usleep_range(100, 110);
1155
1156 /* put sensor back to standby mode */
1157 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
1158 IMX219_MODE_STANDBY, NULL);
1159 if (ret < 0)
1160 goto error_power_off;
1161
1162 usleep_range(100, 110);
1163
1164 ret = imx219_init_controls(imx219);
1165 if (ret)
1166 goto error_power_off;
1167
1168 /* Initialize subdev */
1169 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1170 V4L2_SUBDEV_FL_HAS_EVENTS;
1171 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1172
1173 /* Initialize source pad */
1174 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1175
1176 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1177 if (ret) {
1178 dev_err_probe(dev, ret, "failed to init entity pads\n");
1179 goto error_handler_free;
1180 }
1181
1182 imx219->sd.state_lock = imx219->ctrl_handler.lock;
1183 ret = v4l2_subdev_init_finalize(&imx219->sd);
1184 if (ret < 0) {
1185 dev_err_probe(dev, ret, "subdev init error\n");
1186 goto error_media_entity;
1187 }
1188
1189 ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1190 if (ret < 0) {
1191 dev_err_probe(dev, ret,
1192 "failed to register sensor sub-device\n");
1193 goto error_subdev_cleanup;
1194 }
1195
1196 /* Enable runtime PM and turn off the device */
1197 pm_runtime_set_active(dev);
1198 pm_runtime_enable(dev);
1199 pm_runtime_idle(dev);
1200
1201 return 0;
1202
1203 error_subdev_cleanup:
1204 v4l2_subdev_cleanup(&imx219->sd);
1205
1206 error_media_entity:
1207 media_entity_cleanup(&imx219->sd.entity);
1208
1209 error_handler_free:
1210 imx219_free_controls(imx219);
1211
1212 error_power_off:
1213 imx219_power_off(dev);
1214
1215 return ret;
1216 }
1217
imx219_remove(struct i2c_client * client)1218 static void imx219_remove(struct i2c_client *client)
1219 {
1220 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1221 struct imx219 *imx219 = to_imx219(sd);
1222
1223 v4l2_async_unregister_subdev(sd);
1224 v4l2_subdev_cleanup(sd);
1225 media_entity_cleanup(&sd->entity);
1226 imx219_free_controls(imx219);
1227
1228 pm_runtime_disable(&client->dev);
1229 if (!pm_runtime_status_suspended(&client->dev))
1230 imx219_power_off(&client->dev);
1231 pm_runtime_set_suspended(&client->dev);
1232 }
1233
1234 static const struct of_device_id imx219_dt_ids[] = {
1235 { .compatible = "sony,imx219" },
1236 { /* sentinel */ }
1237 };
1238 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1239
1240 static const struct dev_pm_ops imx219_pm_ops = {
1241 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1242 };
1243
1244 static struct i2c_driver imx219_i2c_driver = {
1245 .driver = {
1246 .name = "imx219",
1247 .of_match_table = imx219_dt_ids,
1248 .pm = &imx219_pm_ops,
1249 },
1250 .probe = imx219_probe,
1251 .remove = imx219_remove,
1252 };
1253
1254 module_i2c_driver(imx219_i2c_driver);
1255
1256 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1257 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1258 MODULE_LICENSE("GPL v2");
1259