1 /* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DCN35_CLK_MGR_H__ 27 #define __DCN35_CLK_MGR_H__ 28 #include "clk_mgr_internal.h" 29 30 #define NUM_CLOCK_SOURCES 5 31 32 struct dcn35_watermarks; 33 34 struct dcn35_smu_watermark_set { 35 struct dcn35_watermarks *wm_set; 36 union large_integer mc_address; 37 }; 38 39 struct dcn35_ss_info_table { 40 uint32_t ss_divider; 41 uint32_t ss_percentage[NUM_CLOCK_SOURCES]; 42 }; 43 44 struct clk_mgr_dcn35 { 45 struct clk_mgr_internal base; 46 struct dcn35_smu_watermark_set smu_wm_set; 47 }; 48 49 bool dcn35_are_clock_states_equal(struct dc_clocks *a, 50 struct dc_clocks *b); 51 void dcn35_init_clocks(struct clk_mgr *clk_mgr); 52 void dcn35_update_clocks(struct clk_mgr *clk_mgr_base, 53 struct dc_state *context, 54 bool safe_to_lower); 55 56 void dcn35_clk_mgr_construct(struct dc_context *ctx, 57 struct clk_mgr_dcn35 *clk_mgr, 58 struct pp_smu_funcs *pp_smu, 59 struct dccg *dccg); 60 61 void dcn35_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr_int); 62 63 #endif //__DCN35_CLK_MGR_H__ 64