1 // SPDX-License-Identifier: MIT
2 /* Copyright © 2022-2024 Advanced Micro Devices, Inc. All rights reserved. */
3 
4 #define SMU13_DRIVER_IF_VERSION  0x18
5 
6 //Only Clks that have DPM descriptors are listed here
7 typedef enum {
8 	PPCLK_GFXCLK = 0,
9 	PPCLK_SOCCLK,
10 	PPCLK_UCLK,
11 	PPCLK_FCLK,
12 	PPCLK_DCLK_0,
13 	PPCLK_VCLK_0,
14 	PPCLK_DCLK_1,
15 	PPCLK_VCLK_1,
16 	PPCLK_DISPCLK,
17 	PPCLK_DPPCLK,
18 	PPCLK_DPREFCLK,
19 	PPCLK_DCFCLK,
20 	PPCLK_DTBCLK,
21 	PPCLK_COUNT,
22 } PPCLK_e;
23 
24 typedef struct {
25 	uint8_t  WmSetting;
26 	uint8_t  Flags;
27 	uint8_t  Padding[2];
28 
29 } WatermarkRowGeneric_t;
30 
31 #define NUM_WM_RANGES 4
32 
33 typedef enum {
34 	WATERMARKS_CLOCK_RANGE = 0,
35 	WATERMARKS_DUMMY_PSTATE,
36 	WATERMARKS_MALL,
37 	WATERMARKS_COUNT,
38 } WATERMARKS_FLAGS_e;
39 
40 typedef struct {
41 	// Watermarks
42 	WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES];
43 } Watermarks_t;
44 
45 typedef struct {
46 	Watermarks_t Watermarks;
47 	uint32_t  Spare[16];
48 
49 	uint32_t     MmHubPadding[8]; // SMU internal use
50 } WatermarksExternal_t;
51 
52 // Table types
53 #define TABLE_PMFW_PPTABLE            0
54 #define TABLE_COMBO_PPTABLE           1
55 #define TABLE_WATERMARKS              2
56 #define TABLE_AVFS_PSM_DEBUG          3
57 #define TABLE_PMSTATUSLOG             4
58 #define TABLE_SMU_METRICS             5
59 #define TABLE_DRIVER_SMU_CONFIG       6
60 #define TABLE_ACTIVITY_MONITOR_COEFF  7
61 #define TABLE_OVERDRIVE               8
62 #define TABLE_I2C_COMMANDS            9
63 #define TABLE_DRIVER_INFO             10
64 #define TABLE_COUNT                   11
65