1 // SPDX-License-Identifier: MIT
2 /* Copyright © 2022-2024 Advanced Micro Devices, Inc. All rights reserved. */
3 
4 #define SMU11_DRIVER_IF_VERSION 0x40
5 
6 //Only Clks that have DPM descriptors are listed here
7 typedef enum {
8 	PPCLK_GFXCLK = 0,
9 	PPCLK_SOCCLK,
10 	PPCLK_UCLK,
11 	PPCLK_FCLK,
12 	PPCLK_DCLK_0,
13 	PPCLK_VCLK_0,
14 	PPCLK_DCLK_1,
15 	PPCLK_VCLK_1,
16 	PPCLK_DCEFCLK,
17 	PPCLK_DISPCLK,
18 	PPCLK_PIXCLK,
19 	PPCLK_PHYCLK,
20 	PPCLK_DTBCLK,
21 	PPCLK_COUNT,
22 } PPCLK_e;
23 
24 typedef struct {
25 	uint16_t MinClock; // This is either DCEFCLK or SOCCLK (in MHz)
26 	uint16_t MaxClock; // This is either DCEFCLK or SOCCLK (in MHz)
27 	uint16_t MinUclk;
28 	uint16_t MaxUclk;
29 
30 	uint8_t  WmSetting;
31 	uint8_t  Flags;
32 	uint8_t  Padding[2];
33 
34 } WatermarkRowGeneric_t;
35 
36 #define NUM_WM_RANGES 4
37 
38 typedef enum {
39 	WM_SOCCLK = 0,
40 	WM_DCEFCLK,
41 	WM_COUNT,
42 } WM_CLOCK_e;
43 
44 typedef enum {
45 	WATERMARKS_CLOCK_RANGE = 0,
46 	WATERMARKS_DUMMY_PSTATE,
47 	WATERMARKS_MALL,
48 	WATERMARKS_COUNT,
49 } WATERMARKS_FLAGS_e;
50 
51 typedef struct {
52 	// Watermarks
53 	WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES];
54 } Watermarks_t;
55 
56 typedef struct {
57 	Watermarks_t Watermarks;
58 
59 	uint32_t     MmHubPadding[8]; // SMU internal use
60 } WatermarksExternal_t;
61 
62 // Table types
63 #define TABLE_PPTABLE                 0
64 #define TABLE_WATERMARKS              1
65 #define TABLE_AVFS_PSM_DEBUG          2
66 #define TABLE_AVFS_FUSE_OVERRIDE      3
67 #define TABLE_PMSTATUSLOG             4
68 #define TABLE_SMU_METRICS             5
69 #define TABLE_DRIVER_SMU_CONFIG       6
70 #define TABLE_ACTIVITY_MONITOR_COEFF  7
71 #define TABLE_OVERDRIVE               8
72 #define TABLE_I2C_COMMANDS            9
73 #define TABLE_PACE                   10
74 #define TABLE_ECCINFO                11
75 #define TABLE_COUNT                  12
76