1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Jailhouse paravirt_ops implementation
4  *
5  * Copyright (c) Siemens AG, 2015-2017
6  *
7  * Authors:
8  *  Jan Kiszka <jan.kiszka@siemens.com>
9  */
10 
11 #include <linux/acpi_pmtmr.h>
12 #include <linux/kernel.h>
13 #include <linux/reboot.h>
14 #include <linux/serial_8250.h>
15 #include <linux/acpi.h>
16 #include <asm/apic.h>
17 #include <asm/io_apic.h>
18 #include <asm/acpi.h>
19 #include <asm/cpu.h>
20 #include <asm/hypervisor.h>
21 #include <asm/i8259.h>
22 #include <asm/irqdomain.h>
23 #include <asm/pci_x86.h>
24 #include <asm/reboot.h>
25 #include <asm/setup.h>
26 #include <asm/jailhouse_para.h>
27 
28 static struct jailhouse_setup_data setup_data;
29 #define SETUP_DATA_V1_LEN	(sizeof(setup_data.hdr) + sizeof(setup_data.v1))
30 #define SETUP_DATA_V2_LEN	(SETUP_DATA_V1_LEN + sizeof(setup_data.v2))
31 
32 static unsigned int precalibrated_tsc_khz;
33 
jailhouse_setup_irq(unsigned int irq)34 static void jailhouse_setup_irq(unsigned int irq)
35 {
36 	struct mpc_intsrc mp_irq = {
37 		.type		= MP_INTSRC,
38 		.irqtype	= mp_INT,
39 		.irqflag	= MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE,
40 		.srcbusirq	= irq,
41 		.dstirq		= irq,
42 	};
43 	mp_save_irq(&mp_irq);
44 }
45 
jailhouse_cpuid_base(void)46 static uint32_t jailhouse_cpuid_base(void)
47 {
48 	if (boot_cpu_data.cpuid_level < 0 ||
49 	    !boot_cpu_has(X86_FEATURE_HYPERVISOR))
50 		return 0;
51 
52 	return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
53 }
54 
jailhouse_detect(void)55 static uint32_t __init jailhouse_detect(void)
56 {
57 	return jailhouse_cpuid_base();
58 }
59 
jailhouse_get_wallclock(struct timespec64 * now)60 static void jailhouse_get_wallclock(struct timespec64 *now)
61 {
62 	memset(now, 0, sizeof(*now));
63 }
64 
jailhouse_timer_init(void)65 static void __init jailhouse_timer_init(void)
66 {
67 	lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ);
68 }
69 
jailhouse_get_tsc(void)70 static unsigned long jailhouse_get_tsc(void)
71 {
72 	return precalibrated_tsc_khz;
73 }
74 
jailhouse_x2apic_init(void)75 static void __init jailhouse_x2apic_init(void)
76 {
77 #ifdef CONFIG_X86_X2APIC
78 	if (!x2apic_enabled())
79 		return;
80 	/*
81 	 * We do not have access to IR inside Jailhouse non-root cells.  So
82 	 * we have to run in physical mode.
83 	 */
84 	x2apic_phys = 1;
85 	/*
86 	 * This will trigger the switch to apic_x2apic_phys.  Empty OEM IDs
87 	 * ensure that only this APIC driver picks up the call.
88 	 */
89 	default_acpi_madt_oem_check("", "");
90 #endif
91 }
92 
jailhouse_parse_smp_config(void)93 static void __init jailhouse_parse_smp_config(void)
94 {
95 	struct ioapic_domain_cfg ioapic_cfg = {
96 		.type = IOAPIC_DOMAIN_STRICT,
97 		.ops = &mp_ioapic_irqdomain_ops,
98 	};
99 	unsigned int cpu;
100 
101 	jailhouse_x2apic_init();
102 
103 	register_lapic_address(0xfee00000);
104 
105 	for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++)
106 		topology_register_apic(setup_data.v1.cpu_ids[cpu], CPU_ACPIID_INVALID, true);
107 
108 	smp_found_config = 1;
109 
110 	if (setup_data.v1.standard_ioapic) {
111 		mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);
112 
113 		if (IS_ENABLED(CONFIG_SERIAL_8250) &&
114 		    setup_data.hdr.version < 2) {
115 			/* Register 1:1 mapping for legacy UART IRQs 3 and 4 */
116 			jailhouse_setup_irq(3);
117 			jailhouse_setup_irq(4);
118 		}
119 	}
120 }
121 
jailhouse_no_restart(void)122 static void jailhouse_no_restart(void)
123 {
124 	pr_notice("Jailhouse: Restart not supported, halting\n");
125 	machine_halt();
126 }
127 
jailhouse_pci_arch_init(void)128 static int __init jailhouse_pci_arch_init(void)
129 {
130 	pci_direct_init(1);
131 
132 	/*
133 	 * There are no bridges on the virtual PCI root bus under Jailhouse,
134 	 * thus no other way to discover all devices than a full scan.
135 	 * Respect any overrides via the command line, though.
136 	 */
137 	if (pcibios_last_bus < 0)
138 		pcibios_last_bus = 0xff;
139 
140 #ifdef CONFIG_PCI_MMCONFIG
141 	if (setup_data.v1.pci_mmconfig_base) {
142 		pci_mmconfig_add(0, 0, pcibios_last_bus,
143 				 setup_data.v1.pci_mmconfig_base);
144 		pci_mmcfg_arch_init();
145 	}
146 #endif
147 
148 	return 0;
149 }
150 
151 #ifdef CONFIG_SERIAL_8250
jailhouse_uart_enabled(unsigned int uart_nr)152 static inline bool jailhouse_uart_enabled(unsigned int uart_nr)
153 {
154 	return setup_data.v2.flags & BIT(uart_nr);
155 }
156 
jailhouse_serial_fixup(int port,struct uart_port * up,u32 * capabilities)157 static void jailhouse_serial_fixup(int port, struct uart_port *up,
158 				   u32 *capabilities)
159 {
160 	static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};
161 	unsigned int n;
162 
163 	for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) {
164 		if (pcuart_base[n] != up->iobase)
165 			continue;
166 
167 		if (jailhouse_uart_enabled(n)) {
168 			pr_info("Enabling UART%u (port 0x%lx)\n", n,
169 				up->iobase);
170 			jailhouse_setup_irq(up->irq);
171 		} else {
172 			/* Deactivate UART if access isn't allowed */
173 			up->iobase = 0;
174 		}
175 		break;
176 	}
177 }
178 
jailhouse_serial_workaround(void)179 static void __init jailhouse_serial_workaround(void)
180 {
181 	/*
182 	 * There are flags inside setup_data that indicate availability of
183 	 * platform UARTs since setup data version 2.
184 	 *
185 	 * In case of version 1, we don't know which UARTs belong Linux. In
186 	 * this case, unconditionally register 1:1 mapping for legacy UART IRQs
187 	 * 3 and 4.
188 	 */
189 	if (setup_data.hdr.version > 1)
190 		serial8250_set_isa_configurator(jailhouse_serial_fixup);
191 }
192 #else /* !CONFIG_SERIAL_8250 */
jailhouse_serial_workaround(void)193 static inline void jailhouse_serial_workaround(void)
194 {
195 }
196 #endif /* CONFIG_SERIAL_8250 */
197 
jailhouse_init_platform(void)198 static void __init jailhouse_init_platform(void)
199 {
200 	u64 pa_data = boot_params.hdr.setup_data;
201 	unsigned long setup_data_len;
202 	struct setup_data header;
203 	void *mapping;
204 
205 	x86_init.irqs.pre_vector_init		= x86_init_noop;
206 	x86_init.timers.timer_init		= jailhouse_timer_init;
207 	x86_init.mpparse.find_mptable		= x86_init_noop;
208 	x86_init.mpparse.early_parse_smp_cfg	= x86_init_noop;
209 	x86_init.mpparse.parse_smp_cfg		= jailhouse_parse_smp_config;
210 	x86_init.pci.arch_init			= jailhouse_pci_arch_init;
211 
212 	x86_platform.calibrate_cpu		= jailhouse_get_tsc;
213 	x86_platform.calibrate_tsc		= jailhouse_get_tsc;
214 	x86_platform.get_wallclock		= jailhouse_get_wallclock;
215 	x86_platform.legacy.rtc			= 0;
216 	x86_platform.legacy.warm_reset		= 0;
217 	x86_platform.legacy.i8042		= X86_LEGACY_I8042_PLATFORM_ABSENT;
218 
219 	legacy_pic				= &null_legacy_pic;
220 
221 	machine_ops.emergency_restart		= jailhouse_no_restart;
222 
223 	while (pa_data) {
224 		mapping = early_memremap(pa_data, sizeof(header));
225 		memcpy(&header, mapping, sizeof(header));
226 		early_memunmap(mapping, sizeof(header));
227 
228 		if (header.type == SETUP_JAILHOUSE)
229 			break;
230 
231 		pa_data = header.next;
232 	}
233 
234 	if (!pa_data)
235 		panic("Jailhouse: No valid setup data found");
236 
237 	/* setup data must at least contain the header */
238 	if (header.len < sizeof(setup_data.hdr))
239 		goto unsupported;
240 
241 	pa_data += offsetof(struct setup_data, data);
242 	setup_data_len = min_t(unsigned long, sizeof(setup_data),
243 			       (unsigned long)header.len);
244 	mapping = early_memremap(pa_data, setup_data_len);
245 	memcpy(&setup_data, mapping, setup_data_len);
246 	early_memunmap(mapping, setup_data_len);
247 
248 	if (setup_data.hdr.version == 0 ||
249 	    setup_data.hdr.compatible_version !=
250 		JAILHOUSE_SETUP_REQUIRED_VERSION ||
251 	    (setup_data.hdr.version == 1 && header.len < SETUP_DATA_V1_LEN) ||
252 	    (setup_data.hdr.version >= 2 && header.len < SETUP_DATA_V2_LEN))
253 		goto unsupported;
254 
255 	pmtmr_ioport = setup_data.v1.pm_timer_address;
256 	pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport);
257 
258 	precalibrated_tsc_khz = setup_data.v1.tsc_khz;
259 	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
260 
261 	pci_probe = 0;
262 
263 	/*
264 	 * Avoid that the kernel complains about missing ACPI tables - there
265 	 * are none in a non-root cell.
266 	 */
267 	disable_acpi();
268 
269 	jailhouse_serial_workaround();
270 	return;
271 
272 unsupported:
273 	panic("Jailhouse: Unsupported setup data structure");
274 }
275 
jailhouse_paravirt(void)276 bool jailhouse_paravirt(void)
277 {
278 	return jailhouse_cpuid_base() != 0;
279 }
280 
jailhouse_x2apic_available(void)281 static bool __init jailhouse_x2apic_available(void)
282 {
283 	/*
284 	 * The x2APIC is only available if the root cell enabled it. Jailhouse
285 	 * does not support switching between xAPIC and x2APIC.
286 	 */
287 	return x2apic_enabled();
288 }
289 
290 const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
291 	.name			= "Jailhouse",
292 	.detect			= jailhouse_detect,
293 	.init.init_platform	= jailhouse_init_platform,
294 	.init.x2apic_available	= jailhouse_x2apic_available,
295 	.ignore_nopv		= true,
296 };
297